Prosecution Insights
Last updated: May 29, 2026
Application No. 18/952,471

DISPLAY DEVICE AND METHOD OF DRIVING SAME

Non-Final OA §103
Filed
Nov 19, 2024
Priority
Jan 31, 2024 — RE 10-2024-0015260
Examiner
YANG, NAN-YING
Art Unit
2629
Tech Center
2600 — Communications
Assignee
LG Display Co., Ltd.
OA Round
3 (Non-Final)
77%
Grant Probability
Favorable
3-4
OA Rounds
7m
Est. Remaining
86%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allowance Rate
635 granted / 821 resolved
+15.3% vs TC avg
Moderate +9% lift
Without
With
+8.9%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
20 currently pending
Career history
834
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
96.4%
+56.4% vs TC avg
§102
1.8%
-38.2% vs TC avg
§112
1.0%
-39.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 821 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 04/14/2026 has been entered. Response to Amendment This Office Action is made in response to applicant’s amendment submitted with filing of RCE on 04/14/2026. Claims 1 and 7 have been amended. Claims 4 and 10 are cancelled. No claim has been newly added. Claims 1-3, 5-9 and 11-15 are currently pending in the application. Response to Argument Applicant’s arguments with respect to amended claims and added limitations have been considered but are moot because the arguments are believed to be answered by and therefore moot in view of new ground(s) of rejection presented below. In view of amendment, the reference Park has been used for new ground(s) of rejection. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 1-3, 5-6 and 13-15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kwon et al. (US. Pub. No. 2017/0090624, hereinafter “Kwon ‘624”) in view of Kwon et al. (US. Pub. No. 2009/0184896, hereinafter “Kwon ‘896”), further in view of Park et al. (US. Pub. No. 2023/0206842, hereinafter “Park”). As to claims 1 and 13, (Currently Amended) Kwon ‘624 discloses a display device [figure 2, display device], associated with its method of driving the display device [abstract], comprising: a display panel [figure 2, display panel 100] including a plurality of subpixels [paragraph 66, The TFT array substrate may include a plurality of subpixels which are arranged in a lattice type]; and a data driver [figure 2, data driver 700 connected to 100] connected to the display panel, wherein the data driver, in operation, outputs a plurality of data voltages for displaying an image based on the subpixels during a driving period of the display panel [figure 5, 700 output a plurality of data voltages Vdata for displaying an image during driving period DP], and outputs a first data voltage, a second data voltage, and a third data voltage during a sensing period of the display panel [figure 5, output a first data voltage, a second data voltage and a third data voltage TDS during sensing period TP], wherein a level of the first data voltage is different from a level of the second data voltage [figure 5, a level of the first data voltage is different from a level of the second data voltage], and wherein the level of the second data voltage is different from a level of the third data voltage [figure 5, a level of the second data voltage is different from a level of the third data voltage]. Kwon ‘624 does not disclose in which deterioration of at least one element included in at least one of the plurality of subpixels is sensed, wherein the first data voltage is a sensing data voltage for sensing a sensing target subpixel during the sensing period of the display panel, wherein the second data voltage is a recovery data voltage that compensates for a decrease in luminance of the sensing target subpixel during the sensing period of the display panel, and wherein the third data voltage is a buffering data voltage that reduces a difference between a level of a display data voltage to be applied to the sensing target subpixel during the sensing period of the display panel and a level of a display data voltage to be applied to the sensing target subpixel during a next frame. Kwon ‘896 teaches to output multiple data voltages during a sensing period of a display panel in which deterioration of at least one element included in at least one of a plurality of subpixels is sensed [figure 4, multiple data voltages output in sensing period, abstract, a current source unit for supplying predetermined current to organic light emitting diodes (OLED) in a sensing period for grasping deterioration information on the OLEDs included in the sub pixels, paragraph 49, the sensing period is a period in which the deterioration of the OLEDs included in the sub pixels 140 is measured]. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to have modified the display device of Kwon ‘624 to output multiple data voltages during a sensing period of a display panel in which deterioration of at least one element included in at least one of a plurality of subpixels is sensed, as taught by Kwon ‘896, in order to be capable of compensating for the deterioration of OLED (Kwon ‘896, paragraph 3). Kwon ‘624, as modified by Kwon ‘896 does not disclose wherein the first data voltage is a sensing data voltage for sensing a sensing target subpixel during the sensing period of the display panel, wherein the second data voltage is a recovery data voltage that compensates for a decrease in luminance of the sensing target subpixel during the sensing period of the display panel, and wherein the third data voltage is a buffering data voltage that reduces a difference between a level of a display data voltage to be applied to the sensing target subpixel during the sensing period of the display panel and a level of a display data voltage to be applied to the sensing target subpixel during a next frame. Park teaches wherein a first data voltage is a sensing data voltage [figure 4, a first data voltage SVDATA is a sensing data voltage, paragraph 66, The panel driving device may select a predetermined sensing pixel row (N, M) in a sensing period RT of the vertical blank period on the basis of control by the timing controller and may supply a sensing data voltage SVDATA to pixels of the sensing pixel row (N, M) to sensing-drive the display panel] for sensing a sensing target subpixel during a sensing period of a display panel, wherein a second data voltage is a recovery data voltage [figure 4, second data voltage IVDATA during t2, paragraph 66, the panel driving device may supply a recovery data voltage VREC to the pixels of the sensing pixel row (N, M) in a recovery period of the vertical blank period to recovery-drive the display panel. The pixels of the sensing pixel row (N, M) may be turned on (emit light) based on the display driving, may be turned off (may not emit light) in the sensing driving, and may be turned on (emit light) again based on the recovery driving. The pixels of the sensing pixel row (N, M) may be recovered to an image data display state (i.e., the vertical active period) immediately before sensing through the recovery driving] that compensates for a decrease in luminance of the sensing target subpixel during the sensing period of the display panel, and wherein a third data voltage is a buffering data voltage [figure 8, a third data voltage IVDATA2 (with data offset) during a next frame (2nd frame) is working to reduce a difference between a level of a display data voltage to be applied to the sensing target subpixel during the sensing period of the display panel and a level of a display data voltage to be applied to the sensing target subpixel during a next frame, paragraph 79, a data voltage supply circuit may supply a sensing data voltage SVDATA 20 to a target pixel of a sensing pixel row in a sensing period within a vertical blank period of a first frame, may supply a recovery data voltage VREC 30 to the target pixel in a first recovery period Prec1 following the sensing period, and may supply a first display data voltage IVDATA2 40A to the target pixel in a vertical active period of a second frame following the first frame] that reduces a difference between a level of a display data voltage to be applied to the sensing target subpixel during the sensing period of the display panel and a level of a display data voltage to be applied to the sensing target subpixel during a next frame [paragraph 84, a first display data voltage IVDATA2 40A may be obtained by adding a first data offset value (for example, −10 LSB) to the display data voltage IVDATA2, and in a 75 Hz mode, a second display data voltage IVDATA2 40 may be obtained by adding a second data offset value (for example, 0 LSB) to the display data voltage IVDATA2]. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to have modified the display device of Kwon ‘624 to wherein the first data voltage is a sensing data voltage for sensing a sensing target subpixel during the sensing period of the display panel, wherein the second data voltage is a recovery data voltage that compensates for a decrease in luminance of the sensing target subpixel during the sensing period of the display panel, and wherein the third data voltage is a buffering data voltage that reduces a difference between a level of a display data voltage to be applied to the sensing target subpixel during the sensing period of the display panel and a level of a display data voltage to be applied to the sensing target subpixel during a next frame, as taught by Park, in order to decrease luminance distortion occurring in a sensing pixel in a variable frame frequency mode (Park, paragraph 7). As to claim 2, (Original) Kwon ‘624 discloses the display device of claim 1, wherein the level of the second data voltage is equal to or higher than a level of a display data voltage applied to a sensing target subpixel during a previous frame [figure 5, the level of the second data voltage (the one on the right side of RT) is higher than a level of a display data voltage (RT) applied to a sensing target subpixel during a previous frame]. As to claim 3, (Previously Presented) Kwon ‘624 discloses the display device of claim 1, wherein the level of the third data voltage is between the level of the second data voltage and a level of a display data voltage to be applied to a sensing target subpixel during a next frame [figure 5, level of the third data voltage (2nd to the right of RT) is between the level of second data voltage and level of a display data voltage to be applied to sensing target subpixel during a next frame (3rd to the right of RT)]. As to claims 5 and 14, (Original) Kwon ‘624 discloses the display device of claim 1, associated with its method of driving the display device, wherein the first data voltage, the second data voltage, and the third data voltage form a step voltage having a level that gradually increases in a step shape [figure 5, first, second and third data voltages form a step voltage having a level that gradually increases in a step shape during TDS]. As to claims 6 and 15, (Original) Kwon ‘624 discloses the display device of claim 1, associated with its method of driving the display device, wherein the third data voltage varies in response to a level of a display data voltage to be applied to a sensing target subpixel [figure 5, third data voltage in response to a level of display data, paragraph 85, During the touch sensing period TP, in response to the touch presence signal TSES corresponding to the touch nonexistence signal supplied from the touch controller 400, the touch driving signal generator 500 may generate the first and second touch driving signals TDS and TDS′ including a plurality of driving pulses having a voltage level different from the reference voltage level according to the pulse level selection signal PLSS having the variable level data value and may simultaneously supply the first and second touch driving signals TDS and TDS′ to the touch driving circuit unit 300, the gate driving circuit unit 600, and the data driving circuit unit 700]. Claim(s) 7-9 and 11-12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US. Pub. No. 2024/0169872, hereinafter “Kim”) in view of Kwon ‘624, further in view of Kwon ‘896, further in view of Park. As to claim 7, (Currently Amended) Kim discloses a display device [figure 1, display device 10], comprising: a display panel [figure 1, display panel 14 including a plurality of subpixels PXij] including a plurality of subpixels; and a data driver [figure 1, data driver 12 connected to display panel 14] connected to the display panel, wherein the data driver, in operation, sequentially outputs a first data voltage, a second data voltage through a data line connected to the display panel during a blank period [figure 13, data driver sequentially outputs a first data voltage, a second data voltage through a data line Dm connected to display panel during a blank period S2011B, paragraph 138, during blank periods S2011B, S2012B]. Kim does not disclose wherein the data driver, in operation, sequentially outputs a first data voltage, a second data voltage, and a third data voltage through a data line connected to the display panel during a period in which deterioration of at least one element included in at least one of the plurality of subpixels is sensed, wherein a level of the first data voltage is different from a level of the second data voltage, wherein the level of the second data voltage is different from a level of the third data voltage, wherein the first data voltage is a sensing data voltage for sensing a sensing target subpixel during the sensing period of the display panel, wherein the second data voltage is a recovery data voltage that compensates for a decrease in luminance of the sensing target subpixel during the sensing period of the display panel, and wherein the third data voltage is a buffering data voltage that reduces a difference between a level of a display data voltage to be applied to the sensing target subpixel during the sensing period of the display panel and a level of a display data voltage to be applied to the sensing target subpixel during a next frame. Kwon ‘624 teaches wherein a data driver, in operation, sequentially outputs a first data voltage, a second data voltage, and a third data voltage through a data line connected to a display panel [figure 5, output a first data voltage, a second data voltage and a third data voltage TDS during sensing period TP], wherein a level of the first data voltage is different from a level of the second data voltage [figure 5, a level of the first data voltage is different from a level of the second data voltage], and wherein the level of the second data voltage is different from a level of the third data voltage [figure 5, a level of the second data voltage is different from a level of the third data voltage]. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to have modified the display device of Kwon to wherein the data driver, in operation, sequentially outputs a first data voltage, a second data voltage, and a third data voltage through a data line connected to the display panel, wherein a level of the first data voltage is different from a level of the second data voltage, and wherein the level of the second data voltage is different from a level of the third data voltage, as taught by Kwon ‘624, in order to provide a display device capable of more quickly sensing an abnormal state of a display device (Kwon ‘624, paragraph 5). Kim as modified by Kwon ‘624 does not disclose in which deterioration of at least one element included in at least one of the plurality of subpixels is sensed, wherein the first data voltage is a sensing data voltage for sensing a sensing target subpixel during the sensing period of the display panel, wherein the second data voltage is a recovery data voltage that compensates for a decrease in luminance of the sensing target subpixel during the sensing period of the display panel, and wherein the third data voltage is a buffering data voltage that reduces a difference between a level of a display data voltage to be applied to the sensing target subpixel during the sensing period of the display panel and a level of a display data voltage to be applied to the sensing target subpixel during a next frame. Kwon ‘896 teaches to output multiple data voltages during a sensing period of a display panel in which deterioration of at least one element included in at least one of a plurality of subpixels is sensed [figure 4, multiple data voltages output in sensing period, abstract, a current source unit for supplying predetermined current to organic light emitting diodes (OLED) in a sensing period for grasping deterioration information on the OLEDs included in the sub pixels, paragraph 49, the sensing period is a period in which the deterioration of the OLEDs included in the sub pixels 140 is measured]. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to have modified the display device of Kim to output multiple data voltages during a sensing period of a display panel in which deterioration of at least one element included in at least one of a plurality of subpixels is sensed, as taught by Kwon ‘896, in order to be capable of compensating for the deterioration of OLED (Kwon ‘896, paragraph 3). Kim, as modified by Kwon ‘624 and Kwon ‘896, does not disclose wherein the first data voltage is a sensing data voltage for sensing a sensing target subpixel during the sensing period of the display panel, wherein the second data voltage is a recovery data voltage that compensates for a decrease in luminance of the sensing target subpixel during the sensing period of the display panel, and wherein the third data voltage is a buffering data voltage that reduces a difference between a level of a display data voltage to be applied to the sensing target subpixel during the sensing period of the display panel and a level of a display data voltage to be applied to the sensing target subpixel during a next frame. Park teaches wherein a first data voltage is a sensing data voltage [figure 4, a first data voltage SVDATA is a sensing data voltage, paragraph 66, The panel driving device may select a predetermined sensing pixel row (N, M) in a sensing period RT of the vertical blank period on the basis of control by the timing controller and may supply a sensing data voltage SVDATA to pixels of the sensing pixel row (N, M) to sensing-drive the display panel] for sensing a sensing target subpixel during a sensing period of a display panel, wherein a second data voltage is a recovery data voltage [figure 4, second data voltage IVDATA during t2, paragraph 66, the panel driving device may supply a recovery data voltage VREC to the pixels of the sensing pixel row (N, M) in a recovery period of the vertical blank period to recovery-drive the display panel. The pixels of the sensing pixel row (N, M) may be turned on (emit light) based on the display driving, may be turned off (may not emit light) in the sensing driving, and may be turned on (emit light) again based on the recovery driving. The pixels of the sensing pixel row (N, M) may be recovered to an image data display state (i.e., the vertical active period) immediately before sensing through the recovery driving] that compensates for a decrease in luminance of the sensing target subpixel during the sensing period of the display panel, and wherein a third data voltage is a buffering data voltage [figure 8, a third data voltage IVDATA2 (with data offset) during a next frame (2nd frame) is working to reduce a difference between a level of a display data voltage to be applied to the sensing target subpixel during the sensing period of the display panel and a level of a display data voltage to be applied to the sensing target subpixel during a next frame, paragraph 79, a data voltage supply circuit may supply a sensing data voltage SVDATA 20 to a target pixel of a sensing pixel row in a sensing period within a vertical blank period of a first frame, may supply a recovery data voltage VREC 30 to the target pixel in a first recovery period Prec1 following the sensing period, and may supply a first display data voltage IVDATA2 40A to the target pixel in a vertical active period of a second frame following the first frame] that reduces a difference between a level of a display data voltage to be applied to the sensing target subpixel during the sensing period of the display panel and a level of a display data voltage to be applied to the sensing target subpixel during a next frame [paragraph 84, a first display data voltage IVDATA2 40A may be obtained by adding a first data offset value (for example, −10 LSB) to the display data voltage IVDATA2, and in a 75 Hz mode, a second display data voltage IVDATA2 40 may be obtained by adding a second data offset value (for example, 0 LSB) to the display data voltage IVDATA2]. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to have modified the display device of Kwon ‘624 to wherein the first data voltage is a sensing data voltage for sensing a sensing target subpixel during the sensing period of the display panel, wherein the second data voltage is a recovery data voltage that compensates for a decrease in luminance of the sensing target subpixel during the sensing period of the display panel, and wherein the third data voltage is a buffering data voltage that reduces a difference between a level of a display data voltage to be applied to the sensing target subpixel during the sensing period of the display panel and a level of a display data voltage to be applied to the sensing target subpixel during a next frame, as taught by Park, in order to decrease luminance distortion occurring in a sensing pixel in a variable frame frequency mode (Park, paragraph 7). As to claim 8, (Original) Kim, as modified by Kwon ‘624, Kwon ‘896 and Park, discloses the display device of claim 7, wherein the level of the second data voltage is equal to or higher than a level of a display data voltage applied to a sensing target subpixel during a previous frame [Kwon ‘624, figure 5, the level of the second data voltage (the one on the right side of RT) is higher than a level of a display data voltage (RT) applied to a sensing target subpixel during a previous frame]. In addition, the same rationale is used as in rejection for claim 7. As to claim 9, (Original) Kim, as modified by Kwon ‘624, Kwon ‘896 and Park, discloses the display device of claim 7, wherein the level of the third data voltage is between the level of the second data voltage and a level of a display data voltage to be applied to a sensing target subpixel during a next frame [Kwon ‘624, figure 5, level of the third data voltage (2nd to the right of RT) is between the level of second data voltage and level of a display data voltage to be applied to sensing target subpixel during a next frame (3rd to the right of RT)]. In addition, the same rationale is used as in rejection for claim 7. As to claim 11, (Original) Kim, as modified by Kwon ‘624, Kwon ‘896 and Park, discloses the display device of claim 7, wherein the first data voltage, the second data voltage, and the third data voltage form a step voltage having a level that gradually increases in a step shape [Kwon ‘624, figure 5, first, second and third data voltages form a step voltage having a level that gradually increases in a step shape during TDS]. In addition, the same rationale is used as in rejection for claim 7. As to claim 12, (Original) Kim, as modified by Kwon ‘624, Kwon ‘896 and Park, discloses the display device of claim 7, wherein the level of the third data voltage varies in response to a level of a display data voltage to be applied to a sensing target subpixel [Kwon ‘624, figure 5, third data voltage in response to a level of display data, paragraph 85, During the touch sensing period TP, in response to the touch presence signal TSES corresponding to the touch nonexistence signal supplied from the touch controller 400, the touch driving signal generator 500 may generate the first and second touch driving signals TDS and TDS′ including a plurality of driving pulses having a voltage level different from the reference voltage level according to the pulse level selection signal PLSS having the variable level data value and may simultaneously supply the first and second touch driving signals TDS and TDS′ to the touch driving circuit unit 300, the gate driving circuit unit 600, and the data driving circuit unit 700]. In addition, the same rationale is used as in rejection for claim 7. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to NAN-YING YANG whose telephone number is (571)272-2211. The examiner can normally be reached Monday-Friday, 8am-5pm, EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, BENJAMIN LEE can be reached at (571)272-2963. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /NAN-YING YANG/Primary Examiner, Art Unit 2629
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Prosecution Timeline

Show 1 earlier event
Sep 24, 2025
Non-Final Rejection mailed — §103
Dec 16, 2025
Response Filed
Jan 14, 2026
Final Rejection mailed — §103
Apr 13, 2026
Applicant Interview (Telephonic)
Apr 14, 2026
Request for Continued Examination
Apr 14, 2026
Examiner Interview Summary
Apr 16, 2026
Response after Non-Final Action
Apr 30, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
77%
Grant Probability
86%
With Interview (+8.9%)
2y 1m (~7m remaining)
Median Time to Grant
High
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