DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-4 and 7-16 have been amended.
Claims 1-20 have been examined.
The specification, drawing, and claim objections in the previous Office Action have been addressed and are withdrawn.
The § 112 rejections in the previous Office Action have been addressed and are withdrawn.
Drawings
The drawings are objected to because of the following informalities.
Much of the text in Figures 10-25 is too small. The figures therefore fail to comply with 37 CFR 1.84(p)(3), which requires, “Numbers, letters, and reference characters must measure at least .32 cm. (1/8 inch) in height.”
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claims 1-20 are objected to because of the following informalities.
Claim 1 recites, at the last two lines, “restricting the retreating refers to remaining the write pointer in an original position.” The use of the intransitive verb “remaining” with a direct object, i.e., the write pointer, is grammatically incorrect and reduces the clarity of the claim. Please amend to, “restricting the retreating refers to causing the write pointer to remain in an original position,” if that is the meaning intended. Another suggestion is to replace “remaining” with “keeping,” “retaining,” “holding,” or the like.
Claims 2-20 are objected to as depending from objected to base claims and failing to remedy the deficiencies of those claims. Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over US Publication No. 2003/0120906 by Jourdan et al. (hereinafter referred to as “Jourdan”) in view of NPL “The Effects of Mispredicted-Path Execution on Branch Prediction Structures,” by Jourdan et al. (hereinafter referred to as “Jourdan_NPL”).
Regarding claims 1 and 18-20, taking claim 1 as representative, Jourdan discloses:
a method for processing an instruction, wherein the method is based on an address stack, wherein the address stack comprises a first sub-stack and a second sub-stack, a target address in the first sub-stack is acquired based on a first prediction result of an instruction, and a target address in the second sub-stack is acquired based on a committing result of an instruction, the method comprises: acquiring a second prediction result of an operation instruction, wherein the second prediction result indicates a next instruction as predicted that is executed after the operation instruction (Jourdan discloses, at Figures 2A-2B and related description, a two-part return address buffer (stack) having a speculative part (first sub-stack) and a committed part (second sub-stack) and pushing predicted return addresses onto the stack, which discloses a method for processing an instruction, being applied to process an instruction based on an address stack, wherein the address stack comprises a first sub-stack and a second sub-stack, a target address in the first sub-stack is acquired based on a first prediction result of an instruction, and a target address in the second sub-stack is acquired based on a committing result of an instruction, the method comprises: acquiring a second prediction result of an operation instruction, wherein the second prediction result indicates a next instruction as predicted that is executed after the operation instruction. Jourdan also discloses, at Figure 1 and related description and claim 12, a device comprising processor and memory storing a program, a storage medium storing a program, and a computer program product comprising a program.);
determining a processing operation for the first sub-stack according to the second prediction result (Jourdan discloses, at Figures 2A-2B and related description, popping in response to a return, which discloses determining a processing operation for the first sub-stack according to the second prediction result.); and
performing, according to a write pointer of the first sub-stack, the processing operation on a target address corresponding to the second prediction result in the first sub-stack, …and the write pointer of the first sub-stack is configured to correct an out-of-order portion caused by performing the processing operation in the first sub-stack in a case of determining that the second prediction result is an unsuccessful prediction (Jourdan discloses, at Figures 2C and 2D-3, popping a return address and recovering from branch misprediction, which discloses performing, according to a write pointer of the first sub-stack, the processing operation on a target address corresponding to the second prediction result in the first sub-stack, …and the write pointer of the first sub-stack is configured to correct an out-of-order portion caused by performing the processing operation in the first sub-stack in a case of determining that the second prediction result is an unsuccessful prediction.).
Jourdan does not explicitly disclose wherein the write pointer of the first sub-stack restricts retreating in a process of performing the processing operation wherein restricting the retreating refers to remaining the write pointer in an original position.
However, in the same field of endeavor (e.g., misprediction) Jourdan_NPL discloses:
preventing a pointer from retreating in a process of performing the processing operation by retaining the pointer in an original position (Jourdan_NPL discloses, at § 4.4, preventing the NEXT pointer from being decremented when a return is processed, which discloses retaining the pointer in its original position.).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to modify Jourdan to include preventing decrementing the pointer, as disclosed by Jourdan_NPL, in order to improve performance and increase flexibility by providing additional mechanisms to recover from misprediction.
Regarding claim 2, Jourdan, as modified, discloses the elements of claim 1, as discussed above. Jourdan also discloses:
said determining the processing operation for the first sub-stack according to the second prediction result comprises: determining, in a case that the second prediction result indicates that the next instruction is a call instruction, that the processing operation comprises a push operation, wherein the push operation is configured to push a target address corresponding to the call instruction into the first sub-stack, and the call instruction is configured to call any program (Jourdan discloses, at Figure 2B and related description, pushing a return address onto the speculative portion of the stack in response to a call, which discloses said determining the processing operation for the first sub-stack according to the second prediction result comprises: determining, in a case that the second prediction result indicates that the next instruction is a call instruction, that the processing operation comprises a push operation, wherein the push operation is configured to push a target address corresponding to the call instruction into the first sub-stack, and the call instruction is configured to call any program.);
or, determining, in a case that the second prediction result indicates that the next instruction is a return instruction, that the processing operation comprises a pop operation corresponding to the push operation as executed, wherein the pop operation is configured to pop a target address corresponding to the return instruction in the first sub-stack, and the return instruction is configured to return after an end of calling any program (Jourdan discloses, at Figure 2C and related description, popping a return address from the speculative portion of the stack in response to a return, which discloses determining, in a case that the second prediction result indicates that the next instruction is a return instruction, that the processing operation comprises a pop operation corresponding to the push operation as executed, wherein the pop operation is configured to pop a target address corresponding to the return instruction in the first sub-stack, and the return instruction is configured to return after an end of calling any program.).
Regarding claim 3, Jourdan, as modified, discloses the elements of claim 1, as discussed above. Jourdan also discloses:
said performing, according to the write pointer of the first sub-stack, the processing operation on the target address corresponding to the second prediction result in the first sub-stack comprises: pushing, in a case that the processing operation comprises a push operation, the target address corresponding to the second prediction result into the first sub-stack according to the write pointer of the first sub-stack, wherein the write pointer of the first sub-stack advances in a case of pushing the target address (Jourdan discloses, at Figure 2B and related description, pushing a return address onto the speculative portion of the stack and incrementing SALLOC, which discloses said performing, according to the write pointer of the first sub-stack, the processing operation on the target address corresponding to the second prediction result in the first sub-stack comprises: pushing, in a case that the processing operation comprises a push operation, the target address corresponding to the second prediction result into the first sub-stack according to the write pointer of the first sub-stack, wherein the write pointer of the first sub-stack advances in a case of pushing the target address.);
or, determining, in a case that the processing operation comprises a pop operation corresponding to the push operation as executed, the target address corresponding to the second prediction result in the target addresses pushed into the first sub-stack according to the write pointer of the first sub-stack, and popping the target address as determined… (Jourdan discloses, at Figure 2C and related description, popping a return address from the speculative portion of the stack, which discloses determining, in a case that the processing operation comprises a pop operation corresponding to the push operation as executed, the target address corresponding to the second prediction result in the target addresses pushed into the first sub-stack according to the write pointer of the first sub-stack, and popping the target address as determined.).
Jourdan does not explicitly disclose wherein the write pointer of the first sub-stack remains in an original position in a case of popping the target address.
However, in the same field of endeavor (e.g., misprediction) Jourdan_NPL discloses:
the write pointer of the first sub-stack remains in an original position in a case of popping the target address (Jourdan_NPL discloses, at § 4.4, preventing the NEXT pointer from being decremented when a return is processed.).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to modify Jourdan to include preventing decrementing the write pointer, as disclosed by Jourdan_NPL, in order to improve performance and increase flexibility by providing additional mechanisms to recover from misprediction.
Regarding claim 4, Jourdan, as modified, discloses the elements of claim 3, as discussed above. Jourdan also discloses:
said determining the target address corresponding to the second prediction result in the target addresses pushed into the first sub-stack according to the write pointer of the first sub-stack comprises: determining a historical instruction corresponding to the second prediction result, wherein the second prediction result indicates an end of calling any program, and the historical instruction is configured to call any program (Jourdan discloses, at Figure 2B and related description, a call instruction that corresponds to a return address, which discloses said determining the target address corresponding to the second prediction result in the target addresses pushed into the first sub-stack according to the write pointer of the first sub-stack comprises: determining a historical instruction corresponding to the second prediction result, wherein the second prediction result indicates an end of calling any program, and the historical instruction is configured to call any program.);
determining a write pointer of the historical instruction, wherein the write pointer of the historical instruction is configured to push a target address corresponding to the historical instruction into the first sub-stack (Jourdan discloses, at Figure 2B and related description, pushing a return address onto the speculative portion of the stack, which discloses determining a write pointer of the historical instruction, wherein the write pointer of the historical instruction is configured to push a target address corresponding to the historical instruction into the first sub-stack.); and
acquiring the target address corresponding to the second prediction result by searching, according to the write pointer of the historical instruction, the target address corresponding to the historical instruction from at least one target address pushed into the first sub-stack (Jourdan discloses, at Figure 2C and related description, reading the return address from the speculative portion of the stack at the location indicated by the STOS pointer, which discloses acquiring the target address corresponding to the second prediction result by searching, according to the write pointer of the historical instruction, the target address corresponding to the historical instruction from at least one target address pushed into the first sub-stack.).
Regarding claim 5, Jourdan, as modified, discloses the elements of claim 4, as discussed above. Jourdan also discloses:
wherein said searching, according to the write pointer of the historical instruction, the target address corresponding to the historical instruction from at least one target address pushed into the first sub-stack comprises: acquiring a link relationship between a write pointer and a first stack top pointer of the first sub-stack (Jourdan discloses, at Figure 2B and related description, setting STOS equal to SALLOC, which discloses wherein said searching, according to the write pointer of the historical instruction, the target address corresponding to the historical instruction from at least one target address pushed into the first sub-stack comprises: acquiring a link relationship between a write pointer and a first stack top pointer of the first sub-stack.);
searching a first stack top pointer corresponding to the write pointer of the historical instruction according to the link relationship between the write pointer and the first stack top pointer (Jourdan discloses, at Figure 2C and related description, reading the return address from the speculative portion of the stack at the location indicated by the STOS pointer, which discloses searching a first stack top pointer corresponding to the write pointer of the historical instruction according to the link relationship between the write pointer and the first stack top pointer.); and
determining a target address indicated by the first stack top pointer as searched as the target address corresponding to the historical instruction (Jourdan discloses, at Figure 2C and related description, reading the return address from the speculative portion of the stack at the location indicated by the STOS pointer, which discloses determining a target address indicated by the first stack top pointer as searched as the target address corresponding to the historical instruction.).
Regarding claim 6, Jourdan, as modified, discloses the elements of claim 3, as discussed above. Jourdan also discloses:
after popping the target address as determined, further comprising: retreating a first stack top pointer of the first sub-stack according to a position of the target address as popped (Jourdan discloses, at Figure 2C and related description, setting STOS back to a previous value, which discloses after popping the target address as determined, further comprising: retreating a first stack top pointer of the first sub-stack according to a position of the target address as popped.).
Regarding claim 7, Jourdan, as modified, discloses the elements of claim 5, as discussed above. Jourdan also discloses:
after popping the target address as determined, further comprising: retreating the first stack top pointer of the first sub-stack according to a position of the target address as popped (Jourdan discloses, at Figure 2C and related description, setting STOS back to a previous value, which discloses after popping the target address as determined, further comprising: retreating the first stack top pointer of the first sub-stack according to a position of the target address as popped.).
Regarding claim 8, Jourdan, as modified, discloses the elements of claim 4, as discussed above. Jourdan also discloses:
after popping the target address as determined, further comprising: retreating a first stack top pointer of the first sub-stack according to a position of the target address as popped (Jourdan discloses, at Figure 2C and related description, setting STOS back to a previous value, which discloses after popping the target address as determined, further comprising: retreating a first stack top pointer of the first sub-stack according to a position of the target address as popped.).
Regarding claim 9, Jourdan, as modified, discloses the elements of claim 3, as discussed above. Jourdan also discloses:
after pushing the target address corresponding to the second prediction result into the first sub-stack according to the write pointer of the first sub-stack, further comprising: establishing a link relationship between a write pointer and a first stack top pointer of the first sub-stack, wherein the link relationship is configured to determine the target address corresponding to the second prediction result from the first sub-stack (Jourdan discloses, at Figure 2B and related description, setting STOS equal to SALLOC after pushing a return address onto the speculative portion of the stack, which discloses after pushing the target address corresponding to the second prediction result into the first sub-stack according to the write pointer of the first sub-stack, further comprising: establishing a link relationship between a write pointer and a first stack top pointer of the first sub-stack, wherein the link relationship is configured to determine the target address corresponding to the second prediction result from the first sub-stack.).
Regarding claim 10, Jourdan, as modified, discloses the elements of claim 4, as discussed above. Jourdan also discloses:
after pushing the target address corresponding to the prediction result into the first sub-stack according to the write pointer of the first sub-stack, further comprising: establishing a link relationship between a write pointer and a first stack top pointer of the first sub-stack, wherein the link relationship is configured to determine the target address corresponding to the second prediction result from the first sub-stack (Jourdan discloses, at Figure 2B and related description, setting STOS equal to SALLOC after pushing a return address onto the speculative portion of the stack, which discloses after pushing the target address corresponding to the prediction result into the first sub-stack according to the write pointer of the first sub-stack, further comprising: establishing a link relationship between a write pointer and a first stack top pointer of the first sub-stack, wherein the link relationship is configured to determine the target address corresponding to the second prediction result from the first sub-stack.).
Regarding claim 11, Jourdan, as modified, discloses the elements of claim 5, as discussed above. Jourdan also discloses:
after pushing the target address corresponding to the prediction result into the first sub-stack according to the write pointer of the first sub-stack, further comprising: establishing the link relationship between the write pointer and the first stack top pointer of the first sub-stack, wherein the link relationship is configured to determine the target address corresponding to the second prediction result from the first sub-stack (Jourdan discloses, at Figure 2B and related description, setting STOS equal to SALLOC after pushing a return address onto the speculative portion of the stack, which discloses after pushing the target address corresponding to the prediction result into the first sub-stack according to the write pointer of the first sub-stack, further comprising: establishing a link relationship between a write pointer and a first stack top pointer of the first sub-stack, wherein the link relationship is configured to determine the target address corresponding to the second prediction result from the first sub-stack.).
Regarding claim 12, Jourdan, as modified, discloses the elements of claim 3, as discussed above. Jourdan also discloses:
after pushing the target address corresponding to the second prediction result into the first sub-stack according to the write pointer of the first sub-stack, further comprising: determining a candidate cell in at least one memory cell comprised in the second sub-stack; and storing, in a case of committing the second prediction result, the target address corresponding to the second prediction result in the candidate cell (Jourdan discloses, at Figure 2D and related description, after pushing the return address to the CRSB, when the call retires, i.e., commits, storing a return address in the CRSB, i.e., the second sub-stack, which discloses after pushing the target address corresponding to the second prediction result into the first sub-stack according to the write pointer of the first sub-stack, further comprising: determining a candidate cell in at least one memory cell comprised in the second sub-stack; and storing, in a case of committing the second prediction result, the target address corresponding to the second prediction result in the candidate cell.).
Regarding claim 13, Jourdan, as modified, discloses the elements of claim 5, as discussed above. Jourdan also discloses:
after pushing the target address corresponding to the prediction result into the first sub-stack according to the write pointer of the first sub-stack, further comprising: determining a candidate cell in at least one memory cell comprised in the second sub-stack; and storing, in a case of committing the prediction result, the target address corresponding to the second prediction result in the candidate cell (Jourdan discloses, at Figure 2D and related description, after pushing the return address to the CRSB, when the call retires, i.e., commits, storing a return address in the CRSB, i.e., the second sub-stack, which discloses after pushing the target address corresponding to the prediction result into the first sub-stack according to the write pointer of the first sub-stack, further comprising: determining a candidate cell in at least one memory cell comprised in the second sub-stack; and storing, in a case of committing the prediction result, the target address corresponding to the second prediction result in the candidate cell.).
Regarding claim 14, Jourdan, as modified, discloses the elements of claim 4, as discussed above. Jourdan also discloses:
after pushing the target address corresponding to the prediction result into the first sub-stack according to the write pointer of the first sub-stack, further comprising: determining a candidate cell in at least one memory cell included in the second sub-stack; and storing, in a case of committing the prediction result, the target address corresponding to the second prediction result in the candidate cell (Jourdan discloses, at Figure 2D and related description, after pushing the return address to the CRSB, when the call retires, i.e., commits, storing a return address in the CRSB, i.e., the second sub-stack, which discloses after pushing the target address corresponding to the prediction result into the first sub-stack according to the write pointer of the first sub-stack, further comprising: determining a candidate cell in at least one memory cell included in the second sub-stack; and storing, in a case of committing the second prediction result, the target address corresponding to the prediction result in the candidate cell.).
Regarding claim 15, Jourdan, as modified, discloses the elements of claim 1, as discussed above. Jourdan also discloses:
acquiring an execution result corresponding to the operation instruction, wherein the execution result indicates a next instruction as determined that is executed after the operation instruction; and determining, in a case that the execution result and the second prediction result are different, that the second prediction result is the unsuccessful prediction, or determining, in a case that the execution result and the second prediction result are a same, that the second prediction result is a successful prediction (Jourdan discloses, at Figure 2D-3, determining whether the prediction was correct, which discloses acquiring an execution result corresponding to the operation instruction, wherein the execution result indicates a next instruction as determined that is executed after the operation instruction; and determining, in a case that the execution result and the second prediction result are different, that the second prediction result is the unsuccessful prediction, or determining, in a case that the execution result and the second prediction result are a same, that the second prediction result is a successful prediction.).
Regarding claim 16, Jourdan, as modified, discloses the elements of claim 2, as discussed above. Jourdan also discloses:
acquiring an execution result corresponding to the operation instruction, wherein the execution result indicates a determined next instruction executed after the operation instruction; and determining, in a case that the execution result and the second prediction result are different, that the second prediction result is the unsuccessful prediction, or determining, in a case that the execution result and the second prediction result are a same, that the second prediction result is a successful prediction (Jourdan discloses, at Figure 2D-3, determining whether the prediction was correct, which discloses acquiring an execution result corresponding to the operation instruction, wherein the execution result indicates a next instruction as determined that is executed after the operation instruction; and determining, in a case that the execution result and the prediction result are different, that the prediction result is an unsuccessful prediction, or determining, in a case that the execution result and the prediction result are a same, that the prediction result is a successful prediction.).
Regarding claim 17, Jourdan, as modified, discloses the elements of claim 1, as discussed above. Jourdan also discloses:
restoring the write pointer of the first sub-stack according to the out-of-order portion of the first sub-stack; and correcting the out-of-order portion of the first sub-stack according to the write pointer as restored (Jourdan discloses, at Figure 2D-3, recovering from misprediction, which discloses restoring the write pointer of the first sub-stack according to the out-of-order portion of the first sub-stack; and correcting the out-of-order portion of the first sub-stack according to the write pointer as restored.).
Response to Arguments
On page 12 of the response filed February 17, 2026 (“response”), the Applicant argues, “Applicant submits that the claims are not required to be reordered until allowance and that, at that time, the claims are normally reordered by the Examiner.”
The Applicant is correct that the claims can be reordered if and when the application is allowed. The drawing objections are withdrawn. The Examiner requests that the Applicant, in the future, complies with the rules for proper claim ordering. Doing so reduces unnecessary work and improves clarity of the record.
On pages 14-15 of the response the Applicant argues, “Applicant submits that the NEXT pointer in Jourdan_NPL is a global management pointer of the branch predictor, which is configured to restrict the decrement of the pointer value when processing a return instruction, solving the problem of branch prediction misalignment. In contrast, the write pointer of the first sub-stack in amended claim 1 is a local operation pointer of the stack, which is configured to remain the write pointer in the original position in the process of performing the processing operation, prevent the target address in the first sub-stack from being deleted, and ensure the address integrity of the first sub- stack. Thus, the write pointer of the first sub-stack in amended claim 1 addresses the problems of stack address overwriting and out-of-order fast correction. The NEXT pointer in Jourdan_NPL does not disclose or render obvious the write pointer as recited in claim 1. The NEXT pointer in Jourdan_NPL differs from the write pointer of the first sub-stack in amended claim 1 in terms of the attributes of the pointer, the function of the pointer, and the technical problem addressed by the pointer. Therefore, Jourdan_NPL does not disclose or render obvious the write pointer of the first sub-stack as recited in amended claim 1. Therefore, Jourdan and Jourdan NPL do not disclose or render obvious the write pointer of the first sub-stack as recited in amended claim 1. Furthermore, even if Jourdan was modified to include preventing decrementing of the write pointer of Jourdan_NPL, which Applicant does not acquiesce is proper, the combination would not teach the write pointer as recited in claim 1.”
Though fully considered, the Examiner respectfully disagrees. To clarify, Jourdan is cited as teaching a write pointer. See, e.g., ¶ [0021]. Jourdan does not disclose preventing the write pointer from being decremented. However, Jourdan_NPL discloses preventing a pointer from being decremented. See, e.g., § 4.4. It would have been obvious to modify Jourdan such that Jourdan’s write pointer was prevented from decrementing, as disclosed by Jourdan_NPL in order to increase flexibility by providing additional mechanisms to recover from misprediction.
It is the Examiner’s understanding that the problem with stack overwriting is that when a misprediction occurs, the overwritten addresses are no longer available to correct the misprediction. This is exactly the same purpose as disclosed at Jourdan_NPL Id. Accordingly, the Applicant’s arguments are deemed unpersuasive.
Conclusion
THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAWN DOMAN whose telephone number is (571)270-5677. The examiner can normally be reached on Monday through Friday 8:30am-6pm Eastern Time.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jyoti Mehta can be reached on 571-270-3995. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/SHAWN DOMAN/
Primary Examiner, Art Unit 2183
Prosecution Insights