DETAILED ACTION
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 11/21/2024 and 1/27/2025 were considered by the examiner.
Drawings
The drawings are objected to because [0033] of the specification as filed 11/21/2024 recites “alternating current resistance Z, which is provided with reference number 1 in Fig. 1”, however, Fig. 1 identifies the resistance Z as “4” which also corresponds to “signal source 4” in Fig. 1 and [0033].
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification
The disclosure is objected to because of the following informalities:
The acronym “EMC” (see [0019], [0021], [0036], [0037], and [0042] of specification as filed 11/21/2024) but not definition is provided. Please define what is meant by “EMC”.
In [0066] of the specification as filed 11/21/2024, “the capacitor 66” should be corrected to - - the capacitor 60 - -.
Appropriate correction is required.
Claim Objections
Claims 13 and 14 are objected to because of the following informalities:
Claims 13 and 14 should be amended to recite “A method .
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 1-14 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 1, the claim recites “a high-pass filter”. As best understood by the examiner, the pending disclosure is interpreting coupling capacitor 5 of Fig. 1 the high-pass filter. See [0040], “The output signal of the phase shifter 26 is coupled into a high-pass filter 30. As shown in exemplary embodiments to be described later, the high-pass filter 30 can be designed as a capacitor, corresponding to the coupling capacitor 5 in FIG. 1.” One of ordinary skill in the art would not reasonably define a capacitor as a high-pass filter as recited in the claim. Further, it is unclear to the examiner how a single capacitor is operable as a high-pass filter. As best understood by the examiner, the coupling capacitance CK and the resistance of the impedance Z function as a high-pass filter as outlined in [0041]. No prior art was identified at the time of examination which teaches all limitations of claim 1.
Regarding claim 1, the limitation “wherein the alternating voltage excitation signal is fed into the first signal path or into the second and third signal path at least temporarily with a phase offset compared to the alternating voltage excitation signal generated by the signal source;” which provides two alternative limitations which are unclear in light of the disclosure. It is unclear what embodiments of Figs. 2-8 include in the scope of claim 2. For example:
In Fig. 2 the first signal path 20 is phase shifted and the third signal path 24 is inverted (i.e. phase shifted by 180 degrees).
In Fig. 3 the second signal path 22 is phase shifted and the third signal path 24 is inverted (i.e. phase shifted by 180 degrees).
In Fig. 4 the first signal path 20 is phase shifted and the third signal path 24 is inverted (i.e. phase shifted by 180 degrees).
In Fig. 5 the second signal path 22 is phase shifted and inverted.
In Fig. 6 the second signal path 22 is inverted and “a phase shifter can be provided at a position 70.” See [0068] of specification filed 11/21/2024.
Figs. 7 and 8 do not include a phase shifter and omit inverters due to the reverse polarity of diodes D1 and D2 in the second and third signal paths.
As best understood by the examiner, the embodiments of Figs. 2 and 4 disclose wherein the first signal path 20 is phase shifted and the third signal path 24 is inverted (i.e. phase shifted by 180 degrees) and (in view of a broadest reasonable interpretation) would be covered by claim 1 in view of the first alternative limitation “wherein the alternating voltage excitation signal is fed into the first signal path with a phase offset compared to the alternating voltage excitation signal generated by the signal source.” The examiner notes Fig. 2 also imparts a phase shift into the third signal path by means of an inverter.
As best understood by the examiner, only Fig. 3 would be covered by the alternative limitation “wherein the alternating voltage excitation signal is fed into the second and third signal path at least temporarily with a phase offset compared to the alternating voltage excitation signal generated by the signal source.”
Therefore, claims 4-8 would not reasonably be include in the scope of claim 1 in view of a broadest reasonable interpretation since nine of these embodiments impose a phase shift on the first signal path or on the second AND third signal path. It is unclear to the examiner whether the signals in the second and third signal paths of Figs. 7-8 are interpreted as being “phase shifted” due to the opposite polarity of the diodes.
The examiner requests the applicant please clarify the language and/or provide an explanation as to the scope of protection sought and which embodiments are interpreted as reading on claim 1. No prior art was identified at the time of examination which teaches all limitations of claim 1.
Regarding claims 2-4, the claims are rejected for similar reasons as outlined above. Claim 2 recites first and second diodes which are only illustrated in the embodiments of Figs. 5-8, however, none of the embodiments of Figs. 5-8 impose a phase shift on the first signal path or on the second AND third signal path as recited in claim 1.
Claims 3-4 are rejected through a dependence on claim 2.
Regarding claim 10, the claim recites “further comprising at least one of a first analog-to-digital converter or a second analog-to-digital converter for digitizing the demodulated measurement signals.” Each embodiment discloses two ADCs. It is unclear how the invention would reasonably be implemented using only one ADC as recited in the claim in view of the disclosure. For the purpose of examination, the claims will be interpreted as “further comprising at least one of a first analog-to-digital converter AND a second analog-to-digital converter for digitizing the demodulated measurement signals.”
Claims not specifically rejected under 35 USC 103 are rejected through a dependence on rejected claim 1.
Allowable Subject Matter
No prior art was identified which teaches all limitations of claim 1. The IDS filed 1/27/2025 cites the written opinion from parent application PCT/EP2023/064093. The written opinion concludes the invention as claimed lacks novelty and inventive step in view of Figs. 6 and 8 of US 2,735,064 (Salzberg), however, Salzberg fails to teach a high-pass filter and, more specifically:
“wherein the first signal path comprises a high-pass filter and, in series therewith, the alternating current resistance to be measured;
wherein a measurement signal tapped at a measuring point between the high-pass filter and the alternating current resistance to be measured is mixed with the alternating voltage excitation signal in the second signal path and is furthermore demodulated in order to obtain a first demodulated measurement signal, and is mixed with the alternating voltage excitation signal in the third signal path and furthermore demodulated in order to obtain a second demodulated measurement signal;”
The written opinion concludes, “D1 does not disclose a high-pass filter. However, this difference cannot establish an inventive step. A person skilled in the art will use a high-pass filter if required, in order to avoid low-frequency interference signals, without exercising inventive skill.” While the examiner agrees it would generally be obvious to one of ordinary skill in the art to include a high-pass filter if desired to remove low-frequency/DC signals, it is not obvious to the examiner how one would include “a high-pass filter and, in series therewith, the alternating current resistance to be measured” in combination with the limitation “wherein a measurement signal tapped at a measuring point between the high-pass filter and the alternating current resistance to be measured”.
In Fig. 6 of Salzberg, mixers 16 and 17 are connected from the output of amplifier 21, the output of amplifier 23, and the output of phase shifter 90. It is not obvious to the examiner how to incorporate a high-pass filter into the embodiment of Fig. 6 to achieve the claimed limitation “a measurement signal tapped at a measuring point between the high-pass filter and the alternating current resistance…” for mixing with the second and third signal paths as recited in claim 1.
Likewise for Fig. 8 of Salzberg, it is not obvious to the examiner how to incorporate a high-pass filter into the embodiment of Fig. 8 to achieve the claimed limitation “a measurement signal tapped at a measuring point between the high-pass filter and the alternating current resistance…” for mixing with the second and third signal paths as recited in claim 1.
As best understood by the examiner, the high-pass filter comprises a capacitor and provides the benefit of “the measurement signal at the measuring point is separated from the DC component of the alternating voltage excitation signal via the high-pass filter and the two measuring capacitors” as recited in [0013] of the specification and “to achieve the largest possible voltage swing between the alternating voltage level of the measurement signal at a low measured impedance and a high measured impedance” as recited in [0041] of the specification.
Therefore, the claims stand rejected under 35 USC 112(b) as outlined above.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. See PTO-892.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to STEVEN LEE YENINAS whose telephone number is (571)270-0372. The examiner can normally be reached M - F 10 - 6.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Judy Nguyen can be reached at (571) 272-2258. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/STEVEN L YENINAS/Primary Examiner, Art Unit 2858
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