Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the claims at issue are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the reference application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP §§ 706.02(l)(1) - 706.02(l)(3) for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/forms/. The filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to http://www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp.
Claim 1, 8 and 15+20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 10 and 18 of U.S. Patent No. US 12176189 B2 (the ‘189 B2 patent) (Application #17602735). With respect to independent claims 1, 8 and 15+20 of the present application, although the claim at issue is not identical, they are not patentably distinct from each other because claims 1, 8 and 15+20 of the present application is anticipated by claims 1, 10 and 18 of the ‘189 B2 patent as shown in the table below. Claims 1, 8 and 15+20 of the present application is broader than that of claims 1, 10 and 18 of U.S. Patent US 12176189 B2, as shown in the table below:
Present Application (18956710)
US 12176189 B2
A method for determining a failure condition associated with a capacitor, comprising: controlling the capacitor to move in reverse by a first number of steps; computing a second number of steps taken by the capacitor to reach a position after the reversal, wherein the capacitor cannot move beyond the position; determining that the second number of steps is outside a preset range from the first
number of steps; incrementing a count upon determining that the second number of steps is outside the preset range from the first number of steps; and repeating said controlling, computing, determining, and incrementing upon determining that the second number of steps is outside the preset range from the first number of steps, wherein said repeating is performed until the count is at least equal to a threshold indicative of the failure condition associated with the capacitor.
1. A method for determining a failure condition associated with a capacitor, comprising: controlling a motor for a first time to move the capacitor to a home position (home position is considered as reverse because claim does not recite which direction is reverse), wherein at the home position, the capacitor has a highest capacitance or a lowest capacitance from a plurality of capacitances of the capacitor; recording, within a memory device, a first number of steps the motor took to move the capacitor to the home position; instructing the motor for the first time to move in reverse by the first number of steps; computing a second number of steps taken by the motor when the motor operates to move the capacitor for the first time to a position associated with a hard stop after the reversal, wherein the capacitor cannot move beyond the position associated with the hard stop; determining that the second number of steps is outside a preset range from the first number of steps; incrementing a count for the first time upon determining that the second number of steps is outside the preset range from the first number of steps; and repeating said instructing, computing, determining, and incrementing upon determining that the second number of steps is outside the preset range from the first number of steps, wherein said repeating includes: instructing the motor for a second time to move in reverse by the first number of steps; computing a third number of steps taken by the motor when the motor operates to move the capacitor for the second time to a position associated with the hard stop after the reversal; determining that the third number of steps is outside the preset range from the first number of steps; and incrementing the count for the second time upon determining that the third number of steps is outside the preset range from the first number of steps, wherein said repeating is performed until the count is at least equal to a threshold indicative of the failure condition associated with the capacitor.
8. A system controller for determining a failure condition associated with a capacitor,
comprising: a processor configured to: control the capacitor to move in reverse by a first number of steps; compute a second number of steps taken by the capacitor to reach a position after the reversal, wherein the capacitor cannot move beyond the position;
determine that the second number of steps is outside a preset range from the first number of steps; increment a count upon determining that the second number of steps is outside
the preset range from the first number of steps; and repeat the control of the capacitor, the computation, the determination, and the
increment of the count in response to determining that the second number of steps is outside the preset range from the first number of steps, wherein the repetition occurs until the count is at least equal to a threshold
indicative of the failure condition associated with the capacitor; and a memory device coupled to the processor.
10. A system controller for determining a failure condition associated with a capacitor, comprising: a memory device; and a processor coupled to the memory device, wherein the processor is configured to: control a motor for a first time to move the capacitor to a home position, wherein at the home position, the capacitor has a highest capacitance or a lowest capacitance from a plurality of capacitances of the capacitor; record, within the memory device, a first number of steps the motor took to move the capacitor to the home position; instruct the motor for the first time to move in reverse by the first number of steps; compute a second number of steps when the motor operates to move the capacitor for the first time to a position associated with a hard stop after the reversal, wherein the capacitor cannot move beyond the position associated with the hard stop; determine that the second number of steps is outside a preset range from the first number of steps; increment a count for the first time upon determining that the second number of steps is outside the preset range from the first number of steps; and repeat the instruction to the motor, the computation, the determination, and the increment upon determining that the second number of steps is outside the preset range from the first number of steps, wherein to repeat, the processor is configured to: instruct the motor for a second time to move in reverse by the first number of steps; compute a third number of steps taken by the motor when the motor operates to move the capacitor for the second time to a position associated with the hard stop after the reversal; determine that the third number of steps is outside the preset range from the first number of steps; and increment the count for the second time upon determining that the third number of steps is outside the preset range from the first number of steps, wherein the repetition is performed until the count is at least equal to a threshold indicative of the failure condition associated with the capacitor, wherein the memory device is configured to store the second number of steps.
15. A plasma tool for determining a failure condition associated with a capacitor,
comprising: a first radio frequency (RF) generator configured to generate a first RF signal; a second RF generator configured to generate a second RF signal; a combination of a plurality of match networks and a combiner and distributor configured to receive the first and second RF signals, wherein the combination includes the capacitor, wherein the combination is configured to output a plurality of combined RF signals based on the first and second RF signals; and a system controller coupled to the combination, wherein the system controller is configured to: control the capacitor to move in reverse by a first number of steps; compute a second number of steps taken by the capacitor to reach a position after the reversal, wherein the capacitor cannot move beyond the position; determine that the second number of steps is outside a preset range from the first number of steps; increment a count upon determining that the second number of steps is outside the preset range from the first number of steps; and repeat the control of the capacitor, the computation, the determination, and the increment of the count in response to determining that the second number of steps is outside the preset range from the first number of steps, wherein the repetition occurs until the count is at least equal to a threshold
indicative of the failure condition associated with the capacitor.
20. The plasma tool of claim 15, wherein the capacitor is controlled via an electric motor, wherein the preset range is an integer number of steps of the electric motor, wherein the combination includes: a first impedance matching network coupled to the first RF generator to receive the first RF signal to output a first modified RF signal; a second impedance matching network coupled to the second RF generator to receive the second RF signal to output a second modified RF signal; a combiner and distributor coupled to the first impedance matching network and the second impedance matching network to receive the first and second modified RF signals, wherein the combiner and distributor is configured to output the plurality of combined RF signals based on the first and second modified RF signals.
18. A plasma tool for determining a failure condition associated with a capacitor, comprising: a first radio frequency (RF) power supply configured to generate a first RF signal; a second RF power supply configured to generate a second RF signal; a first matching network coupled to the first RF power supply to receive the first RF signal to output a first modified RF signal; a second matching network coupled to the second RF power supply to receive the second RF signal to output a second modified RF signal; a combiner and distributor coupled to the first matching network and the second matching network to receive the first modified RF signal and the second modified RF signal to output a plurality of output signals, wherein the combiner and distributor includes the capacitor; a plurality of plasma stations coupled to the combiner and distributor to receive the plurality of output signals to process a plurality of substrates; and a system controller coupled to the combiner and distributor, wherein the system controller includes: a memory device; and a processor coupled to the memory device, wherein the processor is configured to: control a motor for a first time to move the capacitor to a home position, wherein at the home position, the capacitor has a highest capacitance or a lowest capacitance from a plurality of capacitances of the capacitor; record, within the memory device, a first number of steps the motor took to move the capacitor to the home position; instruct the motor for the first time to move in reverse by the first number of steps; compute a second number of steps when the motor operates to move the capacitor for the first time to a position associated with a hard stop after the reversal, wherein the capacitor cannot move beyond the position associated with the hard stop; determine that the second number of steps is outside a preset range from the first number of steps; increment a count for the first time upon determining that the second number of steps is outside the preset range from the first number of steps; and repeat the instruction to the motor, the computation, the determination, and the increment upon determining that the second number of steps is outside the preset range from the first number of steps, wherein to repeat, the processor is configured to: instruct the motor for a second time to move in reverse by the first number of steps; compute a third number of steps taken by the motor when the motor operates to move the capacitor for the second time to a position associated with the hard stop after the reversal; determine that the third number of steps is outside the preset range from the first number of steps; and increment the count for the second time upon determining that the third number of steps is outside the preset range from the first number of steps, wherein the repetition is performed until the count is at least equal to a threshold indicative of the failure condition associated with the capacitor, wherein the memory device is configured to store the second number of steps.
With respect to claim 1, 8 and 15+20 of the present application ‘710, the limitation “reverse” of the present application ‘710 is anticipated by home position (home position is considered as reverse because claim does not recite which direction is reverse) of patent ‘189 B2 as shown in the table above.
With respect to claims 1, 8 and 15+20, the patent ‘189 B2 claims 1, 10 and 18 discloses all of the elements of claim 1, 8 and 15+20 of the present application ‘710, with the exception that the present application, ‘710 does not disclose the underlined limitation in the patent ‘189 B2. The limitation in claims 1, 10 and 18 of the patent ‘189 B2 underlined in the table is not required by present application ‘710.
Therefore, the method and system of claims 1, 8 and 15+20 of the present application is anticipated by the method and system claims 1, 10 and 18 of the ‘189 B2 patent, respectively.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claims 1, 8 and 15 recites “controlling the capacitor to move in reverse by a first number of steps; determining that the second number of steps is outside a preset range from the first number of steps; incrementing a count upon determining that the second number of steps is outside the preset range from the first number of steps; and repeating said controlling, computing, determining, and incrementing upon determining that the second number of steps is outside the preset range from the first number of steps,.” The meaning of the language “controlling the capacitor to move in reverse” and “outside a preset range” is unclear. It is not clear what direction is the reverse direction and then which direction is forward direction. It is not clear how the capacitor is moved and the movement is controlled. It is not clear what is “first and second number of steps”. It is not clear what is considered as “a step” and how the step is counted. Is the step any measurement values or distance or any signal? It is not clear how the steps are repeating said controlling, computing, determining, and incrementing. It is not clear what range is considered as the outside of the preset range. Therefore, claim language is not clear.
For purposes of the present examination any direction is considered as reverse direction and the limitation “preset range” and “step” is construed to mean any range and any type of step. Clarification is required so that the scope of the claim is clear.
Claims 8 and 15 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention, because of the same reason as stated above for independent claim 1.
Claims 2-7, 9-14 and 16-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite by virtue of their dependence from claims 1, 8 and 15.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-14 are rejected under 35 U.S.C. 102 (a) (1) as being anticipated by ASHIDA in the US patent Application Publication Number US 20110214811 A1.
Regarding claim 1, ASHIDA teaches a method for determining a failure condition associated with a capacitor (semiconductor circuits and methods, and more particularly to a system and method for controlling a step motor; Paragraph [0001] Line 1-2), comprising:
controlling [90] the capacitor [80, 82] (a first stepwise capacitance varying mechanism for varying an electrostatic capacitance of the first variable capacitor in a stepwise manner; Paragraph [0018] Line 12-14; The controller 90 is configured to variably control electrostatic capacitances C.sub.1 and C.sub.2 (capacitance positions) of the first and the second variable capacitor 80 and 82 in a stepwise manner through the first and the second stepping motor 86 and 88 serving as the stepwise capacitance varying mechanisms; Paragraph [0054] Line 1-6) to move in reverse (The first and the second variable capacitor 80 and 82 each set capacitance positions of a predetermined number (e.g., 4000 steps) corresponding to electrostatic capacitances of a predetermined range (e.g., about 25 pF to 325 pF) and respectively vary the electrostatic capacitances C.sub.1 and C.sub.2 within the range of about 25 pF to 325 pF in a stepwise manner by selecting or moving in a stepwise manner the capacitance position between 0 to 4000; Paragraph [0055] Line 1-7; A circular plate-shaped lower electrode or susceptor for mounting thereon a target substrate, e.g., a semiconductor wafer W, is provided in the chamber 10; Paragraph [0038] Line 1-3; The controller 90 including a microcomputer controls the entire automatic matching operation, and transmits and receives required control signals and data to and from the main control unit 68 (see FIG. 1). The automatic matching unit 34 or 72 of the present embodiment is characterized by the function of the controller 90 in the automatic matching operation; Paragraph [0057] Line 1-7; automatic matching operation instruct the motor to move reverse direction) by a first number of steps ([0056] The matching point Z.sub.s in the automatic matching unit 34 or 72 is set to a resistance of about 50.OMEGA. (Z.sub.s=50+j0) which is equal to the output impedance of the RF power supply 32 or 70. Therefore, ZM.sub.s is 50 and Z.theta..sub.s is 0; Paragraph [0056] Line 1-5);
computing a second number of steps taken by the capacitor to reach a position after the reversal (The first and the second variable capacitor 80 and 82 each set capacitance positions of a predetermined number (e.g., 4000 steps) corresponding to electrostatic capacitances of a predetermined range (e.g., about 25 pF to 325 pF) and respectively vary the electrostatic capacitances C.sub.1 and C.sub.2 within the range of about 25 pF to 325 pF in a stepwise manner by selecting or moving in a stepwise manner the capacitance position between 0 to 4000; Paragraph [0055] Line 1-7);
wherein the capacitor cannot move beyond the position (Capacitor cannot move beyond position above 4000);
determining that the second number of steps is outside a preset range from the first number of steps (the measured absolute value ZM.sub.m and the measured phase Z.theta..sub.m of the load impedance Z obtained by the impedance measuring unit 84 at regular cycles become close to a predetermined reference absolute value ZM.sub.s and a predetermined phase reference value Z.theta..sub.s, respectively; Paragraph [0054] Line 6-10);
incrementing a count upon determining that the second number of steps is outside the preset range from the first number of steps (The first and the second variable capacitor 80 and 82 each set capacitance positions of a predetermined number (e.g., 4000 steps) corresponding to electrostatic capacitances of a predetermined range (e.g., about 25 pF to 325 pF) and respectively vary the electrostatic capacitances C.sub.1 and C.sub.2 within the range of about 25 pF to 325 pF in a stepwise manner by selecting or moving in a stepwise manner the capacitance position between 0 to 4000; Paragraph [0055] Line 1-8; Paragraph [0069]); and
repeating said controlling, instructing, counting, determining, and incrementing upon determining that the second number of steps is outside the preset range from the first number of steps (The first command pulse output unit 118 outputs a command pulse .DELTA.P.sub.1 converted from the operation amount .DELTA.C.sub.1 outputted from the first operation amount calculating unit 116. The first stepping motor 86 rotates by a rotation angle determined by the command pulse .DELTA.P.sub.1, so that the electrostatic capacitance C.sub.1 (C.sub.1 position) of the first variable capacitor 80 is changed in a stepwise manner by a desired value. Provided between the controller 90 and the first stepping motor 86 is a driving circuit (not shown) for driving the first stepping motor 86 in response to the command pulse .DELTA.P.sub.1 from the first command pulse output unit 118; Paragraph [0063] Line 1-11),
wherein said repeating is performed until the count is at least equal to a threshold indicative of the failure condition associated with the capacitor ([0065] In the second matching control unit 102, the phase error calculating unit 120 inputs the measured phase Z.theta..sub.m of the load impedance obtained by the impedance measuring unit and the reference phase Z.theta..sub.s obtained by the matching reference value setting unit 104, and calculates and outputs a phase error .delta..sub.Z.theta. corresponding to or in proportion to the difference therebetween (Z.theta..sub.s-Z.theta..sub.m). The second operation amount calculating unit 122 calculates an operation amount .DELTA.C.sub.2 corresponding to the phase error .delta..sub.Z.theta. outputted from the phase error calculating unit 120. [0066] Here, the operation amount .DELTA.C.sub.2 is obtained by a following equation (2) on the assumption that K.sub.2 denotes a proportional gain of the second matching control unit 102. .DELTA.C.sub.2=-K.sub.2*.delta..sub.Z.theta. Eq. (2) [0067] The second command pulse output unit 124 outputs a command pulse .DELTA.P.sub.2 converted from the operation amount .DELTA.C.sub.2 outputted from the second operation amount calculating unit 122. The stepping motor 88 rotates by a rotation angle specified by the command pulse .DELTA.P.sub.2, so that the electrostatic capacitance C.sub.2 (C.sub.2 position) of the second variable capacitor 82 is changed in a stepwise manner by a desired value. Provided between the controller 90 and the second stepping motor 88 is a driving circuit (not shown) for driving the second stepping motor 88 in response to the command pulse .DELTA.P.sub.2 outputted from the second command pulse output unit 124; Paragraph [0065]-[0067]).
Regarding claim 2, ASHIDA teaches a method,
wherein said controlling the capacitor to move in reverse includes controlling an electric motor [86, 88] to move in a first direction of rotation (The first stepping motor 86 rotates by a rotation angle determined by the command pulse .DELTA.P.sub.1, so that the electrostatic capacitance C.sub.1 (C.sub.1 position) of the first variable capacitor 80 is changed in a stepwise manner by a desired value. Provided between the controller 90 and the first stepping motor 86 is a driving circuit (not shown) for driving the first stepping motor 86 in response to the command pulse .DELTA.P.sub.1 from the first command pulse output unit 118; Paragraph [0063] Line 4-11),
wherein the first direction [0-4000] is opposite to a second direction [4000-0] of rotation of the electric motor [86] (The graphs in FIGS. 4A to 4E show the load impedance variation characteristics in the case of varying the capacitance position (C.sub.1 position) of the first variable capacitor 80 between 0 to 4000 (first direction) while fixing the capacitance position (C.sub.2 position) of the second variable capacitor 82 to 0, 1000, 2000, 3000 and 4000, respectively; Paragraph [0074] Line 1-6; Meanwhile, the graphs in FIGS. 5A to 5E show the load impedance variation characteristics in the case of varying the capacitance position (C.sub.2 position) of the second variable capacitor 82 between about 0 to 4000 while fixing the capacitance position (C.sub.1 position) of the first variable capacitor 80 to 4000, 3000, 2000, 1000 and 0, (second direction) respectively; Paragraph [0075] Line 1-6),
the method further comprising controlling the capacitor to move by the second number of steps (The stepping motor 88 rotates by a rotation angle specified by the command pulse .DELTA.P.sub.2, so that the electrostatic capacitance C.sub.2 (C.sub.2 position) of the second variable capacitor 82 is changed in a stepwise manner by a desired value. Provided between the controller 90 and the second stepping motor 88 is a driving circuit (not shown) for driving the second stepping motor 88 in response to the command pulse .DELTA.P.sub.2 outputted from the second command pulse output unit 124; Paragraph [0067] Line 4-12),
wherein said controlling the capacitor to move by the second number of steps includes controlling the electric motor to move in the second direction of rotation (The graphs in FIGS. 4A to 4E show the load impedance variation characteristics in the case of varying the capacitance position (C.sub.1 position) of the first variable capacitor 80 between 0 to 4000 while fixing the capacitance position (C.sub.2 position) of the second variable capacitor 82 to 0, 1000, 2000, 3000 and 4000, respectively; Paragraph [0074] Line 1-6; Meanwhile, the graphs in FIGS. 5A to 5E show the load impedance variation characteristics in the case of varying the capacitance position (C.sub.2 position) of the second variable capacitor 82 between about 0 to 4000 while fixing the capacitance position (C.sub.1 position) of the first variable capacitor 80 to 4000, 3000, 2000, 1000 and 0, respectively; Paragraph [0075] Line 1-6; In another example, the rotation angles of the first and the second stepping motor 86 and 88 may be monitored through an encoder (not shown), and the current capacitance positions and further the current electrostatic capacitances NC.sub.1 and NC.sub.2 of the first and the second variable capacitor 80 and 82 may be monitored based on the rotation angles of the motors; Paragraph [0069] Line 13-19).
Regarding claim 3, ASHIDA teaches a method,
wherein the position is a hard stop position (The first and the second electrostatic capacitance monitoring unit 108 and 110 respectively monitor current values NC.sub.1 and NC.sub.2 of the electrostatic capacitances C.sub.1 and C.sub.2 of the first and the second variable capacitor 80 and 82. In the present embodiment, the current capacitance positions of the first and the second stepping motor 86 and 88 are respectively obtained by counting (counting up or counting down) the command pulses .DELTA.P.sub.1 and LP.sub.2 outputted from the first and the second command pulse output unit 118 and 124 toward the first and the second stepping motor 86 and 88, and the current electrostatic capacitances NC.sub.1 and NC.sub.2 corresponding thereto are obtained from the current capacitance positions. In another example, the rotation angles of the first and the second stepping motor 86 and 88 may be monitored through an encoder (not shown), and the current capacitance positions and further the current electrostatic capacitances NC.sub.1 and NC.sub.2 of the first and the second variable capacitor 80 and 82 may be monitored based on the rotation angles of the motors; Paragraph [0069] Line 1-19; When capacitor 80 or 82 reaches position 4000 then capacitor stops moving and this position is the hard stop for the capacitor 80, 82. Because claim does not recite what is hard stop and when it happens. Therefore, the maximum position when capacitor stops moving to further point is considered as the hard stop),
wherein the capacitor [80, 82] includes a first plate and a second plate (Figure 2 shows that capacitor 80 and 82 has two plates: first plate and second plate),
wherein in the hard stop position, the first plate and the second plate cannot move closer to each other or away from each other (Hard stop is the position where capacitor cannot move to the next position and therefore no change is the capacitance value and therefore no change in the distance between the first plate and the second plate as the capacitor is not moving).
Regarding claim 4, ASHIDA teaches a method,
wherein the capacitor [80/82] is controlled via an electric motor [86/88] (The controller 90 is configured to variably control electrostatic capacitances C.sub.1 and C.sub.2 (capacitance positions) of the first and the second variable capacitor 80 and 82 in a stepwise manner through the first and the second stepping motor 86 and 88 serving as the stepwise capacitance varying mechanisms; Paragraph [0054] Line 1-6);
wherein the preset range is an integer number of steps of the electric motor (The first and the second variable capacitor 80 and 82 each set capacitance positions of a predetermined number (e.g., 4000 steps) (as the integer number of steps) corresponding to electrostatic capacitances of a predetermined range (e.g., about 25 pF to 325 pF) and respectively vary the electrostatic capacitances C.sub.1 and C.sub.2 within the range of about 25 pF to 325 pF in a stepwise manner by selecting or moving in a stepwise manner the capacitance position between 0 to 4000; Paragraph [0055] Line 1-8; In another example, the rotation angles of the first and the second stepping motor 86 and 88 may be monitored through an encoder (not shown), and the current capacitance positions and further the current electrostatic capacitances NC.sub.1 and NC.sub.2 of the first and the second variable capacitor 80 and 82 may be monitored based on the rotation angles of the motors; Paragraph [0069] Line 13-19).
Regarding claim 5, ASHIDA teaches a method,
further comprising generating a warning in response to determining that the failure condition is achieved (The first and the second electrostatic capacitance monitoring unit 108 and 110 respectively monitor current values NC.sub.1 and NC.sub.2 of the electrostatic capacitances C.sub.1 and C.sub.2 of the first and the second variable capacitor 80 and 82. In the present embodiment, the current capacitance positions of the first and the second stepping motor 86 and 88 are respectively obtained by counting (counting up or counting down) the command pulses .DELTA.P.sub.1 and LP.sub.2 outputted from the first and the second command pulse output unit 118 and 124 toward the first and the second stepping motor 86 and 88, and the current electrostatic capacitances NC.sub.1 and NC.sub.2 corresponding thereto are obtained from the current capacitance positions. In another example, the rotation angles of the first and the second stepping motor 86 and 88 may be monitored through an encoder (not shown), and the current capacitance positions and further the current electrostatic capacitances NC.sub.1 and NC.sub.2 of the first and the second variable capacitor 80 and 82 may be monitored based on the rotation angles of the motors; Paragraph [0069] Line 1-19).
Regarding claim 6, ASHIDA teaches a method,
further comprising avoiding said repeating upon determining that the second number of steps [4000-0] is within the preset range from the first number of steps [0 to 4000] (The graphs in FIGS. 4A to 4E show the load impedance variation characteristics in the case of varying the capacitance position (C.sub.1 position) of the first variable capacitor 80 between 0 to 4000 while fixing the capacitance position (C.sub.2 position) of the second variable capacitor 82 to 0, 1000, 2000, 3000 and 4000, respectively. [0074] Meanwhile, the graphs in FIGS. 5A to 5E show the load impedance variation characteristics in the case of varying the capacitance position (C.sub.2 position) of the second variable capacitor 82 between about 0 to 4000 while fixing the capacitance position (C.sub.1 position) of the first variable capacitor 80 to 4000, 3000, 2000, 1000 and 0, respectively; Paragraph [0075] Line 1-6; Therefore avoided said repeating upon determining that the second number of steps [4000-0] is within the preset range from the first number of steps [0 to 4000]).
Regarding claim 7, ASHIDA teaches a method,
wherein the capacitor [80/82] is controlled via an electric motor [86/88] (The controller 90 is configured to variably control electrostatic capacitances C.sub.1 and C.sub.2 (capacitance positions) of the first and the second variable capacitor 80 and 82 in a stepwise manner through the first and the second stepping motor 86 and 88 serving as the stepwise capacitance varying mechanisms; Paragraph [0054] Line 1-6);
wherein the first number of steps [0-4000] occur during a revolution of the electric motor and the second number of steps occur during a revolution of the electric motor (The first and the second variable capacitor 80 and 82 each set capacitance positions of a predetermined number (e.g., 4000 steps) (as the integer number of steps) corresponding to electrostatic capacitances of a predetermined range (e.g., about 25 pF to 325 pF) and respectively vary the electrostatic capacitances C.sub.1 and C.sub.2 within the range of about 25 pF to 325 pF in a stepwise manner by selecting or moving in a stepwise manner the capacitance position between 0 to 4000; Paragraph [0055] Line 1-8; In another example, the rotation angles of the first and the second stepping motor 86 and 88 may be monitored through an encoder (not shown), and the current capacitance positions and further the current electrostatic capacitances NC.sub.1 and NC.sub.2 of the first and the second variable capacitor 80 and 82 may be monitored based on the rotation angles of the motors; Paragraph [0069] Line 13-19).
Regarding claim 8, ASHIDA teaches a system controller for determining a failure condition associated with a capacitor (semiconductor circuits and methods, and more particularly to a system and method for controlling a step motor; Paragraph [0001] Line 1-2), comprising: a processor configured to:
control [90] the capacitor [80, 82] (a first stepwise capacitance varying mechanism for varying an electrostatic capacitance of the first variable capacitor in a stepwise manner; Paragraph [0018] Line 12-14; The controller 90 is configured to variably control electrostatic capacitances C.sub.1 and C.sub.2 (capacitance positions) of the first and the second variable capacitor 80 and 82 in a stepwise manner through the first and the second stepping motor 86 and 88 serving as the stepwise capacitance varying mechanisms; Paragraph [0054] Line 1-6) to move in reverse (The first and the second variable capacitor 80 and 82 each set capacitance positions of a predetermined number (e.g., 4000 steps) corresponding to electrostatic capacitances of a predetermined range (e.g., about 25 pF to 325 pF) and respectively vary the electrostatic capacitances C.sub.1 and C.sub.2 within the range of about 25 pF to 325 pF in a stepwise manner by selecting or moving in a stepwise manner the capacitance position between 0 to 4000; Paragraph [0055] Line 1-7; A circular plate-shaped lower electrode or susceptor for mounting thereon a target substrate, e.g., a semiconductor wafer W, is provided in the chamber 10; Paragraph [0038] Line 1-3; The controller 90 including a microcomputer controls the entire automatic matching operation, and transmits and receives required control signals and data to and from the main control unit 68 (see FIG. 1). The automatic matching unit 34 or 72 of the present embodiment is characterized by the function of the controller 90 in the automatic matching operation; Paragraph [0057] Line 1-7; automatic matching operation instruct the motor to move reverse direction) by a first number of steps ([0056] The matching point Z.sub.s in the automatic matching unit 34 or 72 is set to a resistance of about 50.OMEGA. (Z.sub.s=50+j0) which is equal to the output impedance of the RF power supply 32 or 70. Therefore, ZM.sub.s is 50 and Z.theta..sub.s is 0; Paragraph [0056] Line 1-5);
compute a second number of steps taken by the capacitor to reach a position after the reversal (The first and the second variable capacitor 80 and 82 each set capacitance positions of a predetermined number (e.g., 4000 steps) corresponding to electrostatic capacitances of a predetermined range (e.g., about 25 pF to 325 pF) and respectively vary the electrostatic capacitances C.sub.1 and C.sub.2 within the range of about 25 pF to 325 pF in a stepwise manner by selecting or moving in a stepwise manner the capacitance position between 0 to 4000; Paragraph [0055] Line 1-7);
wherein the capacitor cannot move beyond the position (Capacitor cannot move beyond position above 4000);
determine that the second number of steps is outside a preset range from the first number of steps (the measured absolute value ZM.sub.m and the measured phase Z.theta..sub.m of the load impedance Z obtained by the impedance measuring unit 84 at regular cycles become close to a predetermined reference absolute value ZM.sub.s and a predetermined phase reference value Z.theta..sub.s, respectively; Paragraph [0054] Line 6-10);
increment a count upon determining that the second number of steps is outside the preset range from the first number of steps (The first and the second variable capacitor 80 and 82 each set capacitance positions of a predetermined number (e.g., 4000 steps) corresponding to electrostatic capacitances of a predetermined range (e.g., about 25 pF to 325 pF) and respectively vary the electrostatic capacitances C.sub.1 and C.sub.2 within the range of about 25 pF to 325 pF in a stepwise manner by selecting or moving in a stepwise manner the capacitance position between 0 to 4000; Paragraph [0055] Line 1-8; Paragraph [0069]); and
repeat the control of the capacitor, the computation, the determination, and the increment of the count in response to determining that the second number of steps is outside the preset range from the first number of steps (The first command pulse output unit 118 outputs a command pulse .DELTA.P.sub.1 converted from the operation amount .DELTA.C.sub.1 outputted from the first operation amount calculating unit 116. The first stepping motor 86 rotates by a rotation angle determined by the command pulse .DELTA.P.sub.1, so that the electrostatic capacitance C.sub.1 (C.sub.1 position) of the first variable capacitor 80 is changed in a stepwise manner by a desired value. Provided between the controller 90 and the first stepping motor 86 is a driving circuit (not shown) for driving the first stepping motor 86 in response to the command pulse .DELTA.P.sub.1 from the first command pulse output unit 118; Paragraph [0063] Line 1-11),
wherein the repetition occurs until the count is at least equal to a threshold indicative of the failure condition associated with the capacitor ([0065] In the second matching control unit 102, the phase error calculating unit 120 inputs the measured phase Z.theta..sub.m of the load impedance obtained by the impedance measuring unit and the reference phase Z.theta..sub.s obtained by the matching reference value setting unit 104, and calculates and outputs a phase error .delta..sub.Z.theta. corresponding to or in proportion to the difference therebetween (Z.theta..sub.s-Z.theta..sub.m). The second operation amount calculating unit 122 calculates an operation amount .DELTA.C.sub.2 corresponding to the phase error .delta..sub.Z.theta. outputted from the phase error calculating unit 120. [0066] Here, the operation amount .DELTA.C.sub.2 is obtained by a following equation (2) on the assumption that K.sub.2 denotes a proportional gain of the second matching control unit 102. .DELTA.C.sub.2=-K.sub.2*.delta..sub.Z.theta. Eq. (2) [0067] The second command pulse output unit 124 outputs a command pulse .DELTA.P.sub.2 converted from the operation amount .DELTA.C.sub.2 outputted from the second operation amount calculating unit 122. The stepping motor 88 rotates by a rotation angle specified by the command pulse .DELTA.P.sub.2, so that the electrostatic capacitance C.sub.2 (C.sub.2 position) of the second variable capacitor 82 is changed in a stepwise manner by a desired value. Provided between the controller 90 and the second stepping motor 88 is a driving circuit (not shown) for driving the second stepping motor 88 in response to the command pulse .DELTA.P.sub.2 outputted from the second command pulse output unit 124; Paragraph [0065]-[0067]); and
a memory device coupled to the processor (the present invention provides an automatic matching method and an automatic matching unit capable of suppressing hunting reliably and effectively without causing unnecessary speed decrease, and a computer readable storage medium storing the automatic matching method; Paragraph [0011] Line 1-6; a computer readable storage medium has the processor and memory and memory is coupled to the processor).
Regarding claim 9, ASHIDA teaches a system controller,
wherein to control the capacitor, the processor is configured to control an electric motor [86/88] to move in a first direction of rotation (The first stepping motor 86 rotates by a rotation angle determined by the command pulse .DELTA.P.sub.1, so that the electrostatic capacitance C.sub.1 (C.sub.1 position) of the first variable capacitor 80 is changed in a stepwise manner by a desired value. Provided between the controller 90 and the first stepping motor 86 is a driving circuit (not shown) for driving the first stepping motor 86 in response to the command pulse .DELTA.P.sub.1 from the first command pulse output unit 118; Paragraph [0063] Line 4-11),
wherein the first direction [0-4000] is opposite to a second direction [4000-0] of rotation of the electric motor [88/86] (The graphs in FIGS. 4A to 4E show the load impedance variation characteristics in the case of varying the capacitance position (C.sub.1 position) of the first variable capacitor 80 between 0 to 4000 (first direction) while fixing the capacitance position (C.sub.2 position) of the second variable capacitor 82 to 0, 1000, 2000, 3000 and 4000, respectively; Paragraph [0074] Line 1-6; Meanwhile, the graphs in FIGS. 5A to 5E show the load impedance variation characteristics in the case of varying the capacitance position (C.sub.2 position) of the second variable capacitor 82 between about 0 to 4000 while fixing the capacitance position (C.sub.1 position) of the first variable capacitor 80 to 4000, 3000, 2000, 1000 and 0, (second direction) respectively; Paragraph [0075] Line 1-6),
wherein the processor (driving circuit) is configured to control the capacitor to move by the second number of steps (The stepping motor 88 rotates by a rotation angle specified by the command pulse .DELTA.P.sub.2, so that the electrostatic capacitance C.sub.2 (C.sub.2 position) of the second variable capacitor 82 is changed in a stepwise manner by a desired value. Provided between the controller 90 and the second stepping motor 88 is a driving circuit (not shown) for driving the second stepping motor 88 in response to the command pulse .DELTA.P.sub.2 outputted from the second command pulse output unit 124; Paragraph [0067] Line 4-12),
wherein to control the capacitor to move by the second number of steps the processor is configured to control the electric motor to move in the second direction of rotation (The graphs in FIGS. 4A to 4E show the load impedance variation characteristics in the case of varying the capacitance position (C.sub.1 position) of the first variable capacitor 80 between 0 to 4000 while fixing the capacitance position (C.sub.2 position) of the second variable capacitor 82 to 0, 1000, 2000, 3000 and 4000, respectively; Paragraph [0074] Line 1-6; Meanwhile, the graphs in FIGS. 5A to 5E show the load impedance variation characteristics in the case of varying the capacitance position (C.sub.2 position) of the second variable capacitor 82 between about 0 to 4000 while fixing the capacitance position (C.sub.1 position) of the first variable capacitor 80 to 4000, 3000, 2000, 1000 and 0, respectively; Paragraph [0075] Line 1-6; In another example, the rotation angles of the first and the second stepping motor 86 and 88 may be monitored through an encoder (not shown), and the current capacitance positions and further the current electrostatic capacitances NC.sub.1 and NC.sub.2 of the first and the second variable capacitor 80 and 82 may be monitored based on the rotation angles of the motors; Paragraph [0069] Line 13-19).
Regarding claim 10, ASHIDA teaches a system controller,
wherein the position is a hard stop position (The first and the second electrostatic capacitance monitoring unit 108 and 110 respectively monitor current values NC.sub.1 and NC.sub.2 of the electrostatic capacitances C.sub.1 and C.sub.2 of the first and the second variable capacitor 80 and 82. In the present embodiment, the current capacitance positions of the first and the second stepping motor 86 and 88 are respectively obtained by counting (counting up or counting down) the command pulses .DELTA.P.sub.1 and LP.sub.2 outputted from the first and the second command pulse output unit 118 and 124 toward the first and the second stepping motor 86 and 88, and the current electrostatic capacitances NC.sub.1 and NC.sub.2 corresponding thereto are obtained from the current capacitance positions. In another example, the rotation angles of the first and the second stepping motor 86 and 88 may be monitored through an encoder (not shown), and the current capacitance positions and further the current electrostatic capacitances NC.sub.1 and NC.sub.2 of the first and the second variable capacitor 80 and 82 may be monitored based on the rotation angles of the motors; Paragraph [0069] Line 1-19; When capacitor 80 or 82 reaches position 4000 then capacitor stops moving and this position is the hard stop for the capacitor 80, 82. Because claim does not recite what is hard stop and when it happens. Therefore, the maximum position when capacitor stops moving to further point is considered as the hard stop),
wherein the capacitor [80, 82] includes a first plate and a second plate (Figure 2 shows that capacitor 80 and 82 has two plates: first plate and second plate),
wherein in the hard stop position, the first plate and the second plate cannot move closer to each other or away from each other (Hard stop is the position where capacitor cannot move to the next position and therefore no change is the capacitance value and therefore no change in the distance between the first plate and the second plate as the capacitor is not moving).
Regarding claim 11, ASHIDA teaches a system controller,
wherein the capacitor [80/82] is controlled via an electric motor [86/88] (The controller 90 is configured to variably control electrostatic capacitances C.sub.1 and C.sub.2 (capacitance positions) of the first and the second variable capacitor 80 and 82 in a stepwise manner through the first and the second stepping motor 86 and 88 serving as the stepwise capacitance varying mechanisms; Paragraph [0054] Line 1-6);
wherein the preset range is an integer number of steps of the electric motor (The first and the second variable capacitor 80 and 82 each set capacitance positions of a predetermined number (e.g., 4000 steps) (as the integer number of steps) corresponding to electrostatic capacitances of a predetermined range (e.g., about 25 pF to 325 pF) and respectively vary the electrostatic capacitances C.sub.1 and C.sub.2 within the range of about 25 pF to 325 pF in a stepwise manner by selecting or moving in a stepwise manner the capacitance position between 0 to 4000; Paragraph [0055] Line 1-8; In another example, the rotation angles of the first and the second stepping motor 86 and 88 may be monitored through an encoder (not shown), and the current capacitance positions and further the current electrostatic capacitances NC.sub.1 and NC.sub.2 of the first and the second variable capacitor 80 and 82 may be monitored based on the rotation angles of the motors; Paragraph [0069] Line 13-19).
Regarding claim 12, ASHIDA teaches a system controller,
wherein the processor is configured to generate a warning in response to determining that the failure condition is achieved (The first and the second electrostatic capacitance monitoring unit 108 and 110 respectively monitor current values NC.sub.1 and NC.sub.2 of the electrostatic capacitances C.sub.1 and C.sub.2 of the first and the second variable capacitor 80 and 82. In the present embodiment, the current capacitance positions of the first and the second stepping motor 86 and 88 are respectively obtained by counting (counting up or counting down) the command pulses .DELTA.P.sub.1 and LP.sub.2 outputted from the first and the second command pulse output unit 118 and 124 toward the first and the second stepping motor 86 and 88, and the current electrostatic capacitances NC.sub.1 and NC.sub.2 corresponding thereto are obtained from the current capacitance positions. In another example, the rotation angles of the first and the second stepping motor 86 and 88 may be monitored through an encoder (not shown), and the current capacitance positions and further the current electrostatic capacitances NC.sub.1 and NC.sub.2 of the first and the second variable capacitor 80 and 82 may be monitored based on the rotation angles of the motors; Paragraph [0069] Line 1-19).
Regarding claim 13, ASHIDA teaches a system controller,
wherein the processor is configured to avoid the repetition in response to determining that the second number of steps [4000-0] is within the preset range from the first number of steps [0 to 4000] (The graphs in FIGS. 4A to 4E show the load impedance variation characteristics in the case of varying the capacitance position (C.sub.1 position) of the first variable capacitor 80 between 0 to 4000 while fixing the capacitance position (C.sub.2 position) of the second variable capacitor 82 to 0, 1000, 2000, 3000 and 4000, respectively. [0074] Meanwhile, the graphs in FIGS. 5A to 5E show the load impedance variation characteristics in the case of varying the capacitance position (C.sub.2 position) of the second variable capacitor 82 between about 0 to 4000 while fixing the capacitance position (C.sub.1 position) of the first variable capacitor 80 to 4000, 3000, 2000, 1000 and 0, respectively; Paragraph [0075] Line 1-6; Therefore avoided said repeating upon determining that the second number of steps [4000-0] is within the preset range from the first number of steps [0 to 4000]).
Regarding claim 14, ASHIDA teaches a system controller,
wherein the capacitor [80/82] is controlled via an electric motor [86/88] (The controller 90 is configured to variably control electrostatic capacitances C.sub.1 and C.sub.2 (capacitance positions) of the first and the second variable capacitor 80 and 82 in a stepwise manner through the first and the second stepping motor 86 and 88 serving as the stepwise capacitance varying mechanisms; Paragraph [0054] Line 1-6);
wherein the first number of steps [0-4000] occur during a revolution of the electric motor and the second number of steps occur during a revolution of the electric motor (The first and the second variable capacitor 80 and 82 each set capacitance positions of a predetermined number (e.g., 4000 steps) (as the integer number of steps) corresponding to electrostatic capacitances of a predetermined range (e.g., about 25 pF to 325 pF) and respectively vary the electrostatic capacitances C.sub.1 and C.sub.2 within the range of about 25 pF to 325 pF in a stepwise manner by selecting or moving in a stepwise manner the capacitance position between 0 to 4000; Paragraph [0055] Line 1-8; In another example, the rotation angles of the first and the second stepping motor 86 and 88 may be monitored through an encoder (not shown), and the current capacitance positions and further the current electrostatic capacitances NC.sub.1 and NC.sub.2 of the first and the second variable capacitor 80 and 82 may be monitored based on the rotation angles of the motors; Paragraph [0069] Line 13-19).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 15-20 are rejected under 35 U.S.C. 103 as being unpatentable over ASHIDA in the US patent Application Publication Number US 20110214811 A1 in view of Kapoor et al. (Hereinafter, “Kapoor”) in the US patent Application Publication Number US 20170365907 A1.
Regarding claim 15, ASHIDA teaches a plasma tool for determining a failure condition associated with a capacitor (semiconductor circuits and methods, and more particularly to a system and method for controlling a step motor; Paragraph [0001] Line 1-2; a plasma processing apparatus capable of improving functions of plasma generation using a RF power and ion attraction control by improving an automatic matching function and further capable of improving reproducibility and reliability of a plasma process; Paragraph [0012] Line 1-4), comprising:
a first radio frequency (RF) generator [32] configured to generate a first RF signal (A first RF power supply 32 for plasma generation is electrically connected to the susceptor 12 via a first matching unit (MU) 34 and a power feed rod 36. The RF power supply 32 outputs a first RF power RF.sub.H having a predetermined frequency of, e.g., about 40 MHz, adequate to generation of a capacitively coupled plasma.; Paragraph [0040] Line 1-6);
a second RF generator [70] configured to generate a second RF signal (a second RF power supply 70 for ion attraction is electrically connected to the susceptor 12 via a second matching unit 72 and the power feed rod 36. The second RF power supply 70 outputs a second RF power RF.sub.L having a predetermined frequency of, e.g., 3.2 MHz, adequate to control energy of ions attracted toward the semiconductor wafer W on the susceptor 12; Paragraph [0041] Line 1-7);
a combination of a plurality of match networks [34, 72] (A first RF power supply 32 for plasma generation is electrically connected to the susceptor 12 via a first matching unit (MU) 34 and a power feed rod 36. The RF power supply 32 outputs a first RF power RF.sub.H having a predetermined frequency of, e.g., about 40 MHz, adequate to generation of a capacitively coupled plasma.; Paragraph [0040] Line 1-6; a second RF power supply 70 for ion attraction is electrically connected to the susceptor 12 via a second matching unit 72 and the power feed rod 36. The second RF power supply 70 outputs a second RF power RF.sub.L having a predetermined frequency of, e.g., 3.2 MHz, adequate to control energy of ions attracted toward the semiconductor wafer W on the susceptor 12; Paragraph [0041] Line 1-7);
a system controller [90] (The controller 90 is configured to variably control electrostatic capacitances C.sub.1 and C.sub.2 (capacitance positions) of the first and the second variable capacitor 80 and 82; Paragraph [0054] Line 1-3), wherein the system controller configured to:
control [90] the capacitor [80, 82] (a first stepwise capacitance varying mechanism for varying an electrostatic capacitance of the first variable capacitor in a stepwise manner; Paragraph [0018] Line 12-14; The controller 90 is configured to variably control electrostatic capacitances C.sub.1 and C.sub.2 (capacitance positions) of the first and the second variable capacitor 80 and 82 in a stepwise manner through the first and the second stepping motor 86 and 88 serving as the stepwise capacitance varying mechanisms; Paragraph [0054] Line 1-6) to move in reverse (The first and the second variable capacitor 80 and 82 each set capacitance positions of a predetermined number (e.g., 4000 steps) corresponding to electrostatic capacitances of a predetermined range (e.g., about 25 pF to 325 pF) and respectively vary the electrostatic capacitances C.sub.1 and C.sub.2 within the range of about 25 pF to 325 pF in a stepwise manner by selecting or moving in a stepwise manner the capacitance position between 0 to 4000; Paragraph [0055] Line 1-7; A circular plate-shaped lower electrode or susceptor for mounting thereon a target substrate, e.g., a semiconductor wafer W, is provided in the chamber 10; Paragraph [0038] Line 1-3; The controller 90 including a microcomputer controls the entire automatic matching operation, and transmits and receives required control signals and data to and from the main control unit 68 (see FIG. 1). The automatic matching unit 34 or 72 of the present embodiment is characterized by the function of the controller 90 in the automatic matching operation; Paragraph [0057] Line 1-7; automatic matching operation instruct the motor to move reverse direction) by a first number of steps ([0056] The matching point Z.sub.s in the automatic matching unit 34 or 72 is set to a resistance of about 50.OMEGA. (Z.sub.s=50+j0) which is equal to the output impedance of the RF power supply 32 or 70. Therefore, ZM.sub.s is 50 and Z.theta..sub.s is 0; Paragraph [0056] Line 1-5);
compute a second number of steps taken by the capacitor to reach a position after the reversal (The first and the second variable capacitor 80 and 82 each set capacitance positions of a predetermined number (e.g., 4000 steps) corresponding to electrostatic capacitances of a predetermined range (e.g., about 25 pF to 325 pF) and respectively vary the electrostatic capacitances C.sub.1 and C.sub.2 within the range of about 25 pF to 325 pF in a stepwise manner by selecting or moving in a stepwise manner the capacitance position between 0 to 4000; Paragraph [0055] Line 1-7);
wherein the capacitor cannot move beyond the position (Capacitor cannot move beyond position above 4000);
determine that the second number of steps is outside a preset range from the first number of steps (the measured absolute value ZM.sub.m and the measured phase Z.theta..sub.m of the load impedance Z obtained by the impedance measuring unit 84 at regular cycles become close to a predetermined reference absolute value ZM.sub.s and a predetermined phase reference value Z.theta..sub.s, respectively; Paragraph [0054] Line 6-10);
increment a count upon determining that the second number of steps is outside the preset range from the first number of steps (The first and the second variable capacitor 80 and 82 each set capacitance positions of a predetermined number (e.g., 4000 steps) corresponding to electrostatic capacitances of a predetermined range (e.g., about 25 pF to 325 pF) and respectively vary the electrostatic capacitances C.sub.1 and C.sub.2 within the range of about 25 pF to 325 pF in a stepwise manner by selecting or moving in a stepwise manner the capacitance position between 0 to 4000; Paragraph [0055] Line 1-8; Paragraph [0069]); and
repeat the control of the capacitor, the computation, the determination, and the increment of the count in response to determining that the second number of steps is outside the preset range from the first number of steps (The first command pulse output unit 118 outputs a command pulse .DELTA.P.sub.1 converted from the operation amount .DELTA.C.sub.1 outputted from the first operation amount calculating unit 116. The first stepping motor 86 rotates by a rotation angle determined by the command pulse .DELTA.P.sub.1, so that the electrostatic capacitance C.sub.1 (C.sub.1 position) of the first variable capacitor 80 is changed in a stepwise manner by a desired value. Provided between the controller 90 and the first stepping motor 86 is a driving circuit (not shown) for driving the first stepping motor 86 in response to the command pulse .DELTA.P.sub.1 from the first command pulse output unit 118; Paragraph [0063] Line 1-11),
wherein the repetition occurs until the count is at least equal to a threshold indicative of the failure condition associated with the capacitor ([0065] In the second matching control unit 102, the phase error calculating unit 120 inputs the measured phase Z.theta..sub.m of the load impedance obtained by the impedance measuring unit and the reference phase Z.theta..sub.s obtained by the matching reference value setting unit 104, and calculates and outputs a phase error .delta..sub.Z.theta. corresponding to or in proportion to the difference therebetween (Z.theta..sub.s-Z.theta..sub.m). The second operation amount calculating unit 122 calculates an operation amount .DELTA.C.sub.2 corresponding to the phase error .delta..sub.Z.theta. outputted from the phase error calculating unit 120. [0066] Here, the operation amount .DELTA.C.sub.2 is obtained by a following equation (2) on the assumption that K.sub.2 denotes a proportional gain of the second matching control unit 102. .DELTA.C.sub.2=-K.sub.2*.delta..sub.Z.theta. Eq. (2) [0067] The second command pulse output unit 124 outputs a command pulse .DELTA.P.sub.2 converted from the operation amount .DELTA.C.sub.2 outputted from the second operation amount calculating unit 122. The stepping motor 88 rotates by a rotation angle specified by the command pulse .DELTA.P.sub.2, so that the electrostatic capacitance C.sub.2 (C.sub.2 position) of the second variable capacitor 82 is changed in a stepwise manner by a desired value. Provided between the controller 90 and the second stepping motor 88 is a driving circuit (not shown) for driving the second stepping motor 88 in response to the command pulse .DELTA.P.sub.2 outputted from the second command pulse output unit 124; Paragraph [0065]-[0067]).
ASHIDA fails to teach a combiner and distributor configured to receive the first and second RF signals, wherein the combination includes the capacitor, wherein the combination is configured to output a plurality of combined RF signals based on the first and second RF signals.
Kapoor teaches systems and methods for adjusting impedances or power or a combination thereof across multiple plasma processing stations (Paragraph [0009] Line 1-3), wherein
a combiner and distributor [121] configured to receive the first RF signal and the second RF signal (FIG. 1 illustrates a substrate processing system 100, which is an example of the PECVD system used to process a wafer 101. The substrate processing system 100 includes a plasma chamber 102 having a lower chamber portion 102b and an upper chamber portion 102a. A center column is configured to support a pedestal 140, which in one embodiment includes a powered lower electrode. The pedestal 140 is electrically coupled to a combiner and distributor 121, which is further coupled to multiple match networks 106; Paragraph [0036] Line 1-9);
wherein the combination includes the capacitor (FIG. 1 illustrates a substrate processing system 100, which is an example of the PECVD system used to process a wafer 101. The substrate processing system 100 includes a plasma chamber 102 having a lower chamber portion 102b and an upper chamber portion 102a. A center column is configured to support a pedestal 140, which in one embodiment includes a powered lower electrode. The pedestal 140 is electrically coupled to a combiner and distributor 121, which is further coupled to multiple match networks 106; Paragraph [0036] Line 1-9);
wherein the combination is configured to output a plurality of combined RF signals based on the first and second RF signals (A first output OUT#1 of the combiner and distributor 121 is coupled via a coaxial cable 416A to the station 1, e.g., the showerhead 150 of the station 1 or the pedestal 140 of the station 1, etc. Moreover, a second output OUT#2 of the combiner and distributor 121 is coupled via a coaxial cable 416B to the station 2, e.g., the showerhead 150 of the station 2 or the pedestal 140 of the station 2, etc. A third output OUT#3 of the combiner and distributor 121 is coupled via a coaxial cable 416C to the station 3, e.g., the showerhead 150 of the station 3 or the pedestal 140 of the station 3, etc. Moreover, a fourth output OUT#4 of the combiner and distributor 121 is coupled via a coaxial cable 416D to the station 4, e.g., the showerhead 150 of the station 4 or the pedestal 140 of the station 4, etc.; Paragraph [0051] Line 1-14). The purpose of doing so is to provide for multiple frequencies with adequate tuning range to accommodate a variety of impedance transformations in the substrate stations during a multi-step process, to receive multiple non 50 ohm power signals with various impedance ranges and various power levels as inputs from active tuning matching networks outputs., to divert power to dummy impedances for the substrate stations not needing power, to introduces signals of the multiple frequencies to each of the substrate stations, to vary the signals of the multiple frequencies to each of the substrate stations, to isolate the frequencies from each other and to minimize feedback to inputs of the combiner and distributor.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention, to modify ASHIDA in view of Kapoor, because Kapoor teaches to include a combiner and distributor provides for multiple frequencies with adequate tuning range to accommodate a variety of impedance transformations in the substrate stations during a multi-step process, receives multiple non 50 ohm power signals with various impedance ranges and various power levels as inputs from active tuning matching networks outputs., diverts power to dummy impedances for the substrate stations not needing power, introduces signals of the multiple frequencies to each of the substrate stations, varies the signals of the multiple frequencies to each of the substrate stations, isolates the frequencies from each other and to minimize feedback to inputs of the combiner and distributor (Paragraph [0009]).
Regarding claim 16, ASHIDA teaches a plasma tool,
wherein to control the capacitor, the system controller [90] is configured to control an electric motor [86/88] to move in a first direction of rotation (The first stepping motor 86 rotates by a rotation angle determined by the command pulse .DELTA.P.sub.1, so that the electrostatic capacitance C.sub.1 (C.sub.1 position) of the first variable capacitor 80 is changed in a stepwise manner by a desired value. Provided between the controller 90 and the first stepping motor 86 is a driving circuit (not shown) for driving the first stepping motor 86 in response to the command pulse .DELTA.P.sub.1 from the first command pulse output unit 118; Paragraph [0063] Line 4-11),
wherein the first direction [0-4000] is opposite to a second direction [4000-0] of rotation of the electric motor [88/86] (The graphs in FIGS. 4A to 4E show the load impedance variation characteristics in the case of varying the capacitance position (C.sub.1 position) of the first variable capacitor 80 between 0 to 4000 (first direction) while fixing the capacitance position (C.sub.2 position) of the second variable capacitor 82 to 0, 1000, 2000, 3000 and 4000, respectively; Paragraph [0074] Line 1-6; Meanwhile, the graphs in FIGS. 5A to 5E show the load impedance variation characteristics in the case of varying the capacitance position (C.sub.2 position) of the second variable capacitor 82 between about 0 to 4000 while fixing the capacitance position (C.sub.1 position) of the first variable capacitor 80 to 4000, 3000, 2000, 1000 and 0, (second direction) respectively; Paragraph [0075] Line 1-6),
wherein the system controller [90] is configured to control the capacitor to move by the second number of steps (The stepping motor 88 rotates by a rotation angle specified by the command pulse .DELTA.P.sub.2, so that the electrostatic capacitance C.sub.2 (C.sub.2 position) of the second variable capacitor 82 is changed in a stepwise manner by a desired value. Provided between the controller 90 and the second stepping motor 88 is a driving circuit (not shown) for driving the second stepping motor 88 in response to the command pulse .DELTA.P.sub.2 outputted from the second command pulse output unit 124; Paragraph [0067] Line 4-12),
wherein to control the capacitor to move by the second number of steps the processor is configured to control the electric motor to move in the second direction of rotation (The graphs in FIGS. 4A to 4E show the load impedance variation characteristics in the case of varying the capacitance position (C.sub.1 position) of the first variable capacitor 80 between 0 to 4000 while fixing the capacitance position (C.sub.2 position) of the second variable capacitor 82 to 0, 1000, 2000, 3000 and 4000, respectively; Paragraph [0074] Line 1-6; Meanwhile, the graphs in FIGS. 5A to 5E show the load impedance variation characteristics in the case of varying the capacitance position (C.sub.2 position) of the second variable capacitor 82 between about 0 to 4000 while fixing the capacitance position (C.sub.1 position) of the first variable capacitor 80 to 4000, 3000, 2000, 1000 and 0, respectively; Paragraph [0075] Line 1-6; In another example, the rotation angles of the first and the second stepping motor 86 and 88 may be monitored through an encoder (not shown), and the current capacitance positions and further the current electrostatic capacitances NC.sub.1 and NC.sub.2 of the first and the second variable capacitor 80 and 82 may be monitored based on the rotation angles of the motors; Paragraph [0069] Line 13-19).
Regarding claim 17, ASHIDA teaches a plasma tool,
wherein the position is a hard stop position (The first and the second electrostatic capacitance monitoring unit 108 and 110 respectively monitor current values NC.sub.1 and NC.sub.2 of the electrostatic capacitances C.sub.1 and C.sub.2 of the first and the second variable capacitor 80 and 82. In the present embodiment, the current capacitance positions of the first and the second stepping motor 86 and 88 are respectively obtained by counting (counting up or counting down) the command pulses .DELTA.P.sub.1 and LP.sub.2 outputted from the first and the second command pulse output unit 118 and 124 toward the first and the second stepping motor 86 and 88, and the current electrostatic capacitances NC.sub.1 and NC.sub.2 corresponding thereto are obtained from the current capacitance positions. In another example, the rotation angles of the first and the second stepping motor 86 and 88 may be monitored through an encoder (not shown), and the current capacitance positions and further the current electrostatic capacitances NC.sub.1 and NC.sub.2 of the first and the second variable capacitor 80 and 82 may be monitored based on the rotation angles of the motors; Paragraph [0069] Line 1-19; When capacitor 80 or 82 reaches position 4000 then capacitor stops moving and this position is the hard stop for the capacitor 80, 82. Because claim does not recite what is hard stop and when it happens. Therefore, the maximum position when capacitor stops moving to further point is considered as the hard stop),
wherein the capacitor [80, 82] includes a first plate and a second plate (Figure 2 shows that capacitor 80 and 82 has two plates: first plate and second plate),
wherein in the hard stop position, the first plate and the second plate cannot move closer to each other or away from each other (Hard stop is the position where capacitor cannot move to the next position and therefore no change is the capacitance value and therefore no change in the distance between the first plate and the second plate as the capacitor is not moving).
Regarding claim 18, ASHIDA teaches a plasma tool,
wherein the system controller [90] is configured to generate a warning in response to determining that the failure condition is achieved (The first and the second electrostatic capacitance monitoring unit 108 and 110 respectively monitor current values NC.sub.1 and NC.sub.2 of the electrostatic capacitances C.sub.1 and C.sub.2 of the first and the second variable capacitor 80 and 82. In the present embodiment, the current capacitance positions of the first and the second stepping motor 86 and 88 are respectively obtained by counting (counting up or counting down) the command pulses .DELTA.P.sub.1 and LP.sub.2 outputted from the first and the second command pulse output unit 118 and 124 toward the first and the second stepping motor 86 and 88, and the current electrostatic capacitances NC.sub.1 and NC.sub.2 corresponding thereto are obtained from the current capacitance positions. In another example, the rotation angles of the first and the second stepping motor 86 and 88 may be monitored through an encoder (not shown), and the current capacitance positions and further the current electrostatic capacitances NC.sub.1 and NC.sub.2 of the first and the second variable capacitor 80 and 82 may be monitored based on the rotation angles of the motors; Paragraph [0069] Line 1-19).
Regarding claim 19, ASHIDA teaches a system controller,
wherein the system controller [90] is configured to avoid the repetition in response to determining that the second number of steps [4000-0] is within the preset range from the first number of steps [0 to 4000] (The graphs in FIGS. 4A to 4E show the load impedance variation characteristics in the case of varying the capacitance position (C.sub.1 position) of the first variable capacitor 80 between 0 to 4000 while fixing the capacitance position (C.sub.2 position) of the second variable capacitor 82 to 0, 1000, 2000, 3000 and 4000, respectively. [0074] Meanwhile, the graphs in FIGS. 5A to 5E show the load impedance variation characteristics in the case of varying the capacitance position (C.sub.2 position) of the second variable capacitor 82 between about 0 to 4000 while fixing the capacitance position (C.sub.1 position) of the first variable capacitor 80 to 4000, 3000, 2000, 1000 and 0, respectively; Paragraph [0075] Line 1-6; Therefore avoided said repeating upon determining that the second number of steps [4000-0] is within the preset range from the first number of steps [0 to 4000]),
wherein the capacitor [80/82] is controlled via an electric motor [86/88] (The controller 90 is configured to variably control electrostatic capacitances C.sub.1 and C.sub.2 (capacitance positions) of the first and the second variable capacitor 80 and 82 in a stepwise manner through the first and the second stepping motor 86 and 88 serving as the stepwise capacitance varying mechanisms; Paragraph [0054] Line 1-6);
wherein the first number of steps [0-4000] occur during a revolution of the electric motor and the second number of steps occur during a revolution of the electric motor (The first and the second variable capacitor 80 and 82 each set capacitance positions of a predetermined number (e.g., 4000 steps) (as the integer number of steps) corresponding to electrostatic capacitances of a predetermined range (e.g., about 25 pF to 325 pF) and respectively vary the electrostatic capacitances C.sub.1 and C.sub.2 within the range of about 25 pF to 325 pF in a stepwise manner by selecting or moving in a stepwise manner the capacitance position between 0 to 4000; Paragraph [0055] Line 1-8; In another example, the rotation angles of the first and the second stepping motor 86 and 88 may be monitored through an encoder (not shown), and the current capacitance positions and further the current electrostatic capacitances NC.sub.1 and NC.sub.2 of the first and the second variable capacitor 80 and 82 may be monitored based on the rotation angles of the motors; Paragraph [0069] Line 13-19).
Regarding claim 20, ASHIDA teaches a plasma tool,
wherein the capacitor [80/82] is controlled via an electric motor [86/88] (The controller 90 is configured to variably control electrostatic capacitances C.sub.1 and C.sub.2 (capacitance positions) of the first and the second variable capacitor 80 and 82 in a stepwise manner through the first and the second stepping motor 86 and 88 serving as the stepwise capacitance varying mechanisms; Paragraph [0054] Line 1-6);
wherein the preset range is an integer number of steps of the electric motor (The first and the second variable capacitor 80 and 82 each set capacitance positions of a predetermined number (e.g., 4000 steps) (as the integer number of steps) corresponding to electrostatic capacitances of a predetermined range (e.g., about 25 pF to 325 pF) and respectively vary the electrostatic capacitances C.sub.1 and C.sub.2 within the range of about 25 pF to 325 pF in a stepwise manner by selecting or moving in a stepwise manner the capacitance position between 0 to 4000; Paragraph [0055] Line 1-8; In another example, the rotation angles of the first and the second stepping motor 86 and 88 may be monitored through an encoder (not shown), and the current capacitance positions and further the current electrostatic capacitances NC.sub.1 and NC.sub.2 of the first and the second variable capacitor 80 and 82 may be monitored based on the rotation angles of the motors; Paragraph [0069] Line 13-19), wherein the combiner includes:
a first impedance matching network [34] coupled to the first RF power supply to receive the first RF signal to output a first modified RF signal (A first RF power supply 32 for plasma generation is electrically connected to the susceptor 12 via a first matching unit (MU) 34 and a power feed rod 36. The RF power supply 32 outputs a first RF power RF.sub.H having a predetermined frequency of, e.g., about 40 MHz, adequate to generation of a capacitively coupled plasma.; Paragraph [0040] Line 1-6);
a second impedance matching network [72] coupled to the second RF power supply to receive the second RF signal to output a second modified RF signal (a second RF power supply 70 for ion attraction is electrically connected to the susceptor 12 via a second matching unit 72 and the power feed rod 36. The second RF power supply 70 outputs a second RF power RF.sub.L having a predetermined frequency of, e.g., 3.2 MHz, adequate to control energy of ions attracted toward the semiconductor wafer W on the susceptor 12; Paragraph [0041] Line 1-7).
ASHIDA fails to teach a combiner and distributor coupled to the first matching network and the second matching network to receive the first modified RF signal and the second modified RF signal, wherein the combiner and distributor is configured to output the plurality of combined RF signals based on the first and second modified RF signals.
Kapoor teaches systems and methods for adjusting impedances or power or a combination thereof across multiple plasma processing stations (Paragraph [0009] Line 1-3), wherein
a combiner and distributor [121] coupled to the first matching network and the second matching network to receive the first modified RF signal and the second modified RF signal (FIG. 1 illustrates a substrate processing system 100, which is an example of the PECVD system used to process a wafer 101. The substrate processing system 100 includes a plasma chamber 102 having a lower chamber portion 102b and an upper chamber portion 102a. A center column is configured to support a pedestal 140, which in one embodiment includes a powered lower electrode. The pedestal 140 is electrically coupled to a combiner and distributor 121, which is further coupled to multiple match networks 106; Paragraph [0036] Line 1-9);
wherein the combiner and distributor [121] is configured to output the plurality of combined RF signals based on the first and second modified RF signals (A first output OUT#1 of the combiner and distributor 121 is coupled via a coaxial cable 416A to the station 1, e.g., the showerhead 150 of the station 1 or the pedestal 140 of the station 1, etc. Moreover, a second output OUT#2 of the combiner and distributor 121 is coupled via a coaxial cable 416B to the station 2, e.g., the showerhead 150 of the station 2 or the pedestal 140 of the station 2, etc. A third output OUT#3 of the combiner and distributor 121 is coupled via a coaxial cable 416C to the station 3, e.g., the showerhead 150 of the station 3 or the pedestal 140 of the station 3, etc. Moreover, a fourth output OUT#4 of the combiner and distributor 121 is coupled via a coaxial cable 416D to the station 4, e.g., the showerhead 150 of the station 4 or the pedestal 140 of the station 4, etc.; Paragraph [0051] Line 1-14). The purpose of doing so is to provide for multiple frequencies with adequate tuning range to accommodate a variety of impedance transformations in the substrate stations during a multi-step process, to receive multiple non 50 ohm power signals with various impedance ranges and various power levels as inputs from active tuning matching networks outputs., to divert power to dummy impedances for the substrate stations not needing power, to introduces signals of the multiple frequencies to each of the substrate stations, to vary the signals of the multiple frequencies to each of the substrate stations, to isolate the frequencies from each other and to minimize feedback to inputs of the combiner and distributor.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention, to modify ASHIDA in view of Kapoor, because Kapoor teaches to include a combiner and distributor provides for multiple frequencies with adequate tuning range to accommodate a variety of impedance transformations in the substrate stations during a multi-step process, receives multiple non 50 ohm power signals with various impedance ranges and various power levels as inputs from active tuning matching networks outputs., diverts power to dummy impedances for the substrate stations not needing power, introduces signals of the multiple frequencies to each of the substrate stations, varies the signals of the multiple frequencies to each of the substrate stations, isolates the frequencies from each other and to minimize feedback to inputs of the combiner and distributor (Paragraph [0009]).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Rasheed et al. (US 20110209995 A1) discloses, “Physical Vapor Deposition With A Variable Capacitive Tuner And Feedback Circuit- [0004] A plasma reactor is provided for performing physical vapor deposition on a workpiece such as a semiconductor wafer. The reactor includes a chamber including a side wall and a ceiling, the side wall being coupled to an RF ground. [0053] FIG. 1 depicts a PEPVD plasma reactor in accordance with a first embodiment. The reactor includes a vacuum chamber 100 enclosed by a cylindrical side wall 102, a ceiling 104 and a floor 106. A workpiece support pedestal 108 within the chamber 100 has a support surface 108a for supporting a workpiece such as a semiconductor wafer 110. The support pedestal 108 may consist of an insulating (e.g., ceramic) top layer 112 and a conductive base 114 supporting the insulating top layer 112. [0054] A planar conductive grid 116 may be encapsulated within the top insulating layer 112 to serve as an electrostatic clamping (ESC) electrode. A D.C. clamping voltage source 118 is connected to the ESC electrode 116. An RF plasma bias power generator 120 of a bias frequency fb may be coupled through an impedance match 122 to either the ESC electrode 116 or to the conductive base 114. The conductive base 114 may house certain utilities such as internal coolant channels (not shown), for example. If the bias impedance match 122 and bias generator 120 are connected to the ESC electrode 116 instead of the conductive base 114, then an optional capacitor 119 may be provided to isolate the impedance match 122 and RF bias generator 120 from the D.C. chucking power supply 118. [0055] Process gas is introduced into the chamber 100 by suitable gas dispersing apparatus. For example, in the embodiment of FIG. 1, the gas dispersing apparatus consists of gas injectors 124 in the side wall 102, the gas injectors being supplied by a ring manifold 126 coupled to a gas distribution panel 128 that includes various supplies of different process gases (not shown). The gas distribution panel 128 controls the mixture of process gases supplied to the manifold 126 and the gas flow rate into the chamber 100. Gas pressure in the chamber 100 is controlled by a vacuum pump 130 coupled to the chamber 100 through a pumping port 132 in the floor 106.-However Rasheed does not disclose incrementing a count upon determining that the second number of steps is outside the preset range from the first number of steps; and repeating said controlling, computing, determining, and incrementing upon determining that the second number of steps is outside the preset range from the first number of steps, wherein said repeating is performed until the count is at least equal to a threshold indicative of the failure condition associated with the capacitor.”
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NASIMA MONSUR whose telephone number is (571)272-8497. The examiner can normally be reached 10:00 am-6:00 pm.
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/NASIMA MONSUR/Primary Examiner, Art Unit 2858