Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-3 and 5-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al (2018/0122304) hereinafter, Kim et al (2020/0168159) hereinafter, Kim2.
In regards to claim 1, Kim teaches a display device comprising (abstract):
a display panel comprising ([0036-0040]):
a first red light emitting element, a first green light emitting element, a first blue light emitting element (fig. 1 Pxa and Pxb)[0048]
[0048] The pixels PXa and PXb may be classified into a plurality of groups depending on a color displayed thereby. The pixels PXa and PXb may display one of primary colors. The primary colors include a red color, a green color, a blue color, and a white color, but the primary colors should not be limited thereto or thereby. That is, the primary colors may further include a variety of colors, such as a yellow color, a cyan color, a magenta color, etc.
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Kim fails to teach a second green light emitting element located in a first row (fig. 7 (R, G, B, and G) in row 1 for S1);
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It would have been obvious to one of ordinary skill in the art to modify the teachings of Kim to further include RGBG pixel, or a second green light emitting element located in a first row, as taught by Kim2, as human vision is most sensitive to green light and better low-light performance and less noise in dim conditions and better brightness detail.
Therefore, Kim in view of Kim2 teaches:
a second blue light emitting element, a third green light emitting element, a second red light emitting element and a fourth green light emitting element located in a second row adjacent to the first row (fig. 7 R, G, B, G) in row 2 for S2) Kim2;
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a first red pixel circuit, a first green pixel circuit, a first blue pixel circuit and a second green pixel circuit located in the first row (fig. 1 DL1 Pxa and Pxb, etc first row Kim) (figs. 2, 4 and 7 pixel circuit for R, G, B, and G pixel circuit for first row for S1 Kim2);
a second red pixel circuit, a third green pixel circuit, a second blue pixel circuit and a fourth green pixel circuit located in the second row; (fig. 1 DL1 Pxa and Pxb, etc second row Kim) (figs. 2, 4 and 7 pixel circuit for R, G, B, and G pixel circuit for second row S2) Kim2);
a first data line connected to the first red pixel circuit and the second red pixel circuit (fig. 1 Dl1) (fig. 7 Dl1 for R)Kim2;
a second data line connected to the first green pixel circuit and the third green pixel circuit (fig. 1 DL2) Kim (fig. 7 (DL3) Kim2);
a third data line connected to the first blue pixel circuit and the second blue pixel circuit (fig. 1 DL3 Kim and (fig. 7 (DL5) Kim2); and
a fourth data line connected to the second green pixel circuit and the fourth green pixel circuit (fig. 1 DL4) Kim and fig. 7 (Dl7)) Kim2;
a display driver including a first output channel and a second output channel (fig. 1 CH1, CHw/CH2) Kim and (fig. 7 Dout1 and Dout2) Kim2; and
a demultiplexer circuit configured to connect the first output channel and the second output channel to the first data line and the third data line in response to a first connection control signal (fig. 1 (150) Kim and fig. 7 (150)) Kim2), and to connect the first output channel and the second output channel to the second data line and the fourth data line in response to a second connection control signal (fig. 1 (DL1 and DL2, etc) Kim and fig. 7 (DL1 and DL2, etc) Kim2),.
In regards to claim 2, Kim in view of Kim2, teaches the display device of claim 1, wherein, when levels of the first and second connection control signals are changed, colors of data voltages output by the first and second output channels are changed (fig. 4 (sel1 and sel2 data [0048] Kim and fig. 3 (sel1 and sel2, S1-Sn data) Kim2.
In regards to claim 3, Kim in view of Kim2display device of claim 2, wherein, while the levels of the first and second connection control signals are maintained, the colors of the data voltages output by the first and second output channels are not changed (fig. 3 Sel1 and sel2 for B for example) Kim.
In regards to claim 5, Kim in view of Kim2 display device of claim 1, wherein the demultiplexer circuit includes: first switches configured to connect the first output channel and the second output channel to the first data line and the third data line in response to the first connection control signal; and second switches configured to connect the first output channel and the second output channel to the second data line and the fourth data line in response to the second connection control signal.(fig. 1 (DT1 and DT2) Kim (fig. 7 (ST1 and ST2 and ST3 and ST4 Kim2))
In regards to claim 6, Kim in view of Kim2display device of claim 1, wherein the demultiplexer circuit performs a switching operation once in each horizontal time [0014, 0025. 0069, 0073] Kim [0012, 0020,0026, 0077] Kim2 .
In regards to claim 7, Kim in view of Kim2display device of claim 1, wherein an order of connecting the first output channel to the first and second data lines in a horizontal time of a first frame period is different from an order of connecting the first output channel to the first and second data lines in a corresponding horizontal time of a second frame period (fig. 6 Fi and Fi_1 select are different so order will be different) Kim2.
In regards to claim 8, Kim in view of Kim2display device of claim 1, wherein the first output channel outputs a first red data voltage in a first period of a first horizontal time of a first frame period, and outputs a first green data voltage in a second period of the first horizontal time of the first frame period, wherein the first connection control signal has an inactive level in the first period of the first horizontal time of the first frame period, and has an active level in the second period of the first horizontal time of the first frame period, and wherein the second connection control signal has the active level in the first period of the first horizontal time of the first frame period, and has the inactive level in the second period of the first horizontal time of the first frame period (fig. 5a R for D1 and second G for D3 and corresponding and corresponding sel1 and sel2) Kim2.
In regards to claim 15, Kim in view of Kim2electronic device, comprising the display device according to claim 1 (fig. 1 display device) Kim.
Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al (2018/0122304) hereinafter, Kim et al (2020/0168159) hereinafter, Kim2, further in view of Hwang et al 2021/0134892 hereinafter, Hwang.
In regards to claim 4, Kim and Kim2 fails to teach the display device of claim 1, wherein an anode of the second blue light emitting element located in a first column is extended such that the anode of the second blue light emitting element is connected to the second blue pixel circuit located in a third column.
However, Hwang teaches wherein an anode of the second blue light emitting element located in a first column is extended such that the anode of the second blue light emitting element is connected to the second blue pixel circuit located in a third column.(fig. 2 B2 anode for example)
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It would have been obvious to one of ordinary skill in the art to modify the teachings of wherein an anode of the second blue light emitting element located in a first column is extended such that the anode of the second blue light emitting element is connected to the second blue pixel circuit located in a third column as taught by Hwang in order to drive an pixel under different driving conditions for another color [0007]
Claim(s) 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al (2018/0122304) hereinafter, Kim et al (2020/0168159) hereinafter, Kim2, further in view of Yoo et al (2016/0078826) hereinafter, Yoo.
In regards to claim 14, Kim and Kim2, fails to teach the display device of claim 1, wherein the demultiplexer circuit performs a switching operation twice in each horizontal time when the display panel is driven at a first driving frequency less than or equal to a reference frequency, and performs the switching operation once in each horizontal time when the display panel is driven at a second driving frequency greater than the reference frequency.
However, Yoo teaches wherein the demultiplexer circuit performs a switching operation twice in each horizontal time when the display panel is driven at a first driving frequency less than or equal to a reference frequency, and performs the switching operation once in each horizontal time when the display panel is driven at a second driving frequency greater than the reference frequency (fig. 3 mux switching cycle and fig. 5a mux switching cycle 2h) [0008, 0055-0057,0065-0070]
It would have been obvious to one of ordinary skill in the art to modify the teachings of Kim and Kim2 to further include wherein the demultiplexer circuit performs a switching operation twice in each horizontal time when the display panel is driven at a first driving frequency less than or equal to a reference frequency, and performs the switching operation once in each horizontal time when the display panel is driven at a second driving frequency greater than the reference frequency as taught by Yoo in order to save power [007-0011]
Claim(s) 16-17 and 21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al (2018/0122304) hereinafter, Kim et al (2020/0168159) hereinafter, Kim2, further in view of Yang et al (2021/0233455) hereinafter, Yang.
In regards to claim 16, Kim teaches a display device comprising (abstract):
a display panel comprising ([0036-0040]):
a first red light emitting element, a first green light emitting element, a first blue light emitting element (fig. 1 Pxa and Pxb)[0048]
[0048] The pixels PXa and PXb may be classified into a plurality of groups depending on a color displayed thereby. The pixels PXa and PXb may display one of primary colors. The primary colors include a red color, a green color, a blue color, and a white color, but the primary colors should not be limited thereto or thereby. That is, the primary colors may further include a variety of colors, such as a yellow color, a cyan color, a magenta color, etc.
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Kim fails to teach a second green light emitting element located in a first row (fig. 7 (R, G, B, and G) in row 1 for S1);
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It would have been obvious to one of ordinary skill in the art to modify the teachings of Kim to further include RGBG pixel, or a second green light emitting element located in a first row, as taught by Kim2, as human vision is most sensitive to green light and better low-light performance and less noise in dim conditions and better brightness detail.
Kim and Kim2 fail to teach a demultiplexer circuit configured to connect the first output channel and the second output channel to the first data line and the second data line in response to a first connection control signal.
However, Yang teaches teach a demultiplexer circuit configured to connect the first output channel and the second output channel to the first data line and the second data line in response to a first connection control signal.(fig. 2 (DMSC1) for adjacent data lines)
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It would have been obvious to one of ordinary skill in the art to modify the teachings of Kim and Kim2 to further include a demultiplexer circuit configured to connect the first output channel and the second output channel to the first data line and the second data line in response to a first connection control signal as taught by Yang in order help reduce data line coupling [004-006].
Therefore, Kim in view of Kim2 and Yang teaches:
a second blue light emitting element, a third green light emitting element, a second red light emitting element and a fourth green light emitting element located in a second row adjacent to the first row (fig. 7 R, G, B, G) in row 2 for S2) Kim2;
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a first red pixel circuit, a first green pixel circuit, a first blue pixel circuit and a second green pixel circuit located in the first row (fig. 1 DL1 Pxa and Pxb, etc first row Kim) (figs. 2, 4 and 7 pixel circuit for R, G, B, and G pixel circuit for first row for S1 Kim2);
a second red pixel circuit, a third green pixel circuit, a second blue pixel circuit and a fourth green pixel circuit located in the second row; (fig. 1 DL1 Pxa and Pxb, etc second row Kim) (figs. 2, 4 and 7 pixel circuit for R, G, B, and G pixel circuit for second row S2) Kim2);
a first data line connected to the first red pixel circuit and the second red pixel circuit (fig. 1 Dl1) (fig. 7 Dl1 for R)Kim2;
a second data line connected to the first green pixel circuit and the third green pixel circuit (fig. 1 DL2) Kim (fig. 7 (DL3) Kim2);
a third data line connected to the first blue pixel circuit and the second blue pixel circuit (fig. 1 DL3 Kim and (fig. 7 (DL5) Kim2); and
a fourth data line connected to the second green pixel circuit and the fourth green pixel circuit (fig. 1 DL4) Kim and fig. 7 (Dl7)) Kim2;
a display driver including a first output channel and a second output channel (fig. 1 CH1, CHw/CH2) Kim and (fig. 7 Dout1 and Dout2) Kim2; and
a demultiplexer circuit configured to connect the first output channel and the second output channel to the first data line and the second data line in response to a first connection control signal (fig. 2 (DMSC1) for adjacent data lines) (fig. 1 (150) Kim and fig. 7 (150)) Kim2), and to connect the first output channel and the second output channel to the second data line and the third data line in response to a second connection control signal (fig. 1 (DL1 and DL2, etc) Kim and fig. 7 (DL1 and DL2, etc) Kim2) (fig. 2 (DMSC1) for adjacent data lines).
In regards to claim 17, Kim in view of Kim2 and Yang teaches the display device of claim 16, wherein the first output channel outputs a first red data voltage in a first period of a first horizontal time of a first frame period (fig. 5a R D1)) Kim, and outputs a first blue data voltage in a second period of the first horizontal time of the first frame period (fig. 5a B for second period of H)Kim2, wherein the first connection control signal has an inactive level in the first period of the first horizontal time of the first frame period (fog. 5a sel1 during R) Kim2, and has an active level in the second period of the first horizontal time of the first frame period (fig. 5a sel1 active)Kim2, and wherein the second connection control signal has the active level in the first period of the first horizontal time of the first frame period(fig. 5a sel2 active)Kim2, and has the inactive level in the second period of the first horizontal time of the first frame period(fig. 5a sel2 active)Kim2.
In regards to claim 21, Kim in view of Kim2 and Yang teaches electronic device, comprising the display device according to claim 16 (fig. 1 display) Kim and (fig. 1 display)Kim2.
Allowable Subject Matter
Claims 9-13 and 18-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
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/GRANT SITTA/Primary Examiner, Art Unit 2622