Prosecution Insights
Last updated: August 17, 2026
Application No. 18/959,976

EUV MASK INSPECTING METHODS AND SYSTEMS

Non-Final OA §102§103
Filed
Nov 26, 2024
Examiner
BOOSALIS, FANI POLYZOS
Art Unit
2884
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
1 (Non-Final)
90%
Grant Probability
Favorable
1-2
OA Rounds
3m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 90% — above average
90%
Career Allowance Rate
1143 granted / 1266 resolved
+22.3% vs TC avg
Moderate +11% lift
Without
With
+10.8%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 12m
Avg Prosecution
32 currently pending
Career history
1291
Total Applications
across all art units

Statute-Specific Performance

§101
2.2%
-37.8% vs TC avg
§103
52.1%
+12.1% vs TC avg
§102
33.5%
-6.5% vs TC avg
§112
10.7%
-29.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1266 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1-3, 10-11, 17, 19-20 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Sewell et al (US 9,046,754 B2). Regarding claim 1, Sewell et al discloses a method for inspecting a patterning mask (col. 6, lines 7-10), comprising: a method for inspecting a patterning mask (MA) (See Fig. 1, col. 6, lines 7-41), comprising: radiating an extreme ultraviolet (EUV) beam to a surface of the patterning mask; directing a reflected EUV beam (col. 4, line 53-57) from the surface of the patterning mask to an image sensor (330) (col. 9, lines 63-col. 10, line 29); generating an image of the surface of the patterning mask based on the reflected EUV beam (col. 10, lines 25-29); and determining a critical dimension uniformity (CDU) (defect) of the patterning mask based on the image of the surface of the patterning mask (col. 10, lines 25-58). Regarding claim 2, Sewell et al discloses wherein the surface of the patterning mask includes a calibration zone, the method further comprises: calibrating (adjustments) the image of the surface of the patterning mask based on an image of the calibration zone (col. 13, lines 62-col. 14, line 4). Regarding claim 3, Sewell et al discloses wherein calibrating (adjustments) (col. 13, lines 53-col. 14, line 4) the image of the surface of the patterning mask comprises: determining a system bias based on the image of the calibration zone (col. 13, lines 62-col. 14, line 4); determining a tilt bias (col. 5, lines 30-41) based on the image of the calibration zone; determining an intensity bias based on the image of the calibration zone; and calibrating the image of the surface of the patterning mask based on the system bias, the tilt bias, and the intensity bias (adjustment made to magnification of optical system (320) and design of detector array) (col. 13, lines 62-col. 14, line 4). Regarding claim 10, Sewell et al discloses wherein the patterning mask is a phase shift EUV mask (col. 5, lines 33-36). Regarding claim 11, Sewell et al discloses wherein the EUV beam has a wavelength of about 13.6 nm (i.e. 13.5 nm) (col. 10, lines 1-2). Regarding claim 17, Sewell et al discloses a device for inspecting a patterning mask, comprising: an image sensor (330) (See Fig. 3, col. 9, line 66); an extreme ultraviolet (EUV) beam source (310) (col. 9, line 67); a processor (340) (col. 9, line 66); and a non-transitory computer-readable storage medium storing a program (col. 4, lines 17-30), wherein the processor is programmed to control: radiating an EUV beam from the EUV beam source to a surface of the pattern mask (col. 4, line 53-57); directing a reflected EUV beam from the surface of the patterning mask to the image sensor (330) (col. 9, lines 63-col. 10, line 29); generating an image of the surface of the patterning mask based on the reflected EUV beam (col. 10, lines 25-29); and determining a critical dimensional (CDU) (defect) of the patterning mask based on the image of the surface of the patterning mask (col. 10, lines 25-58). Regarding claim 19, Sewell et al discloses wherein the surface of the patterning mask includes a calibration zone, the method further comprises: calibrating (adjustments) the image of the surface of the patterning mask based on an image of the calibration zone (col. 13, lines 62-col. 14, line 4). Regarding claim 20, Sewell et al discloses wherein calibrating (adjustments) (col. 13, lines 53-col. 14, line 4) the image of the surface of the patterning mask comprises: determining a system bias based on the image of the calibration zone (col. 13, lines 62-col. 14, line 4); determining a tilt bias (col. 5, lines 30-41) based on the image of the calibration zone; determining an intensity bias based on the image of the calibration zone; and calibrating the image of the surface of the patterning mask based on the system bias, the tilt bias, and the intensity bias (adjustment made to magnification of optical system (320) and design of detector array) (col. 13, lines 62-col. 14, line 4). Claim(s) 12-16 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Ye et al (WO 2008151185 A1). Regarding claim 12, Ye et al discloses a method for monitoring a wafer pattern behavior of a patterning mask (See Abstract), comprising: radiating an extreme ultraviolet (EUV) beam to a surface of the patterning mask (paragraph [0058]); collecting an image of a dummy pattern zone (SRAFs) (See Abstract and paragraph ) [0045]) of the patterning mask based on a reflected EUV beam from the surface of the patterning mask; providing the image of the dummy pattern zone of the patterning mask to an artificial intelligence engine (trained machine learning model) (paragraph [0128]); determining, by the artificial intelligence engine, the wafer pattern behavior of the patterning mask based on the image of the dummy pattern zone of the patterning mask (paragraph [0128]); and determining a critical dimension uniformity (CDU) of the patterning mask based on the image of the dummy pattern zone of the patterning mask (paragraphs [0128]-[0130]). Regarding claim 13, Ye et al discloses wherein the dummy pattern zone of the patterning mask includes at least one of a contact hole pattern, a line space pattern, a curvilinear pattern, and a clear region pattern (paragraph [0046]). Regarding claim 14, Ye et al discloses wherein the dummy pattern zone of the patterning mask includes at least one of a circular pattern, a square pattern, a rectangular pattern, an elliptical pattern, a polygon pattern, and a clear region pattern (paragraph [0046]). Regarding claim 15, Ye et al discloses wherein the patterning mask includes a substrate, a reflective layer deposited on the substrate, and an absorber layer deposited on the reflective layer, wherein the absorber layer defines a pattern for the patterning mask (paragraph [0014]). Regarding claim 16, Ye et al discloses wherein the patterning mask is a phase shift EUV mask (paragraph [0024]). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 4-8, 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sewell et al (US 9,046,754 B2) in view of Ye et al (WO 2008151185 A1). Regarding claim 4, Sewell et al discloses all of the limitations of parent claim 1, as described supra however, Sewell et al is silent with regards to dummy pattern zone as claimed. Ye et al discloses a method for monitoring a wafer pattern behavior of a patterning mask (See Abstract), comprising: radiating an extreme ultraviolet (EUV) beam to a surface of the patterning mask (paragraph [0058]); collecting an image of a dummy pattern zone (SRAFs) (See Abstract and paragraph ) [0045]) of the patterning mask based on a reflected EUV beam from the surface of the patterning mask; providing the image of the dummy pattern zone of the patterning mask to an artificial intelligence engine (trained machine learning model) (paragraph [0128]); determining, by the artificial intelligence engine, the wafer pattern behavior of the patterning mask based on the image of the dummy pattern zone of the patterning mask (paragraph [0128]); and determining a critical dimension uniformity (CDU) of the patterning mask based on the image of the dummy pattern zone of the patterning mask (paragraphs [0128]-[0130]). Thus, it would have been obvious to modify Sewell et al with the teaching of Ye et al so as to improve accuracy and efficiency for determining CDU of patterned mask and monitoring wafer pattern behavior. Regarding claim 5, Sewell et al in view of Ye et al discloses wherein the dummy pattern zone of the patterning mask includes at least one of a contact hole pattern, a line space pattern, a curvilinear pattern, and a clear region pattern (paragraph [0046]). Regarding claim 6, Sewell et al in view of Ye et al discloses wherein the dummy pattern zone of the patterning mask includes at least one of a circular pattern, a square pattern, a rectangular pattern, an elliptical pattern, a polygon pattern, and a clear region pattern (paragraph [0046]). Regarding claim 7, Sewell et al in view of Ye et al discloses wherein the patterning mask includes a substrate, a reflective layer deposited on the substrate, and an absorber layer deposited on the reflective layer, wherein the absorber layer defines a pattern for the patterning mask (paragraph [0014]). Regarding claim 8, Sewell et al in view of Ye et al discloses wherein the reflective layer incudes reflective multiple layers (paragraph [0014]). Regarding claim 18, Sewell et al discloses all of the limitations of parent claim 1, as described supra however, Sewell et al is silent with regards to dummy pattern zone as claimed. Ye et al discloses a method for monitoring a wafer pattern behavior of a patterning mask (See Abstract), comprising: radiating an extreme ultraviolet (EUV) beam to a surface of the patterning mask (paragraph [0058]); collecting an image of a dummy pattern zone (SRAFs) (See Abstract and paragraph ) [0045]) of the patterning mask based on a reflected EUV beam from the surface of the patterning mask; providing the image of the dummy pattern zone of the patterning mask to an artificial intelligence engine (trained machine learning model) (paragraph [0128]); determining, by the artificial intelligence engine, the wafer pattern behavior of the patterning mask based on the image of the dummy pattern zone of the patterning mask (paragraph [0128]); and determining a critical dimension uniformity (CDU) of the patterning mask based on the image of the dummy pattern zone of the patterning mask (paragraphs [0128]-[0130]). Thus, it would have been obvious to modify Sewell et al with the teaching of Ye et al so as to improve accuracy and efficiency for determining CDU of patterned mask and monitoring wafer pattern behavior. Claim(s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sewell et al (US 9,046,754 B2) in view of Ye et al (WO 2008151185 A1) in further view of Hayashi et al (US 8029950 B2). Regarding claim 9, Sewell et al and Ye et al disclose all of the limitations of claim 7, as describes supra however, Sewell et al and Ye et al are silent with regards to reflection rates as claimed. Hayashi et al discloses a reflective mask blank for EUV lithography comprising: a reflection rate of the absorber layer is in a range from 0% to 10 %; and a reflection rate of the reflective layer is in a range from 50 % to 100 % (col. 3, lines 13-67). Thus, it would have been obvious to modify Sewell et al in view of Ye et al with the teaching of Hayashi et al, so as to improve accuracy and enable high resolution. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to FANI POLYZOS BOOSALIS whose telephone number is (571)272-2447. The examiner can normally be reached 7:30-3:30 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Uzma Alam can be reached at Uzma.Alam@USPTO.GOV. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /F.P.B./Examiner, Art Unit 2884 /UZMA ALAM/Supervisory Patent Examiner, Art Unit 2884
Read full office action

Prosecution Timeline

Nov 26, 2024
Application Filed
Jul 15, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
90%
Grant Probability
99%
With Interview (+10.8%)
1y 12m (~3m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1266 resolved cases by this examiner. Grant probability derived from career allowance rate.

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