Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
RCE, received 3/23/2026, has been entered.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 33 and 37 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Chen et al. (US Pub. No. 2025/0311338 A1), hereafter referred to as Chen.
As to claim 33, Chen discloses a semiconductor device (fig 8A, 100) comprising:
a channel structure (fig 8A, 125) comprises at least a 1st channel layer (lower 125) and a 2nd channel layer (upper 125) above the 1st channel layer in a vertical direction;
a source/drain pattern (645) on the channel structure (125), the source/drain pattern comprising a single continuous region that extends in the vertical direction along a side surface of the 1st channel layer and a side surface of the 2nd channel layer (fig 8A shows non continuous regions 645 with non-zero space S2 located therebetween, however, [0053] teaches that these regions 645 may unify into a single body and are shown extending in a vertical direction along side surfaces of the channel layers 125);
a gate structure (110) on the channel structure (125); and
a contact layer (430) on the channel structure (125) the contact layer comprising SiGe ([0054]),
wherein the contact layer comprises a 1st contact layer (430 adjacent lower 125) on the 1st channel layer (lower 125) and a 2nd contact layer (430 adjacent upper 125) on the 2nd channel layer (upper 125),
wherein the 1st contact layer and the 2nd contact layer are spaced apart in the vertical direction (fig 8A shows 430 spaced apart), with at least a portion of the source/drain pattern between the 1st and 2nd contact layers in the vertical direction (source/drain pattern 645 is vertically between upper and lower 430); and
wherein the portion of the source/drain pattern between the 1st and 2nd contact layers comprises silicon germanium ([0054]), and a concentration of germanium in the portion of the source/drain pattern is different from a concentration of germanium in at least one of the 1st contact layer or the 2nd contact layer ([0054]).
As to claim 37, Chen discloses the semiconductor device of claim 33 (paragraphs above),
wherein the 1st contact layer is directly on the 1st channel layer (contact 430 directly on channel 125), and
wherein the 2nd contact layer is directly on the 2nd channel layer (contact 430 directly on channel 125).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 34 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of Ha et al. (US Pub. No. 2023/0111579 A1), hereafter referred to as Ha.
As to claim 34, Chen discloses the semiconductor device of claim 33 (paragraphs above),
Chen does not disclose wherein the source/drain pattern comprises a 1st portion and a 2nd portion, the 2nd portion being disposed between the 1st portion and the contact layer, and
wherein the 1st portion and the 2nd portion have different Ge concentrations.
Nonetheless, Ha discloses wherein a source/drain pattern (fig 6, SD1) comprises a 1st portion (SEL2) and a 2nd portion (RFL1), the 2nd portion being disposed between the 1st portion and a contact layer (SEL1), and
wherein the 1st portion and the 2nd portion have different Ge concentrations ([0110]).
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to form the source/drain pattern of Chen with the first and second portions as taught by Ha since this will improve the electrical connection between the channel and the source/drain contact.
Claim(s) 36 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of Galatage et al. (US Pub. No. 2023/0402507 A1), hereafter referred to as Galatage.
As to claim 36, Chen discloses the semiconductor device of claim 33 (paragraphs above),
Chen does not explicitly show the gate dielectric described in [0035] and thus does not disclose a gate dielectric layer of the gate structure is between the 1st contact layer and the 2nd contact layer.
Nonetheless, Galatage discloses wherein a gate dielectric layer (120) of the gate structure (122) is between the 1st contact layer (135a) and the 2nd contact layer (135c).
It would have been obvious to one of ordinary skill in the art before the effective filing of the claimed invention to include the gate dielectric of Galatage between the 1st contact layer and the 2nd contact layer in Chen since this will provide dielectric separation between the channel region and the gate region of the transistor structure.
Allowable Subject Matter
Claims 1-5, 9, 19, 20 and 26-32 are allowed.
Claim 38 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: The prior art of record fails to teach or suggest all of the limitations of independent claim 1, specifically, a semiconductor device comprising: a contact layer that directly extends along a side surface and a flat bottom surface of the channel structure, wherein the contact layer contacts the source/drain pattern and comprises silicon germanium, as recited in claim 1; or a semiconductor device comprising: a contact layer that directly extends along a side surface and a flat bottom surface of the channel structure, wherein the source/drain pattern comprises a 1st portion having a 1st germanium concentration, and a 2nd portion having a 2nd Ge concentration lower than the 1st Ge concentration, and wherein the contact layer has a 3rd Ge concentration lower than the 1st Ge concentration and higher than the 2nd Ge concentration, as recited in claim 19; or wherein the portion of the source/drain pattern is in direct contact with the 1st and 2nd contact layers, and wherein the concentration of Ge in the portion of the s/d pattern is less than the concentration of Ge in the at least one of the 1st contact layer or the 2nd contact layer, as recited in claim 38. Dependent claims 2-5, 9, 20, 26-32 are allowable because of their dependence from independence claim 1 or claim 19.
Response to Arguments
Applicant's arguments filed 3/23/2026 have been fully considered but they are not persuasive.
Applicant argued that Chen fails to teach or suggest all of the limitations of claim 33 because source/drain metallization 850 does not comprise silicon germanium.
Examiner agrees that metallization 850 does not comprise silicon germanium and thus is considered a metallization layer instead of the claimed source/drain region. Instead, element 645 corresponds to the source/drain region and comprises silicon germanium. Additionally, element 430 is considered to correspond to the claimed contact region.
Pertinent Art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Fig 3 of US 2024/0213371A1 is pertinent.
Figure 3B of US 2024/0113110A1 is pertinent.
Additionally, US 2023/0326971A1 is pertinent.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAUN M CAMPBELL whose telephone number is (571)270-3830. The examiner can normally be reached on MWFS: 7:30-6pm Thurs 1-2pm.
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/SHAUN M CAMPBELL/Primary Examiner, Art Unit 2893 5/28/2026
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