Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Detailed Action
2. This office action is in response to the filing with the office dated 12/02/2024.
Information Disclosure Statement
3. The information disclosure statements (IDS) submitted on 03/31/2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections – 35 U.S.C. 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
4. Claims 1 and 2 are rejected under 35 U.S.C. 102 (a) (1) as being anticipated by Hermle et al (US 4433309 A).
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Regarding independent claim 1, Hermle et al (US 4433309 A) teaches, Circuit arrangement for evaluating the output signal of an inductive or capacitive proximity switch for switching processes in the low to medium frequency range (figure 1, lines 27-48, column 5), comprising a transistor (T) in an emitter circuit, the base of which can be fed an input signal (Vdem), at the collector of which an output signal (Vs) characterising a switching process can be tapped off and the emitter of which is set to a predefined potential (VRef) (figure 1, lines 27-48, column 5), characterised in that a coupling capacitor (Ck) is connected between emitter and base which transmits interfering brief voltage peaks at the base directly to the emitter (figure 1, lines 27-48, column 5).
Regarding dependent claim 2, Hermle et al (US 4433309 A) teaches, Circuit arrangement according to claim 1.
Hermle et al (US 4433309 A) further teaches, characterized in that the emitter is set to the predefined potential by a voltage divider (lines 1-7, column 4).
Claim Rejections – 35 U.S.C. 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
5. Claims 3 and 4 are rejected under 35 U.S.C. 103 as being unpatentable over Hermle et al (US 4433309 A) and in view of Schulz Joerg (US 6194903 B1).
Regarding dependent claim 3, Hermle et al (US 4433309 A) teaches, Circuit arrangement according to claim 1.
Hermle et al is silent about the frequency range.
Schulz Joerg (US 6194903 B1) teaches, a capacitive proximity switch (figures 1-3) characterized in that the low to medium frequency range is between 50 Hz and 1.5 KHz, in particular between 100 Hz and 1 KHz. (Output stage 105, in the embodiment shown, is made to operate as a comparator. Operational amplifier 124 used for this purpose must have very good values with respect to input current and offset drift (input current roughly <2 nA, offset drift roughly <10 .mu.V/K). Since the maximum object sampling frequency is now generally below 100 Hz, output stage 105 need not satisfy increased requirements with respect to speed. A low slew rate or, more accurately, a low open-circuit gain at frequencies around 50 Hz and small input difference voltages is even a good idea for suppression of low frequency noise voltages with a large amplitude, for example, with a line frequency of 50 Hz.(lines 65, col 16 - line 9. Column 17; the maximum frequency with which moving objects can still be detected is normally below 100 Hz for capacitive proximity sensors - since the processes are relatively slow - in extreme cases frequencies up to about 1 kHz may be required. The object detection frequency is limited by several factors. The essential factors are the clock frequency of the clock generator 1 , the size of the storage capacity 3 , the time constants in the filter network 18 , the slew rate or bandwidth of the output stage 5 and the time behavior of the further signal processing 27 (lines 51-60, column 17).
Therefore it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention, to have modified the teachings of Hermle et al by providing for adjusting the circuit parameters for the operating frequency range for the inductive/capacitive proximity sensor as taught by Schulz.
One of the ordinary skill in the art would have been motivated to make such a modification so that the low frequency noise can be suppressed by using a band-limited noise generator as the modulation source or even as the clock generator, as taught by Schulz (lines 10-33, column 7).
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Regarding dependent claim 4, Hermle et al (US 4433309 A) teaches Circuit arrangement according to claim 1.
Hermle et al (US 4433309 A) further teaches, Sensor device having an inductive or capacitive proximity switch and an evaluation circuit (lines 1-13, column 3), which comprises an oscillator (figure 1), a demodulator for outputting a demodulated signal (Vdem), and a comparator for comparing the demodulated signal (Vdem) with a reference signal (VRef) and for outputting an output signal (Vs) depending on the comparison (figure 1, lines 1-33, column 4; lines 27-48, column 5), characterized in that the comparator is realized by a circuit arrangement according to claim 1, wherein the demodulated signal (Vdem) corresponds to the input signal at the base of the transistor and the reference signal (VRef) corresponds to the predefined potential to the emitter of the transisto (figure 1, lines 1-33, column 4; lines 27-48, column 5).
Hermle et al does not explicitly teach a demodulated signal.
However Hermle et al teaches, If testing for proper functioning is to be at least largely independent of the length of the connection cable it is advantageous to provide a transistor switch comprising a transistor T5, resistors R10 and R11 and a capacitor C3 instead of the short-circuit connection between connections 1, 1' and 3. With this switching variant the collector-emitter circuit of transistor T5 is disposed between connections 1 and 3. The base of transistor T5 is also connected to connection 3 via resistor R10 and with connection 1' via resistor R11. Resistor R10 then provides for the low-resistance connection between emitter and base which is especially important at high temperatures whereas resistor R11 serves to limit base current. Finally, capacitor C3 between connections 1' and 3 serves as a filter member to block interference voltage peaks which could come in via the connecting cable. The feedback of noise pulses due to output pulses of the trigger circuit to the input of the proximity switch will also be suppressed with the aid of capacitor C3 (lines 27-48, column 5).
Schulz (US 6194903 B1) teaches (Since, as mentioned above, the principle of measurement signal acquisition is based on averaging, for complete interference suppression, the requirement arises that this average value should not change under the influence of interference so slowly that the resulting DC voltage fluctuation can pass through a filter network and thus can be acquired by the output stage. In other words, this means that the beat between the clock frequency and the interference frequency always remains at a high enough frequency to prevent passage through the filter network. But, in positive terms, this means that good narrowbandedness can only be achieved by lowpass dimensioning of the filter network to large time constants of a few milliseconds. That is, an interfering frequency remains without effect if it lies very close to the clock frequency without expensive narrowband engineering of the input signal. This minimizes the probability of interference having an effect, especially in concert with the use of a frequency modulator. The modulation frequency of the frequency modulator should, in any case, be so high that it cannot pass through the filter network. In order to prevent an undue adverse effect on the measurement accuracy, the modulation frequency should be so high that it can no longer pass through the filter network, but is not unnecessarily higher either. (lines 37-60, column 8). Since capacitive proximity switches are subject to strong price pressure, the basic circuits long known for these purposes are relatively simple. Essentially, they consist of a RC oscillator which has an oscillation amplitude or oscillation onset which is dependent on the capacitance between the measurement electrode and the environment to be observed, and which is converted via a demodulator circuit into a switching or analog signal. In fill level engineering, acceleration measurement engineering, pressure measurement engineering, etc. there are also many other processes, for example, admittance measurement, disturbance of a monostable multivibrator by a sensor capacitance as a time-determining element, methods in which the change of the resonant frequency of an oscillating circuit is measured, methods of phase measurement with small capacitances, various AC bridge circuits or circuits which use charge-discharge functions of RC elements. There are also processes based on charge transport (lines 22-39, column 9). Furthermore, the circuit shown in FIG. 1 has an auxiliary voltage 11 which is synchronized with the changeover frequency of the clock generator 1. A frequency or amplitude modulator (not shown) can also be series connected to auxiliary voltage 11. In this case, auxiliary voltage 11 is capacitively coupled via an external probe structure 21 to the electrode 6 of the capacitive circuit element or component. (line 66, column 11 – line 5, column 12).Furthermore, the first embodiment of the circuit according to the second teaching of the invention, shown in FIG. 2, has a frequency modulator 112 which modulates the clock frequency of the clock generator 101. To adjust the working point, resistor network 108 is formed of a constant resistor 113 and a potentiometer 114. Between electrode 106 of the unknown capacitance and input 107 of changeover contact 102, there is an electrode coupling network 116 which encompasses at least one coupling resistor 115. Additionally, between the second output 111 of the changeover contact 102 and the first electrode of the storage capacitance, there is a protective resistor 117. Between second output 111 of changeover contact 102 and output stage 105, there is a filter network 118 following the protective resistor 117. The described components of the first embodiment of the circuit according to the second teaching of the invention, shown in FIG. 2, are hereinafter called the measurement branch, with the exception of clock generator 101 and frequency modulator 112 (line 9 – line 27, column 13). Frequency modulator 112 controls the frequency of the clock generator 101 and is used to suppress the noise frequencies which are exactly on or very near the clock frequency (lines 57-60, column 14).
Therefore it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention, to have modified the teachings of Hermle et al by providing a modulator/demodulator as taught by Schulz.
One of the ordinary skill in the art would have been motivated to make such a modification to suppress the noise frequencies which are exactly on or very near the clock frequency, as taught by Schulz (lines 57-60, column 14).
Closest Prior art
6. The following relevant prior art of record is not cited in the office action.
Ingraham (US 4831279) teaches, A capacitive detecting circuit for detecting transient capacitive changes such as that of a person moving into proximity of a sensing element. A sensing element is coupled to a threshold level controlled amplifier supplied with relatively high frequency signals from an oscillator through a high input impedance. A detector circuit is coupled to the amplifier output to detect D.C. variations in the level control loop caused by transient capacitive changes and provide a control output signal representative of such change.
Chang et al (US 2011/0084711 A1) teaches, a capacitance sensing circuit with anti-EMI capability. A filter is coupled to a capacitor under test; receives a plurality of reference signals; and produces a first filter signal and a second filter signal. A difference circuit receives the first and second filter signals; eliminates the common-mode noise in the first and second filter signals; and produces a difference signal. The amplitude of the difference signal is related to the capacitance value of the capacitor under test. Thereby, the purpose of sensing capacitance can be achieved. In addition, by eliminating common-mode noise using the difference circuit, the anti-EMI capability can be achieved. Because the difference circuit can adjust the dynamic range of the output of the filter, the capacitance sensing circuit with anti-EMI capability can achieve capacitance sensing in few clock cycles.
Carroll et al (US 5594384 A) teaches, An enhanced peak detector circuit for the amplitude demodulation of an incoming amplitude modulated signal is provided. In its simplest form, the enhanced peak detector circuit includes a forward biased NPN transistor, a peak detecting segment coupled to the base-emitter junction of the transistor; and a peak holding capacitor leading from the collector of the transistor and connected in parallel to the peak detecting segment. The peak detecting segment includes a parallel connected peak detecting capacitor and a resistor. When the base-emitter junction of the transistor is conducting, both the peak detecting capacitor and the peak holding capacitor are charging. Conversely, when the base-emitter junction of the transistor is back biased, the peak detecting capacitor discharges through the resistor and the collector remains open such that the peak holding capacitor remains charged.
Ogata et al (US 5428253 A) teaches, A high frequency oscillation type proximity switch prevents mutual interference when it is mounted adjacent to other proximity switches. The switch includes a comparator having a threshold value at a level higher than an object detection level of the oscillation output of the proximity switch. When an output is continuously obtained from the comparator, a beat is generated and the generation of mutual interference is detected. Then, the generation is externally displayed, and mutual interference is alarmed and prevented by changing the oscillation frequency.
Conclusion
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/SURESH K RAJAPUTRA/Examiner, Art Unit 2858
/EMAN A ALKAFAWI/Supervisory Patent Examiner, Art Unit 2858 6/29/2026
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