Prosecution Insights
Last updated: April 19, 2026
Application No. 18/968,157

DISPLAY APPARATUS

Final Rejection §102§103
Filed
Dec 04, 2024
Examiner
HERMANN, KIRK W
Art Unit
2623
Tech Center
2600 — Communications
Assignee
Samsung Display Co., Ltd.
OA Round
2 (Final)
79%
Grant Probability
Favorable
3-4
OA Rounds
2y 7m
To Grant
87%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allow Rate
480 granted / 607 resolved
+17.1% vs TC avg
Moderate +8% lift
Without
With
+8.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
17 currently pending
Career history
624
Total Applications
across all art units

Statute-Specific Performance

§101
3.1%
-36.9% vs TC avg
§103
58.2%
+18.2% vs TC avg
§102
20.6%
-19.4% vs TC avg
§112
12.4%
-27.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 607 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Foreign Priority This application claims priority to Korea Patent Application No. 10-2024-0016911 filed on 02/02/2024 and Korea Patent Application No. 10-2024-0080203 filed on 06/20/2024, and on 01/14/2025 and 01/17/2025, the USPTO electronically retrieved copies of these documents. Thus, on the office action summary sheet examiner has checked off the box “all” certified copies have been received at this time. Specification Objections The specification is objected to because the title is not descriptive. See MPEP 606.01 – “Where the title is not descriptive of the invention claimed, the examiner should require the substitution of a new title that is clearly indicative of the invention to which the claims are directed”. Correction is needed. Examiner suggests by way of example the following title: “DISPLAY APPARATUS INCLUDING A DATA DISTRIBUTOR THAT SELECTIVELY CONNECTS DRIVING CIRCUIT OUTPUT LINES TO DATA LINES”. Claim Objections Claims 1-15 and 17-26 are objected to because of the following informalities: Claim 1 at line 5 includes an extra space between each of the words. This objection may be overcome, for example, by left justifying the claims. Appropriate correction is required. This objection applies to claims 2-10 and 21-22 that depend upon claim 1. Claim 1 at lines 11-12 includes “the first data line and the second data line are neighboring each other and receive corresponding data signal, respectively”, which is grammatically incorrect. This objection may be overcome, for example, by amending it to “the first data line and the second data line are neighboring each other and each receive a corresponding data signal, respectively”. Appropriate correction is required. This objection applies to claims 2-10 and 21-22 that depend upon claim 1. Claim 1 at lines 14-15 includes “the third data line and the fourth data line are neighboring each other and receive corresponding data signal, respectively”, which is grammatically incorrect. This objection may be overcome, for example, by amending it to “the third data line and the fourth data line are neighboring each other and each receive a corresponding data signal, respectively”. Appropriate correction is required. This objection applies to claims 2-10 and 21-22 that depend upon claim 1. Claim 2 at line 2 includes an extra space between each of the words. This objection may be overcome, for example, by left justifying the claims. Appropriate correction is required. This objection applies to claims 3-10 that depend upon claim 2. Claim 3 at line 3 includes an extra space between each of the words. This objection may be overcome, for example, by left justifying the claims. Appropriate correction is required. This objection applies to claims 4-10 that depend upon claim 3. Claim 3 at lines 3-4 includes “the fifth data line and the sixth data line are neighboring each other and receive corresponding data signal, respectively”, which is grammatically incorrect. This objection may be overcome, for example, by amending it to “the fifth data line and the sixth data line are neighboring each other and each receive a corresponding data signal, respectively”. Appropriate correction is required. This objection applies to claims 4-10 that depend upon claim 3. Claim 7 at line 1 includes an extra space between each of the words. This objection may be overcome, for example, by left justifying the claims. Appropriate correction is required. Claim 9 at lines 2-3 includes “the sub-pixel circuit column that is connected to the second data line” lacks antecedent basis. This objection may be overcome, for example, by amending it to “a sub-pixel circuit column that is connected to the second data line”. Appropriate correction is required. Claim 10 at line 2 includes “are to face each other” is grammatically incorrect. This objection may be overcome, for example, by amending it to “ Claim 11 at line 6 includes an extra space between each of the words. This objection may be overcome, for example, by left justifying the claims. Appropriate correction is required. This objection applies to claims 12-15 and 23-24 that depend upon claim 11. Claim 12 at line 2 includes an extra space between each of the words. This objection may be overcome, for example, by left justifying the claims. Appropriate correction is required. Claim 14 at line 2 includes an extra space between each of the words. This objection may be overcome, for example, by left justifying the claims. Appropriate correction is required. Claim 16 at line 6 includes an extra space between each of the words. This objection may be overcome, for example, by left justifying the claims. Appropriate correction is required. This objection applies to claims 17-20 and 25-26 that depend upon claim 16. Claim 17 at line 2 includes an extra space between each of the words. This objection may be overcome, for example, by left justifying the claims. Appropriate correction is required. Claim 17 at line 5 includes a space between “column” and “,” that is grammatically incorrect. This objection may be overcome, for example, by removing this space. Appropriate correction is required. Claim 19 at line 2 includes an extra space between each of the words. This objection may be overcome, for example, by left justifying the claims. Appropriate correction is required. Claim 22 at line 2 includes an extra space between each of the words. This objection may be overcome, for example, by left justifying the claims. Appropriate correction is required. Claim Rejections - 35 USC § 102 5. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 6. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. 7. Claims 1-3 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by U.S. Patent Pub. No. 2020/0043406 A1 to Cha et al. (“Cha”). PNG media_image1.png 577 447 media_image1.png Greyscale PNG media_image2.png 200 400 media_image2.png Greyscale PNG media_image3.png 577 465 media_image3.png Greyscale PNG media_image4.png 200 400 media_image4.png Greyscale PNG media_image5.png 644 371 media_image5.png Greyscale PNG media_image6.png 200 400 media_image6.png Greyscale As to claim 1, Cha discloses a display apparatus (FIG. 1: 100; ¶0043) comprising: a display(100)(FIG. 1; ¶0043) comprising sub-pixel circuits(SPX)(FIGs. 1, 3, 5; ¶¶0057, 0108-0112) arranged in a row direction and a column direction (FIGs. 3, 5: SPX; ¶¶0108-0112) and data lines(D1-D4, etc.)(FIGs. 1-3, 5; ¶¶0078, 0116 – since other plurality of switch circuits SC exists besides the one shown in FIG. 2 {¶0078}, there must be at least another four more data lines for each of these SCs) connected to corresponding sub-pixel circuits(SPX)(FIGs. 1, 3, 5: 140; ¶¶0057, 0108-0112); a data driving circuit(120)(FIG. 1; ¶0052) that outputs data signals through output lines(B1-BM)(FIGs. 1-3; ¶¶0052-0054); a data distributor(130, SC)(FIGs. 1-3; ¶¶0056, 0076) selectively connecting each of the output lines(B1-BM)(FIGs. 1-3; ¶¶0052-0054) to one(D1 or D3 of DG1; D2 or D4 of DG2)(FIGs. 2-3; ¶0056) of a corresponding pair of data lines(DG1/D1&D3, DG2/D2&D4)(FIGs. 2-3; ¶0056) among the data lines(D1-D4, etc.)(FIGs. 1-3, 5; ¶¶0078, 0116) according to a first control signal(CLa)(FIGs. 1-4: SC; ¶¶0082-0084) and a second control signal(CLb)(FIGs. 1-4: SC; ¶¶0082-0084); and a control circuit(110)(FIG. 1; ¶0044) that alternately outputs the first control signal(CLa)(FIGs. 1-4: SC; ¶¶0048, 0082-0084) and the second control signal(CLb)(FIGs. 1-4: SC; ¶¶0048, 0082-0084), wherein the data lines(D1-D4, etc.)(FIGs. 1-3, 5; ¶¶0078, 0116) comprise a first data line(D1)(FIGs. 2-3, 5; ¶0065), a second data line(D3)(FIGs. 2-3, 5; ¶0065), a third data line(D2)(FIGs. 2-3, 5; ¶0065), and a fourth data line(D4)(FIGs. 2-3, 5; ¶0065), the first data line(D1)(FIGs. 2-3, 5; ¶0065) and the second data line(D3)(FIGs. 2-3, 5; ¶0065) are neighboring each other (FIGs. 2-3, 5: D1, D3; ¶0065) and receive corresponding data signal, respectively (FIGs. 2-3, 5: D1, D3; ¶¶0065, 0084), according to different ones of the first control signal(CLa)(FIGs. 1-4: SC, D1; ¶¶0048, 0082-0084) and the second control signal(CLb)(FIGs. 1-4: SC, D3; ¶¶0048, 0082-0084), the third data line(D2)(FIGs. 2-3, 5; ¶0065) and the fourth data line(D4)(FIGs. 2-3, 5; ¶0065) are neighboring each other (FIGs. 2-3, 5: D2, D4; ¶0065) and receive corresponding data signal, respectively (FIGs. 2-3, 5: D2, D4; ¶¶0065, 0084) according to a same one of the first control signal(CLa)(FIGs. 1-4: SC, D2; ¶¶0048, 0082-0084) and the second control signal(CLb)(FIGs. 1-4: SC, D4; ¶¶0048, 0082-0084), the first data line(D1)(FIGs. 2-3, 5; ¶0065) and the second data line(D3)(FIGs. 2-3, 5; ¶0065) are spaced apart from each other by at least one sub-pixel circuit column(from far left the 2nd and 3rd column of SPX)(FIGs. 1, 3, 5: 140; ¶¶0057, 0108-0112), and two neighboring data lines (FIG. 3; ¶0065 – FIG. 3 depicts at different regions: D1 and D3 are neighbors; D1 and D2 are neighbors; D2 and D4 are neighbors; D3 and D4 are neighbors) among the first data line(D1)(FIGs. 2-3, 5; ¶0065), the second data line(D3)(FIGs. 2-3, 5; ¶0065), the third data line(D2)(FIGs. 2-3, 5; ¶0065), and the fourth data line(D4)(FIGs. 2-3, 5; ¶0065) are arranged to face each other (FIG. 3; ¶0065 – FIG. 3 depicts at different regions: D1 and D3 are neighbors and face each other; D1 and D2 are neighbors and face each other; D2 and D4 are neighbors and face each other; D3 and D4 are neighbors and face each other). As to claim 2, Cha discloses the display apparatus of claim 1, as applied above. Cha further discloses wherein each of the data lines(D1-D4, etc.)(FIGs. 1-3, 5; ¶¶0078, 0116 – since other plurality of switch circuits SC exists besides the one shown in FIG. 2 {¶0078}, there must be at least another four more data lines for each of these SCs) is arranged on either a first side(right side) or a second side(left side) of a corresponding sub-pixel circuit column(from far left the 1st to 4th columns of SPX)(FIGs. 1, 3, 5: 140; ¶¶0057, 0108-0112), the third data line(D2)(FIGs. 2-3, 5; ¶0065) is arranged on the second side(left side) of the corresponding sub-pixel circuit column(from far left the 2nd column of SPX)(FIGs. 1, 3, 5: 140; ¶¶0057, 0108-0112), and the fourth data line(D4)(FIGs. 2-3, 5; ¶0065) is arranged on the first side(right side) of the corresponding sub-pixel circuit column(from far left the 2nd column of SPX)(FIGs. 1, 3, 5: 140; ¶¶0057, 0108-0112). As to claim 3, Cha discloses the display apparatus of claim 2, as applied above. Cha further discloses wherein the data lines(D1-D4, etc.)(FIGs. 1-3, 5; ¶¶0078, 0116 – since other plurality of switch circuits SC exists besides the one shown in FIG. 2 {¶0078}, there must be at least another four more data lines for each of these SCs) further comprise a fifth data line(D5 similar to D1)(FIGs. 1-3, 5; ¶¶0078, 0116) and a sixth data line(D6 similar to D2)(FIGs. 1-3, 5; ¶¶0078, 0116), the fifth data line(D5 similar to D1)(FIGs. 1-3, 5; ¶¶0078, 0116) and the sixth data line(D7 similar to D3)(FIGs. 1-3, 5; ¶¶0078, 0116) are neighboring each other (D5 neighbors D6 similar to how D1 neighbors D2 in the SPX area)(FIGs. 1-3, 5; ¶¶0078, 0116) and receive corresponding data signal, respectively (FIGs. 2-3, 5: D5 and D6 similar to D1 and D2; ¶¶0065, 0084) according to a same one of the first control signal(CLa)(FIGs. 1-4: SC; ¶¶0082-0084) and the second control signal, the fifth data line(D5 similar to D1)(FIGs. 1-3, 5; ¶¶0078, 0116) is connected to a first output line(B1 of a 2nd from far left SC)(FIGs. 1-3; ¶¶0052-0054) from among the output lines(B1-BM)(FIGs. 1-3; ¶¶0052-0054) according to the first control signal(CLa)(FIGs. 1-4: SC; ¶¶0082-0084), the sixth data line(D6 similar to D2)(FIGs. 1-3, 5; ¶¶0078, 0116) is connected to a second output line(B2 of a 2nd from far left SC)(FIGs. 1-3; ¶¶0052-0054) from among the output lines(B1-BM)(FIGs. 1-3; ¶¶0052-0054) according to the first control signal(CLa)(FIGs. 1-4: SC; ¶¶0082-0084), the first data line(D1)(FIGs. 2-3, 5; ¶0065) is connected to a third output line(B1 of a 1st from far left SC)(FIGs. 1-3; ¶¶0052-0054) from among the output lines(B1-BM)(FIGs. 1-3; ¶¶0052-0054) according to the first control signal(CLa)(FIGs. 1-4: SC; ¶¶0082-0084), and the second data line(D3)(FIGs. 2-3, 5; ¶0065) is connected to the first output line(B1 of a 2nd from far left SC)(FIGs. 1-3; ¶¶0052-0054) according to the second control signal(CLb)(FIGs. 1-4: SC; ¶¶0082-0084 – D3 is coupling connected to B1 of a 2nd from far left SC via SW3 of 2nd from far left SC), the third data line(D2)(FIGs. 2-3, 5; ¶0065) is connected to the second output line(B2 of a 2nd from far left SC)(FIGs. 1-3; ¶¶0052-0054) according to the second control signal(CLb)(FIGs. 1-4: SC; ¶¶0082-0084 – D2 is coupling connected to B2 of a 2nd from far left SC via SW4 of 2nd from far left SC), and the fourth data line(D4)(FIGs. 2-3, 5; ¶0065) is connected to the third output line(B1 of a 1st from far left SC)(FIGs. 1-3; ¶¶0052-0054) according to the second control signal(CLb)(FIGs. 1-4: SC; ¶¶0082-0084 – D4 is coupling connected to B1 of a 1st from far left SC via SW3 of 2nd from far left SC). 8. Claims 11, 13-14, 16 and 18-19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by U.S. Patent Pub. No. 2016/0019842 A1 to Kim. PNG media_image7.png 789 1114 media_image7.png Greyscale PNG media_image8.png 2245 1595 media_image8.png Greyscale PNG media_image9.png 200 400 media_image9.png Greyscale PNG media_image10.png 200 400 media_image10.png Greyscale PNG media_image11.png 404 621 media_image11.png Greyscale PNG media_image10.png 200 400 media_image10.png Greyscale As to claim 11, Kim discloses a display apparatus (FIG. 1; ¶0030) comprising: a display (FIGs. 1-2: DSP; ¶¶0030-0031) comprising sub-pixel circuits(R, G, B)(FIGs. 2, 5: PGO-PGE; ¶¶0031, 0033) arranged in a row direction and a column direction (FIGs. 2, 5: PGO-PGE, R, G, B; ¶¶0031, 0033), data lines(DL1-DLj)(FIGs. 1-2; ¶0031) connected to corresponding sub-pixel circuits(R, G, B)(FIGs. 2, 4, 5: PGO-PGE; ¶¶0031, 0033, 0035, 0047), and first voltage transfer lines(for each PXL: a vertical line providing ELVDD)(FIG. 4; ¶0034) extending in the column direction (FIG. 4: for each PXL an ELVDD line; ¶0034); a data driving circuit(DD)(FIGs. 1, 5; ¶0031) that outputs a data signal through output lines(OC1-OC6 and/or pairs of lines directly connected to each of OC1-OC6)(FIGs. 1, 5; ¶0073); a data distributor(D-MUX)(FIGs 1, 5; ¶0075) selectively connecting each of the output lines(OC1-OC6 and/or pairs of lines directly connected to each of OC1-OC6)(FIGs. 1, 5; ¶0073) to one of(one of: DL1/DL4, DL2/DL5, DL3/DL6, DL7/DL10, D8/D11, D9/D12)(FIGs. 1-2, 5; ¶0077) a corresponding pair of data lines(DL1/DL4, DL2/DL5, DL3/DL6, DL7/DL10, D8/D11, D9/D12)(FIGs. 1-2, 5; ¶0077) among the data lines(DL1-DLj)(FIGs. 1-2, 5; ¶0031) according to a first control signal(CS1)(FIG. 5; ¶0068) and a second control signal(CS2)(FIG. 5; ¶0068); and a control circuit(D-MUX, CL1)(FIG. 5; ¶0068) that alternately outputs the first control signal(CS1)(FIG. 5; ¶0068) and the second control signal(CS2)(FIG. 5; ¶0068), wherein the data lines(DL1-DLj)(FIGs. 1-2, 5; ¶0031) comprise first groups(DL1-DL3, DL7-DL9)(FIGs. 1-2, 5; ¶0031) and second groups(DL4-DL6, DL10-DL12)(FIGs. 1-2, 5; ¶0031), each of the first groups(DL1-DL3, DL7-DL9)(FIGs. 1-2, 5; ¶0031) comprise a first data line(DL1, DL7)(FIGs. 1-2, 5; ¶0031), a second data line(DL2, DL8)(FIGs. 1-2, 5; ¶0031), and a third data line(DL3, DL9)(FIGs. 1-2, 5; ¶0031) that are sequentially arranged in the row direction (FIGs. 1-2, 5: DL1-DL3, DL7-DL9; ¶0031) and that receive data signals according to the first control signal(CS1)(FIG. 5; ¶¶0045, 0068, 0073), each of the second groups(DL4-DL6, DL10-DL12)(FIGs. 1-2, 5; ¶0031) comprise a fourth data line(DL4, DL10)(FIGs. 1-2, 5; ¶0031), a fifth data line(DL5, DL11)(FIGs. 1-2, 5; ¶0031), and a sixth data line(DL6, DL12)(FIGs. 1-2, 5; ¶0031) that are sequentially arranged in the row direction (FIGs. 1-2, 5: DL4-DL6, DL10-DL12; ¶0031) and that receive data signals according to the second control signal(CS2)(FIG. 5; ¶¶0045, 0068, 0073), the first groups(DL1-DL3, DL7-DL9)(FIGs. 1-2, 5; ¶0031) and the second groups(DL4-DL6, DL10-DL12)(FIGs. 1-2, 5; ¶0031) are alternately arranged in the row direction (FIGs. 1-2, 5: DL1-DL3, DL4-DL6, DL7-DL9, DL10-DL12; ¶0031), and one of the first voltage transfer lines(for each PXL: a vertical line providing ELVDD)(FIG. 4; ¶0034) is disposed between the third data line(DL3, DL9)(FIGs. 1-2, 5; ¶0031) and the fourth data line(DL4, DL10)(FIGs. 1-2, 5; ¶0031 – as shown in FIG. 4: each pixel has an ELVDD line at its left side with its data line Vdata at its right side). As to claim 13, Kim discloses the display apparatus of claim 11, as applied above. Kim further discloses wherein the first data line(DL1)(FIGs. 1-2; ¶0031) is connected to a first output line(left one of pair of lines directly connected to OC1)(FIGs. 1, 5; ¶0073) from among the output lines(pairs of lines directly connected to each of OC1-OC6)(FIGs. 1, 5; ¶0073) according to the first control signal(CS1)(FIG. 5; ¶¶0045, 0068, 0073), the second data line(DL2)(FIGs. 1-2; ¶0031) is connected to a second output line(left one of pair of lines directly connected to OC2)(FIGs. 1, 5; ¶0073) from among the output lines(pairs of lines directly connected to each of OC1-OC6)(FIGs. 1, 5; ¶0073) according to the first control signal(CS1)(FIG. 5; ¶¶0045, 0068, 0073), the third data line(DL3)(FIGs. 1-2; ¶0031) is connected to a third output line(left one of pair of lines directly connected to OC3)(FIGs. 1, 5; ¶0073) from among the output lines(pairs of lines directly connected to each of OC1-OC6)(FIGs. 1, 5; ¶0073) according to the first control signal(CS1)(FIG. 5; ¶¶0045, 0068, 0073), the fourth data line(DL4)(FIGs. 1-2; ¶0031) is connected to the first output line(left one of pair of lines directly connected to OC1)(FIGs. 1, 5; ¶0073) according to the second control signal(CS2)(FIG. 5; ¶¶0045, 0068, 0073 – DL4 is coupling connected to the left on of pair of lines directly connected to OC1 via CS2), the fifth data line(DL5)(FIGs. 1-2; ¶0031) is connected to the second output line(left one of pair of lines directly connected to OC2)(FIGs. 1, 5; ¶0073) according to the second control signal(CS2)(FIG. 5; ¶¶0045, 0068, 0073 – DL5 is coupling connected to the left one of pair of lines directly connected to OC2 via CS2), and the sixth data line(DL6)(FIGs. 1-2; ¶0031) is connected to the third output line(left one of pair of lines directly connected to OC3)(FIGs. 1, 5; ¶0073) according to the second control signal(CS2)(FIG. 5; ¶¶0045, 0068, 0073 – DL6 is coupling connected to the left one of pair of lines directly connected to OC3 via CS2). As to claim 14, Kim discloses the display apparatus of claim 11, as applied above. Kim further discloses wherein the display (FIGs. 1-2: DSP; ¶¶0030-0031) further comprises second voltage transfer lines(any one of each PXL’s horizontal line shown as: a horizontal line directly below ELVDD, a horizontal line directly above Vint, a horizontal line directly above ELVSS or the horizontal lines shown as SLN-1)(FIGs. 1-2, 4-5; ¶¶0034, 0049) extending in the row direction (FIGs. 1-2, 4-5: any one of each PXL’s horizontal line shown as: a horizontal line directly below ELVDD, a horizontal line directly above Vint, a horizontal line directly above ELVSS or the horizontal lines shown as SLN-1; ¶¶0034, 0049), and the first voltage transfer lines(for each PXL: a vertical line providing ELVDD)(FIG. 4; ¶0034) are connected to the second voltage transfer lines(any one of each PXL’s horizontal line shown as: a horizontal line directly below ELVDD, a horizontal line directly above Vint, a horizontal line directly above ELVSS or the horizontal lines shown as SLN-1)(FIGs. 1-2, 4-5; ¶¶0034, 0049 – second voltage transfer lines {FIGs. 1-2, 4-5: any one of each PXL’s horizontal line shown as: a horizontal line directly below ELVDD, a horizontal line directly above Vint, a horizontal line directly above ELVSS or the horizontal lines shown as SLN-1} is either directly or coupling connected to the first voltage transfer lines {FIG. 4: for each PXL: a vertical line providing ELVDD}). As to claim 16, Kim discloses a display apparatus (FIG. 1; ¶0030) comprising: a display (FIGs. 1-2: DSP; ¶¶0030-0031) comprising sub-pixel circuits(R, G, B)(FIGs. 2, 5: PGO-PGE; ¶¶0031, 0033) arranged in a row direction and a column direction (FIGs. 2, 5: PGO-PGE, R, G, B; ¶¶0031, 0033), data lines(DL1-DLj)(FIGs. 1-2; ¶0031) connected to corresponding sub-pixel circuits(R, G, B)(FIGs. 2, 4, 5: PGO-PGE; ¶¶0031, 0033, 0035, 0047), and first voltage transfer lines(for each PXL: a vertical line providing ELVDD)(FIG. 4; ¶0034) extending in the column direction (FIG. 4: for each PXL an ELVDD line; ¶0034); a data driving circuit(DD)(FIGs. 1, 5; ¶0031) that outputs a data signal through output lines(OC1-OC6 and/or pairs of lines directly connected to each of OC1-OC6)(FIGs. 1, 5; ¶0073); a data distributor(D-MUX)(FIGs 1, 5; ¶0075) selectively connecting each of the output lines(OC1-OC6 and/or pairs of lines directly connected to each of OC1-OC6)(FIGs. 1, 5; ¶0073) to one of(one of: DL1/DL4, DL2/DL5, DL3/DL6, DL7/DL10, D8/D11, D9/D12)(FIGs. 1-2, 5; ¶0077) a corresponding pair of data lines(DL1/DL4, DL2/DL5, DL3/DL6, DL7/DL10, D8/D11, D9/D12)(FIGs. 1-2, 5; ¶0077) among the data lines(DL1-DLj)(FIGs. 1-2, 5; ¶0031) according to a first control signal(CS1)(FIG. 5; ¶0068) and a second control signal(CS2)(FIG. 5; ¶0068); and a control circuit(D-MUX, CL1)(FIG. 5; ¶0068) that alternately outputs the first control signal(CS1)(FIG. 5; ¶0068) and the second control signal(CS2)(FIG. 5; ¶0068), wherein the data lines(DL1-DLj)(FIGs. 1-2; ¶0031) comprise first groups(DL1-DL3, DL7-DL9)(FIGs. 1-2; ¶0031) and second groups(DL4-DL6, DL10-DL12)(FIGs. 1-2; ¶0031), each of the first groups(DL1-DL3, DL7-DL9)(FIGs. 1-2; ¶0031) comprise a first data line(DL1, DL7)(FIGs. 1-2; ¶0031), a second data line(DL2, DL8)(FIGs. 1-2; ¶0031), and a third data line(DL3, DL9)(FIGs. 1-2; ¶0031) that are sequentially arranged in the row direction (FIGs. 1-2: DL1-DL3, DL7-DL9; ¶0031) and that are connected to a corresponding one of the output lines(OC1-OC6 and/or pairs of lines directly connected to each of OC1-OC6)(FIGs. 1, 5; ¶0073) according to the first control signal(CS1)(FIG. 5; ¶0068), each of the second groups(DL4-DL6, DL10-DL12)(FIGs. 1-2; ¶0031) comprise a fourth data line(DL4, DL10)(FIGs. 1-2; ¶0031), a fifth data line(DL5, DL11)(FIGs. 1-2; ¶0031), and a sixth data line(DL6, DL12)(FIGs. 1-2; ¶0031) that are sequentially arranged in the row direction (FIGs. 1-2: DL4-DL6, DL10-DL12; ¶0031) and that are connected to a corresponding one of the output lines(OC1-OC6 and/or pairs of lines directly connected to each of OC1-OC6)(FIGs. 1, 5; ¶0073) according to the second control signal(CS21)(FIG. 5; ¶0068), the first group(DL1-DL3, DL7-DL9)(FIGs. 1-2; ¶0031) and the second group(DL4-DL6, DL10-DL12)(FIGs. 1-2; ¶0031) are alternately arranged in the row direction (FIGs. 1-2: DL1-DL3, DL4-DL6, DL7-DL9, DL10-DL12; ¶0031), and one of the first voltage transfer lines(for each PXL: a vertical line providing ELVDD)(FIG. 4; ¶0034) is disposed between the sixth data line(DL6)(FIGs. 1-2; ¶0031) and the first data line(DL1)(FIGs. 1-2; ¶0031 – FIG. 4 depicts a vertical line providing ELVDD is on PXL’s left side and Vdata is on its right side, and thus any one of the vertical lines providing ELVDD to a PXL in the 2nd through 6th columns of PXL is a first voltage transfer line between 1st and 6th data lines.). As to claim 18, Kim discloses the display apparatus of claim 16, as applied above. Kim further discloses wherein the first data line(DL1)(FIGs. 1-2; ¶0031) is connected to a first output line(left one of pair of lines directly connected to OC1)(FIGs. 1, 5; ¶0073) from among the output lines(pairs of lines directly connected to each of OC1-OC6)(FIGs. 1, 5; ¶0073) according to the first control signal(CS1)(FIG. 5; ¶¶0045, 0068, 0073), the second data line(DL2)(FIGs. 1-2; ¶0031) is connected to a second output line(left one of pair of lines directly connected to OC2)(FIGs. 1, 5; ¶0073) from among the output lines(pairs of lines directly connected to each of OC1-OC6)(FIGs. 1, 5; ¶0073) according to the first control signal(CS1)(FIG. 5; ¶¶0045, 0068, 0073), the third data line(DL3)(FIGs. 1-2; ¶0031) is connected to a third output line(left one of pair of lines directly connected to OC3)(FIGs. 1, 5; ¶0073) from among the output lines(pairs of lines directly connected to each of OC1-OC6)(FIGs. 1, 5; ¶0073) according to the first control signal(CS1)(FIG. 5; ¶¶0045, 0068, 0073), the fourth data line(DL4)(FIGs. 1-2; ¶0031) is connected to the first output line(left one of pair of lines directly connected to OC1)(FIGs. 1, 5; ¶0073) according to the second control signal(CS2)(FIG. 5; ¶¶0045, 0068, 0073 – DL4 is coupling connected to the left on of pair of lines directly connected to OC1 via CS2), the fifth data line(DL5)(FIGs. 1-2; ¶0031) is connected to the second output line(left one of pair of lines directly connected to OC2)(FIGs. 1, 5; ¶0073) according to the second control signal(CS2)(FIG. 5; ¶¶0045, 0068, 0073 – DL5 is coupling connected to the left one of pair of lines directly connected to OC2 via CS2), and the sixth data line(DL6)(FIGs. 1-2; ¶0031) is connected to the third output line(left one of pair of lines directly connected to OC3)(FIGs. 1, 5; ¶0073) according to the second control signal(CS2)(FIG. 5; ¶¶0045, 0068, 0073 – DL6 is coupling connected to the left one of pair of lines directly connected to OC3 via CS2). As to claim 19, Kim discloses the display apparatus of claim 16, as applied above. Kim further discloses wherein the display (FIGs. 1-2: DSP; ¶¶0030-0031) further comprises second voltage transfer lines(any one of each PXL’s horizontal line shown as: a horizontal line directly below ELVDD, a horizontal line directly above Vint, a horizontal line directly above ELVSS or the horizontal lines shown as SLN-1)(FIGs. 1-2, 4-5; ¶¶0034, 0049) extending in the row direction (FIGs. 1-2, 4-5: any one of each PXL’s horizontal line shown as: a horizontal line directly below ELVDD, a horizontal line directly above Vint, a horizontal line directly above ELVSS or the horizontal lines shown as SLN-1; ¶¶0034, 0049), and the first voltage transfer lines(for each PXL: a vertical line providing ELVDD)(FIG. 4; ¶0034) are connected to the second voltage transfer lines(any one of each PXL’s horizontal line shown as: a horizontal line directly below ELVDD, a horizontal line directly above Vint, a horizontal line directly above ELVSS or the horizontal lines shown as SLN-1)(FIGs. 1-2, 4-5; ¶¶0034, 0049 – second voltage transfer lines {FIGs. 1-2, 4-5: any one of each PXL’s horizontal line shown as: a horizontal line directly below ELVDD, a horizontal line directly above Vint, a horizontal line directly above ELVSS or the horizontal lines shown as SLN-1} is either directly or coupling connected to the first voltage transfer lines {FIG. 4: for each PXL: a vertical line providing ELVDD}). Claim Rejections – 35 USC § 103 9. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent may not be obtained though the invention is not identically disclosed or described as set forth in section 102 of this title, if the differences between the subject matter sought to be patented and the prior art are such that the subject matter as a whole would have been obvious at the time the invention was made to a person having ordinary skill in the art to which said subject matter pertains. Patentability shall not be negatived by the manner in which the invention was made. 10. Claims 12 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Pub. No. 2016/0019842 A1 to Kim in view of U.S. Patent Pub. No. 2024/0177663 A1 to Li et al. (“Li”). As to claim 12, Kim discloses the display apparatus of claim 11, as applied above but does not disclose the above underlined limitations. Kim further discloses wherein each of the data lines(DL1-DLj)(FIGs. 1-2, 5; ¶0031) is arranged on either a first side(right side) or a second side(left side) of a corresponding sub-pixel circuit column(one of: column of Rs, column of Gs, column of Bs)(FIGs. 2, 5: PGO-PGE; ¶¶0031, 0033), and each of even-numbered data lines(even ones of: DL1-DLj)(FIGs. 1-2, 5; ¶0031) is arranged on the first side(right side) of the corresponding sub-pixel circuit column(one of: column of Rs, column of Gs, column of Bs)(FIGs. 2, 5: PGO-PGE; ¶¶0031, 0033). Kim does not disclose each of odd-numbered data lines is arranged on the second side of the corresponding sub-pixel circuit column. PNG media_image12.png 200 400 media_image12.png Greyscale Li discloses each of odd-numbered data lines(31, 33, 35)(FIG. 3; ¶0097) is arranged on the second side(left side) of the corresponding sub-pixel circuit column(311, 313, 315)(FIG. 3; ¶0096). Before the effective filing date of the claimed invention it would have been obvious to a person of ordinary skill in the art to modify Kim with Li to provide a display apparatus that is brighter by having a higher aspect ratio (i.e., Kim discloses spacing on either side of each data line in the display area which is modified by Li so that a space on sides of two data lines is shared). As to claim 17, Kim discloses the display apparatus of claim 16, as applied above but does not disclose the above underlined limitations. Kim further discloses wherein each of the data lines(DL1-DLj)(FIGs. 1-2, 5; ¶0031) is arranged on either a first side(left side) or a second side(right side) of a corresponding sub-pixel circuit column(one of: column of Rs, column of Gs, column of Bs)(FIGs. 2, 5: PGO-PGE; ¶¶0031, 0033), and each of even-numbered data lines(even ones of: DL1-DLj)(FIGs. 1-2, 5; ¶0031) is arranged on the second side(right side) of the corresponding sub-pixel circuit column(one of: column of Rs, column of Gs, column of Bs)(FIGs. 2, 5: PGO-PGE; ¶¶0031, 0033). Kim does not disclose each of odd-numbered data lines is arranged on the first side of the corresponding sub-pixel circuit column. Li discloses each of odd-numbered data lines(31, 33, 35)(FIG. 3; ¶0097) is arranged on the first side(left side) of the corresponding sub-pixel circuit column(311, 313, 315)(FIG. 3; ¶0096). The motivation to combine Li is set forth above for claim 12. 11. Claims 21-22 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Pub. No. 2020/0043406 A1 to Cha et al. (“Cha”) in view of U.S. Patent Pub. No. 2017/0221979 A1 to Chae. As to claim 21, Cha discloses the display apparatus of claim 1 as applied above. Cha does not expressly disclose an electronic device comprising the display apparatus of claim 1. PNG media_image13.png 200 400 media_image13.png Greyscale PNG media_image14.png 200 400 media_image14.png Greyscale Chae discloses an electronic device (¶0275) comprising a display apparatus (FIGs. 1-2; ¶¶0083, 0275). Before the effective filing date of the claimed invention it would have been obvious to a person of ordinary skill in the art to modify Cha with Chae to provide a display apparatus that can be conveniently moved to different locations. As to claim 22, Cha and Chae teach the electronic device of claim 21, wherein, as applied above. Chae further discloses the electronic device (¶0275) is a mobile phone (¶0275), a smartphone (¶0275), a tablet personal computer (¶0275), a mobile communication terminal (¶0275), an electronic notebook (¶0275), an electronic book (¶0275), a portable multimedia player, a navigation, an ultra-mobile PC, a television, a laptop (¶0275), a monitor, a billboard, an Internet-of-Things device, a smart watch, a watch phone, a glasses-type display, a head-mounted display, a center information display disposed on a center fascia or dashboard of a vehicle, a room mirror display, or a display disposed on a rear surface of a front seat of the vehicle. The motivation to combine the additional teachings of claim 22 is for the same reasoning set forth above for claim 21. 12. Claims 23-26 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Pub. No. 2016/0019842 A1 to Kim in view of U.S. Patent Pub. No. 2017/0221979 A1 to Chae. As to claim 23, Kim discloses the display apparatus of claim 11 as applied above. Kim does not expressly disclose an electronic device comprising the display apparatus of claim 11. Chae discloses an electronic device (¶0275) comprising a display apparatus (FIGs. 1-2; ¶¶0083, 0275). Before the effective filing date of the claimed invention it would have been obvious to a person of ordinary skill in the art to modify Kim with Chae to provide a display apparatus that can be conveniently moved to different locations. As to claim 24, Kim and Chae teach the electronic device of claim 23, as applied above. Chae further discloses wherein, the electronic device (¶0275) is a mobile phone (¶0275), a smartphone (¶0275), a tablet personal computer (¶0275), a mobile communication terminal (¶0275), an electronic notebook (¶0275), an electronic book (¶0275), a portable multimedia player, a navigation, an ultra-mobile PC, a television, a laptop (¶0275), a monitor, a billboard, an Internet-of-Things device, a smart watch, a watch phone, a glasses-type display, a head-mounted display, a center information display disposed on a center fascia or dashboard of a vehicle, a room mirror display, or a display disposed on a rear surface of a front seat of the vehicle. The motivation to combine the additional teachings of claim 24 is for the same reasoning set forth above for claim 23. As to claim 25, Kim discloses the display apparatus of claim 16 as applied above. Kim does not expressly disclose an electronic device comprising the display apparatus of claim 16. Chae discloses an electronic device (¶0275) comprising a display apparatus (FIGs. 1-2; ¶¶0083, 0275). Before the effective filing date of the claimed invention it would have been obvious to a person of ordinary skill in the art to modify Kim with Chae to provide a display apparatus that can be conveniently moved to different locations. As to claim 26, Kim and Chae teach the electronic device of claim 25, as applied above. Chae further discloses wherein, the electronic device (¶0275) is a mobile phone (¶0275), a smartphone (¶0275), a tablet personal computer (¶0275), a mobile communication terminal (¶0275), an electronic notebook (¶0275), an electronic book (¶0275), a portable multimedia player, a navigation, an ultra-mobile PC, a television, a laptop (¶0275), a monitor, a billboard, an Internet-of-Things device, a smart watch, a watch phone, a glasses-type display, a head-mounted display, a center information display disposed on a center fascia or dashboard of a vehicle, a room mirror display, or a display disposed on a rear surface of a front seat of the vehicle. The motivation to combine the additional teachings of claim 26 is for the same reasoning set forth above for claim 25. Potentially Allowable Subject Matter 13. As to claims 4-10, 15, and 20, if the above objections are overcome then they claims would become allowable (i.e., objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims). Reasons for Allowance 11. The following is examiner’s statement of reasons for allowance: the claimed invention is directed to: PNG media_image15.png 200 400 media_image15.png Greyscale Dependent claim 4 identifies the distinct features: “wherein the first data line(FIG. 6: DL1) is arranged on the first side(left side) of the corresponding sub-pixel circuit column(FIG. 6: from far left first column of subpixels PCr)”, with all other limitations as claimed. The closest prior art, U.S. Patent Pub. No. 2020/0043406 A1 to Cha et al. (“Cha”), either singularly or in combination, fails to anticipate or render obvious the above underlined features associated with other features of this claim. As to claim 4, Cha discloses the display apparatus of claim 3, as applied above. Cha further discloses wherein the second data line(D3)(FIGs. 2-3, 5; ¶0065) is arranged on the first side(right side) of the corresponding sub-pixel circuit column(from far left the 2nd column of SPX)(FIGs. 1, 3, 5: 140; ¶¶0057, 0108-0112). Cha does not disclose the above underline limitations. Dependent claim 8 identifies the distinct features: “wherein the first data line(FIG. 6: DL1) is arranged on the first side(left side) of the corresponding sub-pixel circuit column(FIG. 6: from far left first column of subpixels PCr), and the second data line(FIG. 6: DL2) is arranged on the second side(right side) of the corresponding sub-pixel circuit column(FIG. 6: from far left first column of subpixels PCr)”, with all other limitations as claimed. The closest prior art, U.S. Patent Pub. No. 2020/0043406 A1 to Cha et al. (“Cha”), either singularly or in combination, fails to anticipate or render obvious the above underlined features associated with other features of this claim. As to claim 8, Cha discloses the display apparatus of claim 3, as applied above but does not disclose the above underlined limitations. PNG media_image10.png 200 400 media_image10.png Greyscale PNG media_image16.png 200 400 media_image16.png Greyscale PNG media_image17.png 584 819 media_image17.png Greyscale Dependent claim 15 identifies the distinct features: “wherein six data lines(FIG. 12A: DL7-DL12) are disposed between two neighboring first voltage transfer lines(FIGs. 10, 12A: neighboring VLvs) from among the first voltage transfer lines(FIGs. 10, 12A: VLvs)”, with all other limitations as claimed. The closest prior art, U.S. Patent Pub. No. 2016/0019842 A1 to Kim, either singularly or in combination, fails to anticipate or render obvious the above underlined features associated with other features of this claim. As to claim 15, Kim discloses the display apparatus of claim 11, as applied above but does not disclose the above underlined limitations. PNG media_image18.png 576 527 media_image18.png Greyscale Dependent claim 20 identifies the distinct features: “wherein six data lines(FIG. 12A: DL7-DL12) are disposed between two neighboring first voltage transfer lines(FIGs. 10, 12A: neighboring VLvs) from among the first voltage transfer lines(FIGs. 10, 12A: VLvs)”, with all other limitations as claimed. The closest prior art, U.S. Patent Pub. No. 2016/0019842 A1 to Kim, either singularly or in combination, fails to anticipate or render obvious the above underlined features associated with other features of this claim. As to claim 20, Kim discloses the display apparatus of claim 16, as applied above but does not disclose the above underlined limitations. Other Relevant Prior Art 14. Other relevant prior art includes: U.S. Patent Pub. No. 2019/0164502 A1 to Yoon et al. (“Yoon”): PNG media_image19.png 200 400 media_image19.png Greyscale PNG media_image20.png 200 400 media_image20.png Greyscale PNG media_image21.png 200 400 media_image21.png Greyscale As to claim 11, Yoon discloses a display apparatus(1000A)(FIG. 1; ¶0042) comprising: a display(100A)(FIG. 1; ¶0042) comprising sub-pixel circuits(SP1-SP4)(FIGs. 1-3: PGO-PGE; ¶¶0043, 0052, 0054-0055) arranged in a row direction and a column direction (FIGs. 1-3: SP1-SP4, PGO-PGE; ¶¶0043, 0052, 0054-0055), data lines(DL1-DLm)(FIGs. 1-2; ¶0053) connected to corresponding sub-pixel circuits (SP1-SP4)(FIGs. 1-3: PGO-PGE; ¶¶0043, 0052, 0054-0055), and first voltage transfer lines(OL1-OL4, etc.)(FIGs. 4-5; ¶0042) extending in the column direction (FIGs. 4-5: OL1-OL4, etc.; ¶0042); a data driving circuit(400)(FIG. 1; ¶0048) that outputs a data signal through output lines(CH1-CHm; OL1-OL4, etc.)(FIG. 1; ¶¶0048-0049); a data distributor(switches SW1-SW8)(FIGs 1-2; ¶0053) selectively connecting each of the output lines(CH1-CHm; OL1-OL4, etc.)(FIG. 1; ¶¶0048-0049, 0053) to one of(one of: DL1/DL5 or DL2/DL6 or DL3/DL7 or DL4/DL8)(FIGs. 1-2: 500, CON4; ¶0049) a corresponding pair of data lines(DL1/DL5 or DL2/DL6 or DL3/DL7 or DL4/DL8)(FIGs. 1-2: 500, CON4; ¶0049) among the data lines(DL1-DLm)(FIGs. 1-2; ¶0053) according to a first control signal(CLA)(FIG. 2; ¶¶0049, 0053) and a second control signal(CLB)(FIG. 2; ¶¶0049, 0053); and a control circuit(500)(FIGs 1-2; ¶0049) that alternately outputs the first control signal(CLA)(FIG. 2; ¶¶0049, 0053) and the second control signal(CLB)(FIG. 2; ¶¶0049, 0053). Conclusion 15. Any inquiry concerning this communication or earlier communications from the examiner should be directed to KIRK W HERMANN whose telephone number is (571) 270-3891. The examiner can normally be reached on Monday-Friday, 10am-7pm, EST. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, LunYi Lao can be reached on (571) 272-7671. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /KIRK W HERMANN/Examiner, Art Unit 2621
Read full office action

Prosecution Timeline

Dec 04, 2024
Application Filed
Oct 27, 2025
Non-Final Rejection — §102, §103
Jan 29, 2026
Response Filed
Mar 20, 2026
Final Rejection — §102, §103 (current)

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