DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 2-12 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
a) regarding claim 2:
It is unclear and therefore indefinite if “the first input” in line 15 is referring back to “a first input transistor” in line 2 or “a first input gate” in line 2.
Claim 2 recites the limitation "the fourth drain/source path" in line 16. There is insufficient antecedent basis for this limitation in the claim.
b) regarding claims 3-12:
The claims are rejected base on their dependency from claim 2.
Allowable Subject Matter
Claims 13-21 are allowed.
The following is a statement of reasons for the indication of allowable subject matter:
The prior art of record fails to disclose or make obvious a device, comprising: a first polycrystalline silicon on oxide diffusion edge gate to metal over diffusion capacitor including: a polycrystalline silicon on oxide diffusion edge connected to a first metal layer line; and a first metal over diffusion layer connected to a second metal layer line, wherein the first metal layer line is connected to one of the first input and the fourth drain/source path and the second metal layer line is connected to the other one of the first input and the fourth drain/source path; and a first metal over diffusion to metal over diffusion capacitor including: a second metal over diffusion layer connected to the first metal layer line; and a third metal over diffusion layer connected to the second metal layer line, along with all the other limitations as required by claim 13.
The prior art of record fails to disclose or make obvious a method of operating a sense amplifier, comprising: providing a first positive feedback voltage from the second drain/source to the first gate through: a first polycrystalline silicon on oxide diffusion edge gate to metal over diffusion capacitor including: a first polycrystalline silicon on oxide diffusion edge connected to a first metal layer line; and a first metal over diffusion layer connected to a second metal layer line, wherein the first metal layer line is connected to one of the first input and the second drain/source path and the second metal layer line is connected to the other one of the first input and the second drain/source path; and a second polycrystalline silicon on oxide diffusion edge gate to metal over diffusion capacitor including: a second polycrystalline silicon on oxide diffusion edge connected to the first metal layer line; and a second metal over diffusion layer connected to the second metal layer line, along with all the other limitations as required by claim 18.
Conclusion
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/PATRICK O NEILL/ Primary Examiner, Art Unit 2842
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