DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Species 3 (Figs. 11-12; Claims 1-20) in the reply filed on 05/11/2026 is acknowledged.
Claims 21-39 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species , there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 05/11/2026.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-3 and 10-13 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yoon et al. (US 2022/0208117 A1).
As to claim 1, Yoon et al. teaches a display apparatus ([0002]: display device) comprising:
a pixel unit comprising a first data line (DL1 in Figs. 4 and 8), a second data line (DL4 in Figs. 4 and 8), a third data line (DL10 in Fig. 8), and a fourth data line (DL13 in Fig. 8);
a data driving unit which outputs a data signal through data output lines (see Figs. 4 and 8, data output lines CH1, CH2, CH3);
a data distribution unit comprising: a first switch (see Figs. 4 and 8, first switch connected between DL1 and CH1) which connects a first data output line (CH1 in Figs. 4 and 8) from among the data output lines (CH1, CH2, CH3 in Figs. 4 and 8) to the first data line (DL1 in Figs. 4 and 8) according to a first control signal (first control signal MUX1, Figs. 4-5 and 8);
a second switch (see Figs. 4 and 8, second switch connected between DL4 and CH1) which connects the first data output line (CH1 in Figs. 4 and 8) to the second data line (DL4 in Figs. 4 and 8) according to a second control signal (second control signal MUX2, Figs. 4-5 and 8);
a third switch (see Fig. 8, third switch connected between DL10 and CH1) which connects a second data output line (CH1 in Fig. 8) from among the data output lines (CH1, CH2, CH3 in Fig. 8) to the third data line (DL10 in Fig. 8) according to a third control signal (third control signal MUX1, Figs. 4-5 and 8); and
a fourth switch (see Fig. 8, fourth switch connected between DL13 and CH1) which connects the second data output line (CH1 in Fig. 8) to the fourth data line (DL13 in Fig. 8) according to a fourth control signal (fourth control signal MUX2, Figs. 4-5 and 8); and
a control circuit comprising: a first power circuit which outputs the first control signal ([0082-0086]: control of MUX line MUX1); a second power circuit which outputs the second control signal ([0082-0086]: control of MUX line MUX2); a third power circuit which outputs the third control signal ([0082-0086]: control of MUX line MUX1); and a fourth power circuit which outputs the fourth control signal ([0082-0086]: control of MUX line MUX2);
wherein the first control signal (see Figs. 5 and 8, control of MUX line MUX1) has a same phase as a phase of the third control signal (see Figs. 5 and 8, same signal MUX1), and
the second control signal (see Figs. 5 and 8, control of MUX line MUX2) has a same phase as a phase of the fourth control signal (see Figs. 5 and 8, same signal MUX2).
As to claim 2, Yoon et al. teaches the display apparatus of claim 1, wherein the second data line (DL4 in Figs. 4 and 8) and the first data line (DL1 in Figs. 4 and 8) are spaced apart from each other with two columns interposed therebetween (see Figs. 4 and 8, two columns of G and B sub-pixels between DL1 and DL4), and the fourth data line (DL13 in Fig. 8) and the third data line (DL10 in Fig. 8) are spaced apart from each other with two columns interposed therebetween (see Figs. 4 and 8, two columns of G and B sub-pixels between DL10 and DL13).
As to claim 3, Yoon et al. teaches the display apparatus of claim 1, further comprising:
a first control signal line (see Figs. 4 and 8, MUX line MUX1) connecting the first switch (see Figs. 4 and 8, first switch connected between DL1 and CH1) and the first power circuit to each other ([0082-0084]: control of MUX line MUX1);
a second control signal line (see Figs. 4 and 8, MUX line MUX2) connecting the second switch (see Figs. 4 and 8, second switch connected between DL4 and CH1) and the second power circuit to each other ([0082-0085]: control of MUX line MUX2);
a third control signal line (see Figs. 4 and 8, MUX line MUX1) connecting the third switch (see Fig. 8, third switch connected between DL10 and CH1) and the third power circuit to each other ([0082-0084]: control of MUX line MUX1); and
a fourth control signal line connecting the fourth switch (see Fig. 8, fourth switch connected between DL13 and CH1) and the fourth power circuit to each other ([0082-0085]: control of MUX line MUX2).
As to claim 10, Yoon et al. teaches the display apparatus of claim 1, wherein the pixel unit further comprises a first pixel, a second pixel, a third pixel, and a fourth pixel, which are arranged in a same row (Fig. 8 shows a first pixel RGB, a second pixel RGB, a third pixel RGB, and a fourth pixel RGB, which are arranged in a same row; Abstract; [0078]: pixel),
the first data line (DL1 in Figs. 4 and 8) is connected to one of sub-pixels ([0079]: sub-pixel connected to data line DL1, see Figs. 4 and 8) of the first pixel (RGB in Figs. 4 and 8;[0078]) and the second data line (DL4 in Figs. 4 and 8) is connected to one of sub-pixels ([0079]: sub-pixel connected to data line DL4, see Figs. 4 and 8) of the second pixel (RGB in Figs. 4 and 8;[0078]), and the third data line (DL10 in Fig. 8) is connected to one of sub-pixels ([0079]; sub-pixel connected to data line DL10, see Fig. 8) of the third pixel (RGB in Fig. 8;[0078]; Abstract) and the fourth data line (DL13 in Fig. 8) is connected to one of sub-pixels ([0079]; sub-pixel connected to data line DL13, see Fig. 8) of the fourth pixel (RGB in Fig. 8;[0078]; Abstract).
As to claim 11, Yoon et al. teaches the display apparatus of claim 10, wherein the one of the sub-pixels of the first pixel (RGB in Figs. 4 and 8; [0078]), connected to the first data line (DL1 in Figs. 4 and 8), and the one of the sub-pixels of the second pixel (RGB in Figs. 4 and 8; [0078]), connected to the second data line (DL4 in Figs. 4 and 8), emit light of a same color (Figs. 4 and 8 show red color sub-pixels R connected to data lines DL1 and DL4) , and
the one of the sub-pixels of the third pixel (RGB in Fig. 8; [0078]), connected to the third data line (DL10 in Fig. 8), and the one of the sub-pixels of the fourth pixel (RGB in Fig. 8; [0078]; Abstract), connected to the fourth data line (DL13 in Fig. 8), emit light of a same color (Fig. 8 show red color sub-pixels R connected to data lines DL10 and DL13).
As to claim 12, Yoon et al. teaches the display apparatus of claim 10, wherein the pixel unit further comprises a fifth data line (DL2 in Figs. 4 and 8) between the first data line (DL1 in Figs. 4 and 8) and the second data line (DL4 in Figs. 4 and 8), a sixth data line (DL5 in Figs. 4 and 8) between the second data line (DL4 in Figs. 4 and 8) and the third data line (DL10 in Fig. 8), a seventh data line (DL11 in Fig. 8) between the third data line (DL10 in Fig. 8) and the fourth data line (DL13 in Fig. 8), and an eighth data line (D14 in Fig. 8), and
the data distribution unit further comprises a fifth switch(see Figs. 4 and 8, fifth switch connected between DL2 and CH2), a sixth switch (see Figs. 4 and 8, sixth switch connected between DL5 and CH2), a seventh switch(see Fig. 8, seventh switch connected between DL11 and CH2), and an eighth switch(see Fig. 8, eighth switch connected between DL14 and CH2), wherein the fifth switch (see Figs. 4 and 8, fifth switch connected between DL2 and CH2) connects a third data output line (CH2 in Figs. 4 and 8) from among the data output lines (CH1, CH2, CH3 in Figs. 4 and 8) to the fifth data line (DL2 in Figs. 4 and 8) according to the first control signal ([0082-0086]: control of MUX line MUX1), the sixth switch (see Figs. 4 and 8, sixth switch connected between DL5 and CH2), connects the third data output line (CH2 in Figs. 4 and 8) to the sixth data line (DL5 in Figs. 4 and 8) according to the second control signal(second control signal MUX2, Figs. 4-5 and 8), the seventh switch (see Fig. 8, seventh switch connected between DL11 and CH2), connects a fourth data output line (CH2 in Fig. 8) from among the data output lines (CH1, CH2, CH3 in Fig. 8) to the seventh data line (DL11 in Fig. 8) according to the third control signal ([0082-0084]: control of MUX line MUX1), and the eighth switch (see Fig. 8, eighth switch connected between DL14 and CH2) connects the fourth data output line (CH2 in Fig. 8) to the eighth data line (D14 in Fig. 8) according to the fourth control signal ([0082-0085]: control of MUX line MUX2).
As to claim 13, Yoon et al. teaches the display apparatus of claim 12, wherein the first switch (see Figs. 4 and 8, first switch connected between DL1 and CH1) and the fifth switch (see Figs. 4 and 8, fifth switch connected between DL2 and CH2) are connected to the first power circuit through a first control signal line ([0082-0084]: control of MUX line MUX1), the second switch (see Figs. 4 and 8, second switch connected between DL4 and CH1) and the sixth switch (see Figs. 4 and 8, sixth switch connected between DL5 and CH2) are connected to the second power circuit through a second control signal line ([0082-0085]: control of MUX line MUX2), the third switch (see Fig. 8, third switch connected between DL10 and CH1) and the seventh switch (see Fig. 8, seventh switch connected between DL11 and CH2), are connected to the third power circuit through a third control signal line ([0082-0084]: control of MUX line MUX1), and the fourth switch (see Fig. 8, fourth switch connected between DL13 and CH1) and the eighth switch (see Fig. 8, eighth switch connected between DL14 and CH2) are connected to the fourth power circuit through a fourth control signal line([0082-0085]: control of MUX line MUX2).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 4-6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yoon et al. (US 2022/0208117 A1) in view of Tagawa et al. (US 2021/0035519 A1).
As to claim 4, Yoon et al. teaches the display apparatus of claim 3, but does not explicitly disclose further comprising: a first power output line connecting the first power circuit and the first control signal line to each other; a second power output line connecting the second power circuit and the second control signal line to each other; a third power output line connecting the third power circuit and the third control signal line to each other; and a fourth power output line connecting the fourth power circuit and the fourth control signal line to each other.
However, Tagawa et al. teaches further comprising:
a first power output line connecting the first power circuit and the first control signal line to each other (see Fig. 10, vertical portion of line SW1 connecting boost circuit 421 and horizontal portion of line SW1; [0058]);
a second power output line connecting the second power circuit and the second control signal line to each other (see Fig. 10, vertical portion of line SW2 connecting boost circuit 422 and horizontal portion of line SW2; [0058]);
a third power output line connecting the third power circuit and the third control signal line to each other (see Fig. 10, vertical portion of line SW1 connecting boost circuit 421 and horizontal portion of line SW1; [0058]: note that the claim does not recite the third power circuit is different from the first power circuit and the third control signal line is different from first control signal line); and
a fourth power output line connecting the fourth power circuit and the fourth control signal line to each other (see Fig. 10, vertical portion of line SW2 connecting boost circuit 422 and horizontal portion of line SW2; [0058]; note that the claim does not recite the fourth power circuit is different from the second power circuit and the fourth control signal line is different from second control signal line).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Yoon et al. with a first power output line connecting the first power circuit and the first control signal line to each other, a second power output line connecting the second power circuit and the second control signal line to each other, a third power output line connecting the third power circuit and the third control signal line to each other, and a fourth power output line connecting the fourth power circuit and the fourth control signal line to each other as taught by Tagawa et al. in order to obtain high display quality.
As to claim 5, Yoon et al. teaches the display apparatus of claim 3, but does not explicitly disclose further comprising: a first bridge line connecting the first power circuit and the first control signal line to each other; a second bridge line connecting the second power circuit and the second control signal line to each other; a third bridge line connecting the third power circuit and the third control signal line to each other; and a fourth bridge line connecting the fourth power circuit and the fourth control signal line to each other.
However, Tagawa et al. teaches a first bridge line connecting the first power circuit and the first control signal line to each other (see Fig. 10, vertical portion of line SW1 connecting boost circuit 421 and horizontal portion of line SW1; [0058]);
a second bridge line connecting the second power circuit and the second control signal line to each other (see Fig. 10, vertical portion of line SW2 connecting boost circuit 422 and horizontal portion of line SW2; [0058]);
a third bridge line connecting the third power circuit and the third control signal line to each other (see Fig. 10, vertical portion of line SW1 connecting boost circuit 421 and horizontal portion of line SW1; [0058]: note that the claim does not recite the third power circuit is different from the first power circuit and the third bridge line is different from first bridge line); and
a fourth bridge line connecting the fourth power circuit and the fourth control signal line to each other (see Fig. 10, vertical portion of line SW2 connecting boost circuit 422 and horizontal portion of line SW2; [0058]; note that the claim does not recite the fourth power circuit is different from the second power circuit and the fourth bridge line is different from second bridge line).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Yoon et al. with a first bridge line connecting the first power circuit and the first control signal line to each other, a second bridge line connecting the second power circuit and the second control signal line to each other, a third bridge line connecting the third power circuit and the third control signal line to each other, and a fourth bridge line connecting the fourth power circuit and the fourth control signal line to each other as taught by Tagawa et al. in order to obtain high display quality.
As to claim 6, Yoon et al. teaches the display apparatus as discussed above, but does not explicitly disclose further comprising: a first power output line connecting the first power circuit and the first bridge line to each other; a second power output line connecting the second power circuit and the second bridge line to each other; a third power output line connecting the third power circuit and the third bridge line to each other; and a fourth power output line connecting the fourth power circuit and the fourth bridge line to each other.
However, Tagawa et al. teaches a first power output line connecting the first power circuit and the first bridge line to each other (see Fig. 10, horizontal portion of line SW1 directly connecting boost circuit 421 and vertical portion of line SW1; [0058]); a second power output line connecting the second power circuit and the second bridge line to each other(see Fig. 10, horizontal portion of line SW2 directly connecting boost circuit 422 and vertical portion of line SW2; [0058]); a third power output line connecting the third power circuit and the third bridge line to each other (see Fig. 10, horizontal portion of line SW1 directly connecting boost circuit 421 and vertical portion of line SW1; [0058]: note that the claim does not recite the third power circuit is different from the first power circuit and the third power output line is different from first power output line); and a fourth power output line connecting the fourth power circuit and the fourth bridge line to each other (see Fig. 10, horizontal portion of line SW2 directly connecting boost circuit 422 and vertical portion of line SW2; [0058]; note that the claim does not recite the fourth power circuit is different from the second power circuit and the fourth power output line is different from second power output line).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Yoon et al. with a first power output line connecting the first power circuit and the first bridge line to each other, a second power output line connecting the second power circuit and the second bridge line to each other, a third power output line connecting the third power circuit and the third bridge line to each other, and a fourth power output line connecting the fourth power circuit and the fourth bridge line to each other as taught by Tagawa et al. in order to obtain high display quality.
Allowable Subject Matter
Claims 7-9 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 14-20 are allowed.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to STACY KHOO whose telephone number is (571)270-3698. The examiner can normally be reached Mon-Fri 8:00 am-5:00 pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Eason can be reached at 571-270-7230. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/STACY KHOO/Primary Examiner, Art Unit 2624
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