DETAILED ACTION
AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restriction
Applicants’ 16 NOV 2025 election (ELC. page 1) without traverse of Invention I, drawn to a method for manufacturing a solar cell structure, claims 1-15, is acknowledged.
Claims 16-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to nonelected species, there being no allowable generic or linking claim. See 23 SEP 2025 Requirement for Restriction/Election.
Priority
Acknowledgment is made of applicants’ claim for foreign priority based on an application filed in CHINA on 28 MAY 2024. It is noted that applicants have NOT filed a certified copy of said application as required by U.S.C 119.
Information Disclosure Statement
An information disclosure statement (IDS) does not exist.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 2, 5, 9, 10, and 13 are rejected under 35 U.S.C. 102(a)(1) and 102(a)(2) as being anticipated by YE et al. (CN 116936675; below, “YE”).
RE 1, YE, in FIGS. 1-22 and related text, e.g., pages 1-12 (including paragraphs [0001] to [0095]), discloses a method for manufacturing a solar cell structure, comprising:
forming (FIG. 2) a precursor structure on a surface of a base (21), wherein the precursor structure comprises a first tunnel layer (22) covering the surface of the base (21), and an amorphous silicon layer (S121) covering a surface of the first tunnel layer (22);
annealing ([0049] S122) the amorphous silicon layer (S121) to form a first polysilicon contact layer (23);
laser oxidizing ([0054] S13) the first polysilicon contact layer (23) to pattern the first polysilicon contact layer and to oxidize a portion of a thickness of the first polysilicon contact layer (23), to form a patterned silicon oxide mask layer (241);
removing (FIG. 4) at least one of the amorphous silicon layer (S121) or the first polysilicon contact layer (23) in a region which is not covered by the patterned silicon oxide mask layer (241);
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removing (FIG. 5) the silicon oxide mask layer (241) and the first tunnel layer (22) in a region which is not covered by the silicon oxide mask layer (241); and
forming (FIG. 6) a first metal electrode (25) on a surface of a remaining portion of the first polysilicon contact layer (23).
Thus, YE anticipates this claim.
RE 2, YE discloses the manufacturing method according to claim 1, wherein annealing (S122) the amorphous silicon layer (S121) to form the first polysilicon contact layer (23) comprises:
laser annealing the amorphous silicon layer (S121) to form the first polysilicon contact layer (23); or
thermally annealing ([0050]) the amorphous silicon layer (S121) to form the first polysilicon contact layer (23).
RE 5, YE discloses the manufacturing method according to claim 1, wherein forming the precursor structure on the surface of the base (21) comprises:
preparing a silicon oxide material on the surface of the base (21) to form the first tunnel layer (22); and
preparing an amorphous silicon material doped with boron element ([0045]-[0048]) on the surface of the first tunnel layer (22) to form the amorphous silicon layer (S121).
RE 9, YE discloses the manufacturing method according to claim 1, wherein a thickness of the amorphous silicon layer (S121) is between 50 nanometers and 500 nanometers ([0045]-[0048]).
RE 10, YE discloses the manufacturing method according to claim 1, wherein removing at least one of the amorphous silicon layer (S121) or the first polysilicon contact layer (23) in the region which is not covered by the patterned silicon oxide mask layer (241) comprises:
cleaning at least one of the amorphous silicon layer (S121) or the first polysilicon contact layer (23) in the region which is not covered by the patterned silicon oxide mask layer (241) through an alkali etching process ([0058]).
RE 13, YE discloses the manufacturing method according to claim 1, further comprising:
performing boron ion doping on a surface of a crystalline silicon substrate to form a P-type emitter ([0045]-[0051], e.g., emitter itself contains a PN junction with the base), wherein the crystalline silicon substrate and the P-type emitter form the base (21).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103(a) are summarized as follows (Graham Factors):
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 7 and 8 are rejected under 35 U.S.C. 103 as obvious over YE. At least “combining prior art elements”, “simple substitution”, “obvious to try”, and “applying a known technique to a known method” rationales support a conclusion of obviousness. MPEP § 2143(A)-(G).
RE 7, YE discloses the manufacturing method according to claim 1, wherein a thickness ([0055]) of the silicon oxide mask layer (241) is less than a thickness ([0045]: initial thickness is 30 to 1000 nm) of 111he remaining portion of the first polysilicon contact layer (23). As noted in [0055], silicon-oxide-mask-layer thickness is parametrically controlled. It would have been obvious to a person having ordinary skill in the art before the effective filing date of the instant application to form a thin silicon oxide mask layer so as not to damage the underlying tunneling layer and thereby reducing a passivation effect ([0055]).
RE 8, YE is silent regarding the manufacturing method according to claim 1, wherein the thickness of the silicon oxide mask layer (241) is between 10 nanometers and 200 nanometers, and the thickness of the first polysilicon contact layer (23) is between 30 nanometers and 200 nanometers. As noted in [0055], silicon-oxide-mask-layer thickness is parametrically controlled. It would have been obvious to a person having ordinary skill in the art before the effective filing date of the instant application to form a thin silicon oxide mask layer so as not to damage the underlying tunneling layer and thereby reducing a passivation effect ([0055]). The claimed thickness ranges of between 10 ~ 200 nanometers and 30 ~ 200 nanometers are considered to be an obvious matter of finding an optimum workable range for some chosen design requirement utilizing the disclosure of YE. Furthermore, it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233 (CCPA 1955). Finally, any difference in the claimed invention and the prior art may be expected to result in some differences in properties. The issue is whether the properties differ to such an extent that the difference is really unexpected. In re Merck & Co. Inc., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986).
Claims 3 and 4 are rejected under 35 U.S.C. 103 as obvious over YE with evidence from or in view of CHEN et al. (CN 111725359; below, “CHEN”). MPEP § 2143(A)-(G).
RE 3, YE is silent regarding the manufacturing method according to claim 2, wherein laser annealing the amorphous silicon layer (S121) to form the first polysilicon contact layer (23) comprises:
patterning the amorphous silicon layer by laser annealing to form a patterned first polysilicon contact layer (23). See YE’s FIG. 3 wherein a patterned region of the silicon oxide mask layer (241) is arranged within a patterned region of the first polysilicon contact layer (23).
CHEN teaches patterning the amorphous silicon layer (S121) by laser annealing to form a patterned first polysilicon contact layer (23).
YE and CHEN are analogous art from the same field of endeavor as the claimed invention. It would have been obvious to a person having ordinary skill in the art before the effective filing date of the instant application to modify YE as taught by CHEN because: 1. thermal damage to underlying substate is reduced due to localized processing; 2. faster processing due to rapid heating; and 3. all the claimed elements were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions, and the combination would have yielded predictable results to one of ordinary skill in the art at the time of the invention. KSR International Co. v. Teleflex Inc. (KSR), 550 U.S. 398 (2007).
RE 4, modified YE discloses the manufacturing method according to claim 3, wherein a projection of the patterned region of the silicon oxide mask layer (241) in a direction perpendicular to the surface of the base (21) coincides with a projection of the patterned region of the first polysilicon contact layer (23) in the direction perpendicular to the surface of the base (21). See base claim 3’s motivation to combine statement.
Claim 6 is rejected under 35 U.S.C. 103 as obvious over YE with evidence from Lee et al. (US 20140370716; below, “Lee”). MPEP § 2143(A)-(G).
RE 6, YE discloses the manufacturing method according to claim 1, wherein annealing the amorphous silicon layer (S121) to form the first polysilicon contact layer (23) comprises:
annealing the amorphous silicon layer (S121) in a vacuum environment or an inert gas environment ([0050] annealing in tube furnace conducted in controlled atmospheres like vacuum or inert gas to prevent oxidation) to form the first polysilicon contact layer (23). As evidence, see Lee’s [0051].
Claim 11 is rejected under 35 U.S.C. 103 as obvious over YE with evidence from and/or in view of GAO et al. (US 20250169221; below, “GAO”). MPEP § 2143(A)-(G).
RE 11, YE is silent regarding the manufacturing method according to claim 1, wherein removing the silicon oxide mask layer (241) and the first tunnel layer (22) in the region which is not covered by the silicon oxide mask layer (241) comprises:
removing the silicon oxide mask layer (241) and the first tunnel layer (22) in the region which is not covered by the silicon oxide mask layer (241) through an acid etching process.
GAO, in FIGS. 23, 24, and related text, e.g., paragraphs [0127], [0128], [0174], teaches removing a silicon oxide mask layer (27) and a first tunnel layer (24) in a region which is not covered by the silicon oxide mask layer (27) through an acid etching process.
YE and GAO are analogous art from the same field of endeavor as the claimed invention. It would have been obvious to a person having ordinary skill in the art before the effective filing date of the instant application to modify YE as taught by GAO because: 1. cost-effective material removal is achieved; and 2. all the claimed elements were known … and one skilled … could have combined the elements …, and the combination would have yielded predictable results …. KSR, 550 U.S. 398 (2007).
Claims 12, 14, and 15 are rejected under 35 U.S.C. 103 as obvious over YE with evidence from and/or in view of YANG et al. (US 20230307573; below, “YANG”). MPEP § 2143(A)-(G).
RE 12, YE is silent regarding the manufacturing method according to claim 1, wherein forming the first metal electrode (25) on the surface of the remaining portion of the first polysilicon contact layer (23) comprises: screen printing a patterned metal slurry on the surface of the first polysilicon contact layer (23); and sintering the metal slurry to form the first metal electrode (25).
YANG teaches screen printing a patterned metal slurry on a surface; and sintering the metal slurry to form a metal electrode ([0006], [0040], claim 1).
YE and YANG are analogous art from the same field of endeavor as the claimed invention. It would have been obvious to a person having ordinary skill in the art before the effective filing date of the instant application to modify YE as taught by YANG because: 1. low-cost, dense-material electrodes are realized; and 2. all the claimed elements were known … and one skilled … could have combined the elements …, and the combination would have yielded predictable results …. KSR, 550 U.S. 398 (2007).
RE 14, YE is silent regarding the manufacturing method according to claim 13, further comprising:
sequentially stacking, on a surface of the base (21) on which the first metal electrode (25) is formed, a first passivation layer and a first antireflection layer, wherein the first passivation layer and the first antireflection layer cover a region absent of the first metal electrode (25).
YANG, in FIGURE, [0018], teaches sequentially stacking, on a surface of a base (2) on which a first metal electrode (7) is formed, a first passivation layer (e.g., same-atomic-plane layer) and a first antireflection layer (e.g., same-atomic-plane layer), wherein the first passivation layer and the first antireflection layer cover a region absent of the first metal electrode (7).
It would have been obvious … to modify YE as taught by YANG because: 1. light trapping efficiency is enhanced; 2. charge carrier recombination is minimized; and 3. all the claimed elements were known … and one skilled … could have combined the elements …, and the combination would have yielded predictable results …. KSR, 550 U.S. 398 (2007).
RE 15, YE discloses the manufacturing method according to claim 13, further comprising:
sequentially forming (FIG. 16) a second tunnel layer (22a) and a second polysilicon contact layer (23a) on a rear side of the base (21), wherein a doping polarity of the second polysilicon contact layer (23a) is opposite ([0074]) to a doping polarity of the first polysilicon contact layer (23);
forming a second metal electrode (25a) on a surface of the second polysilicon contact layer (23a); and
YE is silent regarding forming a second passivation layer on the surface of the second polysilicon contact layer (23a) in a region absent of the second metal electrode (25a).
YANG, in FIGURE, [0018], teaches forming a passivation layer on a surface in a region absent of a metal electrode (7).
It would have been obvious … to modify YE as taught by YANG because: 1. light trapping efficiency is enhanced; 2. charge carrier recombination is minimized; and 3. all the claimed elements were known … and one skilled … could have combined the elements …, and the combination would have yielded predictable results …. KSR, 550 U.S. 398 (2007).
Claims 1-15 are rejected.
Conclusion
The prior art made of record and not relied upon, JIN et al. (US 20250324809), is considered pertinent to applicants’ disclosure. JIN et al. does not teach, inter alia,
laser oxidizing the first polysilicon contact layer (522) to pattern the first polysilicon contact layer (522) and to oxidize a portion of a thickness of the first polysilicon contact layer (522), to form a patterned silicon oxide mask layer (47); removing at least one of the amorphous silicon layer (43, P-type) or the first polysilicon contact layer (522) in a region which is not covered by the patterned silicon oxide mask layer (47); removing the silicon oxide mask layer (47) and the first tunnel layer (521) in a region which is not covered by the silicon oxide mask layer (47); and forming a first metal electrode (523) on a surface of a remaining portion of the first polysilicon contact layer (522).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Walter Swanson whose telephone number is (571) 270-3322. The examiner can normally be reached Monday to Thursday, 8:30 to 17:30 EST.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Joshua Benitez, can be reached on (571)270-1435. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300.
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/WALTER H SWANSON/Primary Examiner, Art Unit 2815