Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper time wise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP §§ 706.02(l)(1) - 706.02(l)(3) for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp.
Claims 1-8, 10-14, and 16-22 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 11,593,290.
Although the claims at issue are not identical, they are not patentably distinct from each other because both disclose “..autonomous or semi-autonomous machine comprising: one or more graphics processing units (GPUs);one or more central processing units (CPUs);one or more hardware accelerators; and one or more direct memory access (DMA) systems including that includes one or more DMA engines and one or more hardware sequence controllers in communication with the one or more DMA engines to at least send data to the one or more DMA engines.
2. (Currently Amended) The autonomous or semi-autonomous machine of The autonomous or semi-autonomous machine of wherein the one or more hardware sequence controllers are [[is ]]to: receive the data corresponding to one or more tiles from a source; and provide the data to at least a DMA engine of at least one of the DMA systems the one or more DMA engines.”
Claims 1-21 are rejected on the ground of provisional nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent 11,593,290. Specifically, claims 1, 2, 5, and 6 of 18/970,570 and Claim 1 of US 11, 593,290 both disclose:
Instant Application Claim 1, 18/970,570
Claim 1, US Patent 11,593,290
Claim 1 An autonomous or semi-autonomous machine comprising: one or more graphics processing units (GPUs);one or more central processing units (CPUs);one or more hardware accelerators; and one or more direct memory access (DMA) systems that includes one or more DMA engines and one or more hardware sequence controllers in communication with the one or more DMA engines to at least send data to the one or more DMA engines.
2. (Currently Amended) The autonomous or semi-autonomous machine of The autonomous or semi-autonomous machine of wherein the one or more hardware sequence controllers are [[is ]]to: receive the data corresponding to one or more tiles from a source; and provide the data to at least a DMA engine of at least one the one or more DMA engines.
5. (Currently Amended) The autonomous or semi-autonomous machine of The autonomous or semi-autonomous machine of wherein the one or more hardware sequence controllers are [[is ]]to: receive second data representative of a frame structure associated with one or more frames; and receive, from a source and based at least on the frame structure, one or more tiles associated with the one or more frames.
6. (Original) The autonomous or semi-autonomous machine of claim 5, wherein the frame structure indicates at least one of one or more row descriptors or one or more column descriptors associated with the one or more frames.
A system comprising: a source memory; a destination memory; a processor; and a direct memory access (DMA) system to perform operations comprising: retrieving a tile structure from a descriptor memory and a frame structure corresponding to a frame from a HW sequencer command memory, the frame structure including a row description or a column description; based at least in part on the tile structure and the row description or the column description, sequencing retrieval of tiles of the frame along rows or columns of the frame from the source memory; for each tile of the tiles, and according to the sequencing: writing retrieved data corresponding to the tile to the destination memory; and based at least in part on writing the retrieved data to the destination memory, indicating to the processor that the retrieved data is in the destination memory to cause the processor to process the retrieved data from the destination memory.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
The examiner requests, in response to this office action, support be shown for language added to any original claims on amendment and any new claims. That is, indicate support for newly added claim language by specifically pointing to page(s) and line number(s) in the specification and/or drawing figure(s). This will assist the examiner in prosecuting the application. When responding to this office action, applicant is advised to clearly point out the patentable novelty which he or she thinks the claims present, in view of the state of art disclosed by the references cited or the objections made. He or she must also show how the amendments avoid such references or objections. See 37 C.F.R.I .Hi(c). In amending in reply to a rejection of claims in an application or patent under reexamination, the applicant or patent owner must clearly point out the patentable novelty which he or she thinks the claims present in view the state of the art disclosed by the references cited or the objections made. The applicant or patent owner must also show how the amendments avoid such references or objections. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Tammara Peyton whose telephone number is (571) 272-4157. The examiner can normally be reached between 8:30- 6:00 from Monday to Thursday, (I am off every first Friday), and 7:30- 4:00 every second Friday. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor Henry Tsai can be reached on (571)272-4176. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300. Any inquiry of a general nature of relating to the status of this application should be directed to the Group receptionist whose telephone number is (571) 272- 2100.
/Tammara R Peyton/
Primary Examiner, Art Unit 2184
July 29, 2026
Prosecution Insights