Prosecution Insights
Last updated: July 17, 2026
Application No. 18/975,781

CIRCUIT SELF TEST APPARATUS AND OPERATING METHOD THEREOF

Non-Final OA §102§103§112
Filed
Dec 10, 2024
Priority
Apr 23, 2024 — RE 10-2024-0054057
Examiner
MCMAHON, DANIEL F
Art Unit
2111
Tech Center
2100 — Computer Architecture & Software
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
90%
Grant Probability
Favorable
1-2
OA Rounds
6m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 90% — above average
90%
Career Allowance Rate
926 granted / 1034 resolved
+34.6% vs TC avg
Minimal +2% lift
Without
With
+2.3%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
24 currently pending
Career history
1048
Total Applications
across all art units

Statute-Specific Performance

§101
4.3%
-35.7% vs TC avg
§103
56.4%
+16.4% vs TC avg
§102
20.8%
-19.2% vs TC avg
§112
11.2%
-28.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1034 resolved cases

Office Action

§102 §103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Claims 1 – 20 are presented for examination. Priority Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statement (IDS) submitted on 12/10/2024 was received. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Specification The abstract of the disclosure is objected to because the abstract is a single sentence that appears to be a recitation of claim 1 and fails to provide a concise statement of the technical disclosure of the patent. Applicant is reminded of the proper content of an abstract of the disclosure. A patent abstract is a concise statement of the technical disclosure of the patent and should include that which is new in the art to which the invention pertains. The abstract should not refer to purported merits or speculative applications of the invention and should not compare the invention with the prior art. The abstract should be in narrative form and generally limited to a single paragraph on a separate sheet within the range of 50 to 150 words in length. The abstract should describe the disclosure sufficiently to assist readers in deciding whether there is a need for consulting the full patent text for details. The language should be clear and concise and should not repeat information given in the title. It should avoid using phrases which can be implied, such as, “The disclosure concerns,” “The disclosure defined by this invention,” “The disclosure describes,” etc. In addition, the form and legal phraseology often used in patent claims, such as “means” and “said,” should be avoided. A corrected abstract of the disclosure is required and must be presented on a separate sheet, apart from any other text. See MPEP § 608.01(b). Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 1 – 9, 13, 14, and 16 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Regarding claim 1, the language “a linear feedback shift register (LFSR) configured to generate a random pattern” was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. The specification discloses the use of a linear feedback register to generate “a pseudo random binary sequence of a binary bit string sequenced using a linear feedback” (paragraph 0034 – 0037), but fails to disclose the generation of “a random pattern”. The examiner asserts linear feedback registers are well known for generating “pseudo random patterns”, in contrast, generation of random numbers in digital systems is non-trivial. Additionally, the use of term “random” in: Claim 4 at least one random scan group Claim 5 a first random pattern Claim 6 a random scan group Claim 7 a second random pattern a random scan group a random pattern Claim 13 a plurality of random patterns a random scan group at least one random pattern of the plurality of random patterns Claim 14 a first random pattern a random scan group Claim 16 a second random pattern a random scan group The specification fails to disclose a method for generating randomness. The specification discloses generation of “a pseudo random binary sequence” (paragraph 0034 – 0037). The Examiner asserts generation of randomness in digital systems is non-trivial. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1 – 9, 11, 13 – 16, and 18 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claim 1, the limitation “generate a random pattern” is indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. One of ordinary skill in the art would be unclear how to perform the limitation. Specifically, the specification discloses generating a pseudo random pattern (paragraph 0034 – 0037), but is silent regarding generating a random pattern. The Examiner asserts generation of randomness in digital systems is non-trivial. Regarding claim 2, the limitation “based on a similarity between values” is indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. One of ordinary skill in the art would be unclear the scope of “similarity”. Specifically, one of ordinary skill in the art would be unclear what makes values similar. Regarding claim 4, the limitation “at least one random scan group” is indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. One of ordinary skill in the art would be unclear the scope of “random”. Specifically, the specification discloses generating a pseudo random pattern (paragraph 0034 – 0037), but is silent regarding generating a random pattern. The Examiner asserts generation of randomness in digital systems is non-trivial. Regarding claim 5, the limitation “a first random pattern” is indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. One of ordinary skill in the art would be unclear the scope of “random”. Specifically, the specification discloses generating a pseudo random pattern (paragraph 0034 – 0037), but is silent regarding generating a random pattern. The Examiner asserts generation of randomness in digital systems is non-trivial. Regarding claim 6, the limitation “a random scan group” is indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. One of ordinary skill in the art would be unclear the scope of “random”. Specifically, the specification discloses generating a pseudo random pattern (paragraph 0034 – 0037), but is silent regarding generating a random pattern. The Examiner asserts generation of randomness in digital systems is non-trivial. Regarding claim 7, the limitation “a second random pattern” is indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. One of ordinary skill in the art would be unclear the scope of “random”. Specifically, the specification discloses generating a pseudo random pattern (paragraph 0034 – 0037), but is silent regarding generating a random pattern. The Examiner asserts generation of randomness in digital systems is non-trivial. Regarding claim 7, the limitation “a random scan group” is indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. One of ordinary skill in the art would be unclear the scope of “random”. Specifically, the specification discloses generating a pseudo random pattern (paragraph 0034 – 0037), but is silent regarding generating a random pattern. The Examiner asserts generation of randomness in digital systems is non-trivial. Regarding claim 7, the limitation “a random pattern” is indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. One of ordinary skill in the art would be unclear the scope of “random”. Specifically, the specification discloses generating a pseudo random pattern (paragraph 0034 – 0037), but is silent regarding generating a random pattern. The Examiner asserts generation of randomness in digital systems is non-trivial. Regarding claim 7, the limitation “a random pattern” is indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. One of ordinary skill in the art would be unclear if applicant intended to refer to the random pattern previously disclosed or an additional random pattern. Specifically, the specification discloses generating a pseudo random pattern (paragraph 0034 – 0037), but is silent regarding generating a random pattern. The Examiner asserts generation of randomness in digital systems is non-trivial. Regarding claim 11, the limitation “based on a similarity between values” is indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. One of ordinary skill in the art would be unclear the scope of “similarity”. Specifically, one of ordinary skill in the art would be unclear what makes values similar. Regarding claim 13, the limitation “a plurality of random patterns” is indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. One of ordinary skill in the art would be unclear if applicant intended to refer to the random pattern previously disclosed or an additional random pattern. Specifically, the specification discloses generating a pseudo random pattern (paragraph 0034 – 0037), but is silent regarding generating a random pattern. The Examiner asserts generation of randomness in digital systems is non-trivial. Regarding claim 13, the limitation “a random scan group” is indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. One of ordinary skill in the art would be unclear if applicant intended to refer to the random pattern previously disclosed or an additional random pattern. Specifically, the specification discloses generating a pseudo random pattern (paragraph 0034 – 0037), but is silent regarding generating a random pattern. The Examiner asserts generation of randomness in digital systems is non-trivial. Regarding claim 13, the limitation “at least one random pattern of the plurality of random patterns” is indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. One of ordinary skill in the art would be unclear if applicant intended to refer to the random pattern previously disclosed or an additional random pattern. Specifically, the specification discloses generating a pseudo random pattern (paragraph 0034 – 0037), but is silent regarding generating a random pattern. The Examiner asserts generation of randomness in digital systems is non-trivial. Regarding claim 13, the limitation “based on whether an order of bits in the modification pattern is 2k-th, wherein k is an integer of 1 or more” is indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. One of ordinary skill in the art would be unclear the scope of “2k-th”. Specifically, the Examiner is unclear if the limitation discloses a position or a mathematical operation. Regarding claim 14, the limitation “a first random pattern” is indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. One of ordinary skill in the art would be unclear if applicant intended to refer to the random pattern previously disclosed or an additional random pattern. Specifically, the specification discloses generating a pseudo random pattern (paragraph 0034 – 0037), but is silent regarding generating a random pattern. The Examiner asserts generation of randomness in digital systems is non-trivial. Regarding claim 14, the limitation “a random scan group” is indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. One of ordinary skill in the art would be unclear if applicant intended to refer to the random pattern previously disclosed or an additional random pattern. Specifically, the specification discloses generating a pseudo random pattern (paragraph 0034 – 0037), but is silent regarding generating a random pattern. The Examiner asserts generation of randomness in digital systems is non-trivial. Regarding claim 16, the limitation “a second random pattern” is indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. One of ordinary skill in the art would be unclear if applicant intended to refer to the random pattern previously disclosed or an additional random pattern. Specifically, the specification discloses generating a pseudo random pattern (paragraph 0034 – 0037), but is silent regarding generating a random pattern. The Examiner asserts generation of randomness in digital systems is non-trivial. Regarding claim 16, the limitation “a random scan group” is indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. One of ordinary skill in the art would be unclear if applicant intended to refer to the random pattern previously disclosed or an additional random pattern. Specifically, the specification discloses generating a pseudo random pattern (paragraph 0034 – 0037), but is silent regarding generating a random pattern. The Examiner asserts generation of randomness in digital systems is non-trivial. Regarding claim 18, the limitation “based on a similarity between values” is indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. One of ordinary skill in the art would be unclear the scope of “similarity”. Specifically, one of ordinary skill in the art would be unclear what makes values similar. Any claim not addressed above is rejected due to its dependency on a rejected claim. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 10, and 17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Huang et al., U.S. Publication 2020/0333398 (herein Huang). Regarding claim 1, Huang discloses: A circuit self-test apparatus comprising: a circuit under test comprising a plurality of scan chains, wherein each of the plurality of scan chains comprises a plurality of scan cells (paragraph 0065, 0066), and wherein each of the plurality of scan chains is configured based on a weight and a correlation obtained from a determination pattern input into each of the plurality of scan cells (paragraph 0071 – 0077); and a test circuit comprising a linear feedback shift register (LFSR) configured to generate a random pattern for each of the plurality of scan chains (paragraph 0074), wherein the test circuit is configured to generate a modification pattern for each of the plurality of scan chains based on the random pattern and a state of the LFSR (paragraph 0071 – 0077). Regarding claim 10, Huang discloses: An operating method of a circuit self-test apparatus, comprising: determining a structure of a test circuit based on a structure of a circuit under test comprising a plurality of scan groups comprising a plurality of scan cells, wherein the plurality of scan groups are configured based on a weight and a correlation obtained from a determination pattern input into each of the plurality of scan cells (paragraph 0071 – 0077, “deterministic test pattern in which the don't-care bits are not filled by ATPG”); generating a modification pattern for each of the plurality of scan groups (paragraph 0071 – 0077, “Test points may be used to decrease deterministic pattern counts”); performing a test for the circuit under test based on the modification pattern (paragraph 0082); receiving a response corresponding to the modification pattern from the circuit under test (paragraph 0082); and detecting a defect in the circuit under test based on the response (paragraph 0082, “pattern may be used to further characterize the error in the scan chain”). Regarding claim 17, Huang discloses: An operating method of a circuit self-test apparatus, comprising: obtaining, based on a determination pattern input into each of a plurality of scan cells, a weight for each of the plurality of scan cells (paragraph 0071 – 0077, “deterministic test pattern in which the don't-care bits are not filled by ATPG”); obtaining a correlation between a first scan cell among the plurality of scan cells and a second scan cell among the plurality of scan cells based on the determination pattern (paragraph 0071 – 0077, “deterministic test pattern in which the don't-care bits are not filled by ATPG”); and reconfiguring placement of the plurality of scan cells based on the weight and the correlation (paragraph 0065, “functional state elements are usually replaced with dual-purpose state elements called scan cells”). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 2, 3, 11, 12, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Huang, in view of Agarwal et al. U.S. Patent 5,323,400 (herein Agarwal). Regarding claim 2, Huang teaches: the determination pattern comprises a plurality of bits respectively corresponding to the plurality of scan cells (paragraph 0071), wherein the correlation is determined based on a similarity between values of a plurality of first bits at a first location corresponding to a first scan cell among the plurality of scan cells and values of a plurality of second bits at a second location corresponding to a second scan cell among the plurality of scan cells (paragraph 0071). Huang does not explicitly teach: wherein the weight is a ratio value determined by dividing a number of bits in a first logic state among the plurality of first bits by a total number of first bits in the plurality of first bits. Agarwal teaches: wherein the weight is a ratio value determined by dividing a number of bits in a first logic state among the plurality of first bits by a total number of first bits in the plurality of first bits (column 2, lines 10 – 20). One of ordinary skill in the art, at the time of the effective filing date of the invention, would find it obvious to combine the teaching of Huang: a circuit under test comprising a plurality of scan chains, wherein each of the plurality of scan chains comprises a plurality of scan cells; with the teaching of Agarwal: for the purpose of reducing the number of test patterns (column 2, lines 10 – 20). Scan chain testing is well-known in the art (abstract). Weighted random patterns are well-known design choice in the art (column 2, lines 10 – 20). One of ordinary skill in the art would recognize the use of well-known design choice would yield a predictable result. Regarding claim 3, Huang and Agarwal teach the limitations of the parent claim. Huang teaches: wherein a first plurality of scan chains in a first scan group among the plurality of scan groups comprise the first scan cell and a third scan cell corresponding to the first scan cell that is determined based on the correlation (paragraph 0071 – 0077), and wherein the first scan cell is adjacent to the third scan cell in a corresponding scan chain among the first plurality of scan chains (paragraph 0071 – 0077). Huang does not explicitly teach: the plurality of scan chains are grouped into a plurality of scan groups based on the weight. Agarwal teaches: the plurality of scan chains are grouped into a plurality of scan groups based on the weight (column 2, lines 10 – 20). And in view of the motivation previously stated above, for claim 2, the claim is rejected. Regarding claim 11, Huang teaches: the determination pattern comprises a plurality of bits respectively corresponding to the plurality of scan cells (paragraph 0071), wherein the correlation is determined based on a similarity between values of a plurality of first bits at a first location corresponding to a first scan cell among the plurality of scan cells and values of a plurality of second bits at a second location corresponding to a second scan cell among the plurality of scan cells (paragraph 0071). Huang does not explicitly teach: wherein the weight is a ratio value determined by dividing a number of bits in a first logic state among the plurality of first bits by a total number of first bits in the plurality of first bits. Agarwal teaches: wherein the weight is a ratio value determined by dividing a number of bits in a first logic state among the plurality of first bits by a total number of first bits in the plurality of first bits (column 2, lines 10 – 20). And in view of the motivation previously stated above, for claim 2, the claim is rejected. Regarding claim 12, Huang and Agarwal teach the limitations of the parent claim. Huang additionally teaches: wherein each of the plurality of scan groups comprises a plurality of scan chains comprising at least one scan cell (paragraph 0071 – 0077), wherein the test circuit comprises a plurality of test pattern modifiers respectively corresponding to the plurality of scan chains (paragraph 0071 – 0077). Huang does not explicitly teach: wherein the determining of the structure of the test circuit comprises determining that a first test pattern modifier corresponding to a first scan chain among the plurality of scan chains comprises an OR gate based on a first weight corresponding to the first scan chain being greater than a predetermined value and comprises an AND gate based on the first weight being less than the predetermined value. Agarwal teaches: wherein the determining of the structure of the test circuit comprises determining that a first test pattern modifier corresponding to a first scan chain among the plurality of scan chains comprises an OR gate based on a first weight corresponding to the first scan chain being greater than a predetermined value and comprises an AND gate based on the first weight being less than the predetermined value (claim 8, 9). One of ordinary skill in the art, at the time of the effective filing date of the invention, would find it obvious to combine the teaching of Huang: a circuit under test comprising a plurality of scan chains, wherein each of the plurality of scan chains comprises a plurality of scan cells; with the teaching of Agarwal. One of ordinary skill in the art, at the time of filing, would recognize NOR and NAND gates as compliments of OR and AND gates and interchangeable though De Morgan’s law. And in view of the motivation previously stated above, for claim 2, the claim is rejected. Regarding claim 18, Huang teaches: the determination pattern comprises a plurality of bits respectively corresponding to the plurality of scan cells (paragraph 0071), wherein the correlation is determined based on a similarity between values of a plurality of first bits at a first location corresponding to the first scan cell among the plurality of scan cells and values of a plurality of second bits at a second location corresponding to the second scan cell among the plurality of scan cells (paragraph 0071). Huang does not explicitly teach: wherein the weight is a ratio value determined by dividing a number of bits in a first logic state among the plurality of first bits by a total number of first bits in the plurality of first bits. Agarwal teaches: wherein the weight is a ratio value determined by dividing a number of bits in a first logic state among the plurality of first bits by a total number of first bits in the plurality of first bits (column 2, lines 10 – 20). And in view of the motivation previously stated above, for claim 2, the claim is rejected. Allowable Subject Matter Claims 4 – 9, 13 – 16, 19, and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Huang; Yu et al. US 20190220776 A1 Rajski; Janusz et al. US 20140372819 A1 KANG; Sungho et al. US 20230205172 A1 Cheng; Wu-Tung et al. US 8280687 B2 Kundu; Subhadip et al. US 9568550 B1 obtaining, based on a determination pattern input into each of a plurality of scan cells, a weight for each of the plurality of scan cells; obtaining a correlation between a first scan cell among the plurality of scan cells and a second scan cell among the plurality of scan cells based on the determination pattern; and reconfiguring placement of the plurality of scan cells based on the weight and the correlation. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL F MCMAHON whose telephone number is (571)270-3232. The examiner can normally be reached Monday-Thursday 9am - 5pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Mark Featherstone can be reached at (571)270-3750. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Daniel F. McMahon/Primary Examiner, Art Unit 2111
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Prosecution Timeline

Dec 10, 2024
Application Filed
Apr 20, 2026
Non-Final Rejection mailed — §102, §103, §112
May 20, 2026
Interview Requested
May 27, 2026
Applicant Interview (Telephonic)
May 29, 2026
Examiner Interview Summary

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Prosecution Projections

1-2
Expected OA Rounds
90%
Grant Probability
92%
With Interview (+2.3%)
2y 1m (~6m remaining)
Median Time to Grant
Low
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