DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the response to this Office action, the Office respectfully requests that support be shown for language added to any original claims on amendment and any new claims. That is, indicate support for newly added claim language by specifically pointing to page(s) and line numbers in the specification and/or drawing figure(s). This will assist the Office in prosecuting this application.
The Office has cited particular figures, elements, paragraphs and/or columns and line numbers in the references as applied to the claims for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant, in preparing the responses, to fully consider each of the cited references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage disclosed by the Office.
Disposition of the Claims
2. The instant application was effectively filed on December 20, 2023, wherein claims 1-20 are pending.
Drawings
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they do not include the following reference sign(s) mentioned in the description: Applicants disclosure i.e. see Para. [0014] references “The predicted frame duration (Dp) may be equal to Tp-T1.” And “The actual frame duration (Da) may be equal to Ta-T1” however, none of the alpha numeric listed elements is disclosed in drawing. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-2, 5, 12-13, 16 and 20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim et al. US PG-PUB 20200394971 A1 (hereinafter Kim).
Regarding claim 1, Kim teaches A method comprising: generating a predicted frame duration for a first frame (Fig. 5, Para. [0035]; discloses a lookup table 500 that lists multiple predicted display refresh rates including 60Hz, 72Hz, 80Hz, and 90Hz); determining an actual frame duration for the first frame (Figures 1-4 and Para. [0023]; discloses the frame rate determining module 108 of computer system 101, which determines the frame rate for each current frame as it is generated by the GPU 107); and causing the first frame to be displayed by operating a backlight of a display in a first mode, wherein operating the backlight of the display in the first mode comprises: pulsing the backlight of the display for the first frame at a first time for a fraction of the predicted frame duration (Figure 4 and paragraph 0023 the determined frame rate 110 is passed to the duty cycle calculating module 111 of computer system 101. The duty cycle calculating module 111 is configured to calculate a backlight duty cycle 112 for he backlight 116 of display 115. Paragraph 0023 further discloses the display's backlight 116 is typically only powered for a percentage - a fraction of the total time the frame is displayed); and pulsing the backlight of the display for the first frame at a second time based on a difference between the predicted frame duration and the actual frame duration (Figure 4 and paragraph 0024 further discloses if the frame rate for current frame 109 is relatively high, then the duty cycle calculating module 111 calculates a backlight duty cycle that is relatively shorter in length. Conversely, if the frame rate for the current frame 109 is relatively low, then the duty cycle calculating module 111 calculates a power duty cycle that is relatively longer in length).
Regarding claim 2, Kim teaches The method of claim 1, Kim further teaches wherein the pulsing the backlight of the display for the first frame at the first time comprises causing voltage to be supplied to the backlight of the display for a fraction of the predicted frame duration (Paragraph 0023 discloses the display's backlight 116 is typically only powered for a percentage which is a fraction of the total time the frame is displayed).
Regarding claim 5, Kim teaches The method of claim 1, Kim further teaches wherein the actual frame duration is shorter than the predicted frame duration, the method further comprising generating a shorter predicted frame duration for a second frame (Figure 4 and paragraph 0034 disclose the backlight is powered during time t1 for 90 Hz refresh-rate displays.).
Regarding claim 12, Kim teaches A system comprising: a processing unit to generate a first frame (Fig. 5, Para. [0035]); a display (see Fig. 3); and a display control circuit coupled between the processing unit and the display (See Fig. 3), the display control circuit to: generate a predicted frame duration for the first frame (Fig. 5, Para. [0035]; discloses a lookup table 500 that lists multiple predicted display refresh rates including 60Hz, 72Hz, 80Hz, and 90Hz); determine an actual frame duration for the first frame (Figures 1-4 and Para. [0023]; discloses the frame rate determining module 108 of computer system 101, which determines the frame rate for each current frame as it is generated by the GPU 107); and cause the first frame to be displayed by operating a backlight of the display in a first mode, wherein to operate the backlight of the display in the first mode, the display control circuit is to: pulse the backlight of the display for the first frame at a first time for a fraction of the predicted frame duration (Figure 4 and paragraph 0023 the determined frame rate 110 is passed to the duty cycle calculating module 111 of computer system 101. The duty cycle calculating module 111 is configured to calculate a backlight duty cycle 112 for he backlight 116 of display 115. Paragraph 0023 further discloses the display's backlight 116 is typically only powered for a percentage - a fraction of the total time the frame is displayed); and pulse the backlight of the display for the first frame at a second time based on a difference between the predicted frame duration and the actual frame duration (Figure 4 and paragraph 0024 further discloses if the frame rate for current frame 109 is relatively high, then the duty cycle calculating module 111 calculates a backlight duty cycle that is relatively shorter in length. Conversely, if the frame rate for the current frame 109 is relatively low, then the duty cycle calculating module 111 calculates a power duty cycle that is relatively longer in length).
Regarding claim 13, Kim teaches The system of claim 12, Kim further teaches wherein the pulsing the backlight of the display for the first frame at the first time comprises causing voltage to be supplied to the backlight of the display for a fraction of the predicted frame duration (Paragraph 0023 discloses the display's backlight 116 is typically only powered for a percentage which is a fraction of the total time the frame is displayed).
Regarding claim 16, Kim teaches The system of claim 12, Kim further teaches wherein the actual frame duration is shorter than the predicted frame duration, the display control circuit further to generate a shorter predicted frame duration for a second frame (Figure 4 and paragraph 0034 disclose the backlight is powered during time t1 for 90 Hz refresh-rate displays.).
Regarding claim 20, Kim teaches A system comprising: one or more processors (Fig. 1-4; GPU 107); and a display coupled to the one or more processors, the one or more processors to: generate a predicted frame duration for a first frame of a particular processor of the one or more processors (Fig. 5, Para. [0035]; discloses a lookup table 500 that lists multiple predicted display refresh rates including 60Hz, 72Hz, 80Hz, and 90Hz); determine an actual frame duration for the first frame (Figures 1-4 and Para. [0023]; discloses the frame rate determining module 108 of computer system 101, which determines the frame rate for each current frame as it is generated by the GPU 107); and cause the first frame to be displayed by operating a backlight of the display in a first mode, wherein to operate the backlight of the display in the first mode, the one or more processors are to: pulse the backlight of the display for the first frame at a first time for a fraction of the predicted frame duration (Figure 4 and paragraph 0023 the determined frame rate 110 is passed to the duty cycle calculating module 111 of computer system 101. The duty cycle calculating module 111 is configured to calculate a backlight duty cycle 112 for he backlight 116 of display 115. Paragraph 0023 further discloses the display's backlight 116 is typically only powered for a percentage - a fraction of the total time the frame is displayed); and pulse the backlight of the display for the first frame at a second time based on a difference between the predicted frame duration and the actual frame duration (Figure 4 and paragraph 0024 further discloses if the frame rate for current frame 109 is relatively high, then the duty cycle calculating module 111 calculates a backlight duty cycle that is relatively shorter in length. Conversely, if the frame rate for the current frame 109 is relatively low, then the duty cycle calculating module 111 calculates a power duty cycle that is relatively longer in length).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of pre-AIA 35 U.S.C. 103(a) which forms the basis for all obviousness rejections set forth in this Office action:
(a) A patent may not be obtained though the invention is not identically disclosed or described as set forth in section 102, if the differences between the subject matter sought to be patented and the prior art are such that the subject matter as a whole would have been obvious at the time the invention was made to a person having ordinary skill in the art to which said subject matter pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under pre-AIA 35 U.S.C. 103(a) are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 3-4, 6, 14-15 and 17 is/are rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over Kim et al. US PG-PUB 20200394971 A1 (hereinafter Kim) in view of Tada US PG-PUB 20130257918 A1 (hereinafter Tada).
Regarding claim 3, Kim teaches The method of claim 1, Kim further teaches wherein the actual frame duration is longer than the predicted frame duration (Figure 4 and paragraph 0034 disclose at the 80 Hz refresh-rate display, the backlight is powered for the time t1 plus an additional amount of time indicated by t2.),
Kim fails to further disclose and wherein the second time is in the middle of the actual frame duration.
However, in same field of backlight control, Tada teaches wherein the second time is in the middle of the actual frame duration (see figures 7 and 8 e.g. pulse Blp(2), expression 2.).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teaching Kim with the teachings as taught by Tada, in order to in order to reduce flicker disturbance Tada. [0074].
Regarding claim 4, Kim as modified by Tada teaches The method of claim 3, Kim further teaches wherein the pulsing the backlight of the display for the first frame at the second time comprises causing voltage to be supplied to the backlight of the display for a fraction of the difference between the predicted frame duration and the actual frame duration (Figure 4 and paragraph 0034 disclose the backlight is powered for times t1 +t2 +t3 for the 72 Hz refresh-rate display, wherein 80Hz is a predicted refresh rate and 72 Hz is actual refresh rate.).
Regarding claim 6, Kim teaches The method of claim 1, Kim fails to explicitly disclose further comprising, responsive to a frame rate falling below a predetermined threshold, causing a second frame to be displayed twice by operating the backlight of the display in the first mode before causing a third frame to be displayed.
However, in same field of backlight control, Tada teaches responsive to a frame rate falling below a predetermined threshold, causing a second frame to be displayed twice by operating the backlight of the display in the first mode before causing a third frame to be displayed (see paragraphs 0185-0190; teaches doubling of frames when the driving frequency of the image signal became low).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teaching Kim with the teachings as taught by Tada, in order to in order to reduce flicker disturbance Tada. [0074].
Regarding claim 14, Kim teaches The system of claim 12, Kim further teaches wherein the actual frame duration is longer than the predicted frame duration (Figure 4 and paragraph 0034 disclose at the 80 Hz refresh-rate display, the backlight is powered for the time t1 plus an additional amount of time indicated by t2.), Kim fails to further disclose and wherein the second time is in the middle of the actual frame duration.
However, in same field of backlight control, Tada teaches wherein the second time is in the middle of the actual frame duration (see figures 7 and 8 e.g. pulse Blp(2), expression 2.).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teaching Kim with the teachings as taught by Tada, in order to in order to reduce flicker disturbance Tada. [0074].
Regarding claim 15, Kim as modified by Tada teaches The system of claim 14, Kim further teaches wherein the pulsing the backlight of the display for the first frame at the second time comprises causing voltage to be supplied to the backlight of the display for a fraction of the difference between the predicted frame duration and the actual frame duration (Figure 4 and paragraph 0034 disclose the backlight is powered for times t1 +t2 +t3 for the 72 Hz refresh-rate display, wherein 80Hz is a predicted refresh rate and 72 Hz is actual refresh rate.)..
Regarding claim 17, Kim teaches The system of claim 12, Kim fails to explicitly disclose the display control circuit further to, responsive to a frame rate falling below a predetermined threshold, causing a second frame to be displayed twice by operating the backlight of the display in the first mode before causing a third frame to be displayed.
However, in same field of backlight control, Tada teaches responsive to a frame rate falling below a predetermined threshold, causing a second frame to be displayed twice by operating the backlight of the display in the first mode before causing a third frame to be displayed (see paragraphs 0185-0190; teaches doubling of frames when the driving frequency of the image signal became low).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teaching Kim with the teachings as taught by Tada, in order to in order to reduce flicker disturbance Tada. [0074].
Claims 10 and 11 is/are rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over Kim et al. US PG-PUB 20200394971 A1 (hereinafter Kim) in view of Verbeure et al. US PG-PUB 20150109286 A1 (hereinafter Verbeure).
Regarding claim 10, Kim teaches The method of claim 1, Kim teaches wherein the display comprises a single backlight (Para. [0016]; a backlight), Kim fails to explicitly and wherein a value of a pixel of the first frame is modified based on the predicted frame duration for the first frame and a position of the pixel within the first frame.
However, in same field of backlight control, Verbeure teaches wherein the display comprises a single backlight, and wherein a value of a pixel of the first frame is modified based on the predicted frame duration for the first frame and a position of the pixel within the first frame (Fig. 11 and Para. [0116]).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teaching Kim with the teachings as taught by Verbeure, in order to achieve desired pixel value Verbeure. [0116].
Regarding claim 11, Kim teaches The method of claim 1, Kim fails to explicitly wherein the display comprises more than one backlight, and wherein a value of a pixel of the first frame is modified based on the predicted frame duration for the first frame.
However, in same field of backlight control, Verbeure teaches wherein the display comprises more than one backlight (Para. [0003]; a backlight (or, more generally, the illuminating light), Para. [0013] constant backlight and flashing backlight), and wherein a value of a pixel of the first frame is modified based on the predicted frame duration for the first frame and a position of the pixel within the first frame (Fig. 11 and Para. [0116]).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teaching Kim with the teachings as taught by Verbeure, in order to achieve desired pixel value Verbeure. [0116].
Allowable Subject Matter
Claims 7-9, 18 and 19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
5. Any inquiry concerning this communication or earlier communications from the examiner should be directed to AMY ONYEKABA whose telephone number is (571)270-7633. The examiner can normally be reached on 9-5.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, NITIN K PATEL can be reached on 5712727677. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/AMY ONYEKABA/Primary Examiner, Art Unit 2628
Prosecution Insights