DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
The disclosure is objected to because of the following informalities: in paragraph [0001], in line 3, after "March 27, 2024" insert --now U.S. Patent No. 12,188,975--; in line 3, after "July 12, 2023" insert --now U.S. Patent No. 11,977,112--; in line 4 before "which is" insert --now U.S. Patent No. 11,703,538--; in line 5 after “June 11, 2021" insert --now U.S. Patent No. 11,221,360--. Appropriate correction is required.
Double Patenting
A rejection based on double patenting of the “same invention” type finds its support in the language of 35 U.S.C. 101 which states that “whoever invents or discovers any new and useful process... may obtain a patent therefor...” (Emphasis added). Thus, the term “same invention,” in this context, means an invention drawn to identical subject matter. See Miller v. Eagle Mfg. Co., 151 U.S. 186 (1894); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Ockert, 245 F.2d 467, 114 USPQ 330 (CCPA 1957).
A statutory type (35 U.S.C. 101) double patenting rejection can be overcome by canceling or amending the claims that are directed to the same invention so they are no longer coextensive in scope. The filing of a terminal disclaimer cannot overcome a double patenting rejection based upon 35 U.S.C. 101.
Claims 1-20 is/are rejected under 35 U.S.C. 101 as claiming the same invention as that of claims 1-20 of prior U.S. Patent No. 12,188,975. This is a statutory double patenting rejection. The following is the relationship between this application and US Patent No. 12,188,975 (the difference is not bold nor italic):
US Patent No. 12,188,975:
1. A system for testing multiple printed circuit boards (PCBs) comprising: a PCB testing fixture; a power source; a data acquisition unit; and a device; wherein the data acquisition unit is in communication with the device and the PCB testing fixture; wherein the PCB testing fixture is configured to receive a plurality of PCBs; wherein the power source is configured to provide an electric stimulus to the PCB testing fixture; wherein the PCB testing fixture is configured to provide the electric stimulus generated by the power source to each PCB of the plurality of PCBs; wherein the PCB testing fixture is configured to generate PCB output data for each PCB of the plurality of PCBs; wherein the PCB testing fixture is configured to transmit the PCB output data to the data acquisition unit; wherein the device is configured to determine if each PCB of the plurality of PCBs meets at least one output requirement; and wherein the plurality of PBCs include a first PBC and a second PBC, wherein the first PBC has a first output requirement, wherein the second PBC has a second output requirement, and wherein the first output requirement is different from the second output requirement.
This Application 18/982,661:
1.A system for testing multiple printed circuit boards (PCBs) comprising: a PCB testing fixture; a power source; a data acquisition unit; and a device; wherein the data acquisition unit is in communication with the device and the PCB testing fixture; wherein the PCB testing fixture is configured to receive a plurality of PCBs;
wherein the PCB testing fixture is configured to provide the electric stimulus generated by the power source to each PCB of the plurality of PCBs; wherein the PCB testing fixture is configured to generate PCB output data;
wherein the PCB testing fixture is configured to transmit the PCB output data to the data acquisition unit; wherein the device is configured to determine if each PCB of the plurality of PCBs meets at least one output requirement; and wherein the plurality of PBCs include a first PBC and a second PBC, wherein the first PBC has a first output requirement, wherein the second PBC has a second output requirement, and wherein the first output requirement is different from the second output requirement.
2. The system of claim 1, wherein the output requirements of at least one of the plurality of PCBs include an output voltage, current, and/or capacitance requirement.
2. The system of claim 1, wherein the output requirements of at least one of the plurality of PCBs include an output voltage, current, and/or capacitance requirement.
3. The system of claim 1, wherein the data acquisition unit includes a multiplexer.
3. The system of claim 1, wherein the data acquisition unit includes a multiplexer.
4. The system of claim 1, wherein the PCB output data includes voltage data, resistance data, and/or capacitance data.
4. The system of claim 1, wherein the PCB output data includes voltage data, resistance data, and/or capacitance data.
5. The system of claim 1, wherein the device is configured to generate an alert if the at least one output requirement is not met.
5. The system of claim 1, wherein the device is configured to generate an alert if the at least one output requirement is not met.
6. The system of claim 1, wherein the device is configured to generate at least one recommendation based on the PCB output data.
6. The system of claim 1, wherein the device is configured to generate at least one recommendation based on the PCB output data.
7. The system of claim 1, wherein a first output requirement includes a first output voltage, current, and/or capacitance requirement, and wherein the second output requirement includes a second output voltage, current, and/or capacitance requirement.
7. The system of claim 1, wherein a first output requirement includes a first output voltage, current, and/or capacitance requirement, and wherein the second output requirement includes a second output voltage, current, and/or capacitance requirement.
8. The system of claim 7, wherein the first output voltage, current, and/or capacitance requirement includes a first voltage of about 30 volts, and wherein the second output voltage, current, and/or capacitance requirement includes a second voltage of about 17 volts.
8. The system of claim 7, wherein the first output voltage, current, and/or capacitance requirement includes a first voltage of about 30 volts, and wherein the second output voltage, current, and/or capacitance requirement includes a second voltage of about 17 volts.
9. The system of claim 1, wherein the plurality of PCBs further includes a third PCB, wherein the third PCB has a third output requirement, wherein the first output requirement is greater than the second output requirement, and wherein the second output requirement is greater than the third output requirement.
9. The system of claim 1, wherein the plurality of PCBs further includes a third PCB, wherein the third PCB has a third output requirement, wherein the first output requirement is greater than the second output requirement, and wherein the second output requirement is greater than the third output requirement.
10. The system of claim 1, wherein the device is further configured to determine whether one or more of the plurality of PCBs has a short circuit and/or an open circuit based on the PCB output data, and wherein the device is further configured to provide at least one recommendation if the one or more of the plurality of PCBs has a short circuit and/or an open circuit.
10. The system of claim 1, wherein the device is further configured to determine whether one or more of the plurality of PCBs has a short circuit and/or an open circuit based on the PCB output data, and wherein the device is further configured to provide at least one recommendation if the one or more of the plurality of PCBs has a short circuit and/or an open circuit.
11. A method of simultaneously testing printed circuit boards (PCBs) comprising: attaching at least two PCBs to a PCB testing fixture, wherein the PCB testing fixture is configured to receive a plurality of PCBs; providing an electric stimulus to the at least two PCBs via a power source, wherein the power source is attached to the PCB testing fixture; capturing PCB output data; determining whether the at least two PCBs meet at least one output requirement based on the PCB output data; and wherein the at least two PCBs include a first PCB and a second PCB, wherein the first PCB has a first output requirement, wherein the second PCB has a second output requirement, and wherein the first output requirement is different from the second output requirement.
11. A method of simultaneously testing printed circuit boards (PCBs) comprising: attaching at least two PCBs to a PCB testing fixture, wherein the PCB testing fixture is configured to receive a plurality of PCBs; providing an electric stimulus to the at least two PCBs via a power source;
capturing PCB output data; determining whether the at least two PCBs meet at least one output requirement;
and wherein the at least two PCBs include a first PCB and a second PCB, wherein the first PCB has a first output requirement, wherein the second PCB has a second output requirement, and wherein the first output requirement is different from the second output requirement.
12. The method of claim 11, further comprising generating an electrical circuit analysis report.
12. The method of claim 11, further comprising generating an electrical circuit analysis report.
13. The method of claim 11, further comprising generating at least one recommendation to improve one or more of the at least two PCBs based on the PCB output data.
13. The method of claim 11, further comprising generating at least one recommendation to improve one or more of the at least two PCBs based on the PCB output data.
14. The method of claim 11, further comprising simultaneously supplying the electric stimulus to the at least two PCBs, analyzing the PCB output data of the at least two PCBs, and generating at least one alert if the PCB output data of one or more of the at least two PCBs is below at least one voltage cutoff.
14. The method of claim 11, further comprising simultaneously supplying the electric stimulus to the at least two PCBs, analyzing the PCB output data of the at least two PCBs, and generating at least one alert if the PCB output data of one or more of the at least two PCBs is below at least one voltage cutoff.
15. The method of claim 11, wherein the at least two PCBs include a third PCB, wherein the third PCB has a third output requirement, wherein the first output requirement is greater than the second output requirement, and wherein the second output requirement is greater than the third output requirement.
15. The method of claim 11, wherein the at least two PCBs include a third PCB, wherein the third PCB has a third output requirement, wherein the first output requirement is greater than the second output requirement, and wherein the second output requirement is greater than the third output requirement.
16. The method of claim 11, further comprising determining whether one or more of the at least two PCBs has a short circuit and/or an open circuit based on the PCB output data and providing at least one recommendation if the one or more of the at least two PCBs has a short circuit and/or an open circuit.
16. The method of claim 11, further comprising determining whether one or more of the at least two PCBs has a short circuit and/or an open circuit based on the PCB output data and providing at least one recommendation if the one or more of the at least two PCBs has a short circuit and/or an open circuit.
17. A system for testing multiple printed circuit boards (PCBs) comprising: a PCB testing fixture; a power source; and a data acquisition unit; and a device; wherein the data acquisition unit is in communication with the PCB testing fixture and the device; wherein the power source is connected to the PCB testing fixture and the data acquisition unit, wherein the power source is configured to provide an electric stimulus to the PCB testing fixture; wherein the PCB testing fixture is configured to receive a plurality of PCBs; wherein the PCB testing fixture is configured to provide the electric stimulus generated by the power source to each PCB of the plurality of PCBs; wherein the PCB testing fixture is configured to generate PCB output data for each PCB of the plurality of PCBs; and wherein the PCB testing fixture is configured to transmit the PCB output data to the data acquisition unit.
17. A system for testing multiple printed circuit boards (PCBs) comprising: a PCB testing fixture; a power source; and a data acquisition unit; and a device; wherein the data acquisition unit is in communication with the PCB testing fixture and the device; wherein the power source is connected to the PCB testing fixture and the data acquisition unit;
wherein the PCB testing fixture is configured to receive a plurality of PCBs; wherein the PCB testing fixture is configured to provide the electric stimulus generated by the power source to each PCB of the plurality of PCBs; wherein the PCB testing fixture is configured to generate PCB output data;
and wherein the PCB testing fixture is configured to transmit the PCB output data to the data acquisition unit.
18. The system of claim 17, wherein the plurality of PBCs include a first PBC and a second PBC, wherein the first PBC has a first output requirement, wherein the second PBC has a second output requirement, and wherein the first output requirement is different from the second output requirement.
18. The system of claim 17, wherein the plurality of PBCs include a first PBC and a second PBC, wherein the first PBC has a first output requirement, wherein the second PBC has a second output requirement, and wherein the first output requirement is different from the second output requirement.
19. The system of claim 17, wherein a first output requirement of a first PBC includes a first output voltage, current, and/or capacitance requirement, and wherein a second output requirement of a second PBC includes a second output voltage, current, and/or capacitance requirement.
19. The system of claim 17, wherein a first output requirement of a first PBC includes a first output voltage, current, and/or capacitance requirement, and wherein a second output requirement of a second PBC includes a second output voltage, current, and/or capacitance requirement.
20. The system of claim 17, wherein the device is configured to generate an alert if at least one output requirement of at least one of the plurality of PCBs is not met.
20. The system of claim 17, wherein the device is configured to generate an alert if at least one output requirement of at least one of the plurality of PCBs is not met.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. See PTO-892 for details.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JERMELE M HOLLINGTON whose telephone number is (571)272-1960. The examiner can normally be reached Mon-Fri 7:00am-3:30pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lee E Rodak can be reached at 571-270-5628. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JERMELE M HOLLINGTON/Primary Examiner, Art Unit 2858
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