DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
1. Claims 3-4, 8-10, 12, 20-35 and 38-45 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 01/20/2026.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
2. Claims 1-2, 5, 7, 11, 13-14, 16, 18, and 36-37 rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1, 5, 7, 11, 13-14, 16, 18, and 33-34 of U.S. Patent No. 12,217,658. Although the claims at issue are not identical, they are not patentably distinct from each other because.
18/984,723 (claim 1)
12,217,658 (claim 1)
A display panel, comprising:
A display panel
a display region;
wherein the display panel has a display region
at least two functional component regions, wherein the display region at least partially surrounds the at least two functional component regions, the at least two functional component regions comprise a first functional component region and a second functional component region that are arranged along a first direction, and the display region located between the first functional component region and the second functional component region is provided with sub-pixels for display; and
at least two functional component regions, wherein the display region at least partially surrounds the at least two functional component regions, and the at least two functional component regions are arranged along a first direction;
and wherein the at least two functional component regions comprise a first functional component region and a second functional component region,
first signal lines located in the display region, wherein at least part of each first signal line of the first signal lines extends in a first direction, and the first signal lines are arranged in a second direction intersecting with the first direction, wherein the first signal lines comprise at least one first-type signal line and at least one second-type signal line, wherein one of the at least one first-type signal line at least partially surrounds the at least two functional component regions, and the at least one second-type signal line is broken at two sides of one functional component region of the at least two functional component regions in the first direction.
wherein the display panel comprises:
first signal lines located in the display region, wherein at least part of each first signal line of the first signal lines extends in a first direction, and the first signal lines are arranged in a second direction intersecting with the first direction, wherein the first signal lines comprise at least one first-type signal line and at least one second-type signal line, wherein one of the at least one first-type signal line at least partially surrounds the at least two functional component regions, and at least one of the at least one second-type signal line is broken at two sides of one functional component region of the at least two functional component regions in the first direction;
18/984,723 (claim 2)
12,217,658 (claim 1)
The display panel according to claim 1, further comprising a dummy line extending in the second direction, wherein the dummy line comprises a first edge and a second edge that are opposite to each other in the first direction, wherein a distance d1 between the first edge and the dummy line and a distance d2 between the second edge and the dummy line satisfy 0.9≤d1/d2≤1.1, and wherein the dummy line passes through the first functional component region, and one of the at least one second-type signal line is broken at two sides of the first functional component region in the first direction.
wherein the display panel has a dummy line extending in the second direction and comprises a first edge and a second edge that are opposite to each other in the first direction, wherein a distance d1 between the first edge and the dummy line and a distance d2 between the second edge and the dummy line satisfy 0.9≤d1/d2≤1.1, wherein the dummy line passes through the first functional component region, and one of the at least one second-type signal line is broken at two sides of the first functional component region in the first direction
18/984,723 (claim 5)
12,217,658 (claim 5)
The display panel according to claim 1, wherein at least one first signal line of the first signal lines comprises at least one first connecting line, wherein one of the at least one first connecting line electrically connects two parts, which are located at two sides of one functional component region of the at least two functional component regions, of one first signal line of the first signal lines.
The display panel according to claim 4, wherein the at least one first connecting line comprises a first-type connecting line and a second-type connecting line, wherein the at least one first-type signal line comprises the first-type connecting line, and the first-type connecting line electrically connects parts of one of the at least one first-type signal line that are located at two sides of one of the at least two functional component regions; and the at least one second-type signal line comprises the second-type connecting line, and the second-type connecting line electrically connects parts of one of the at least one second-type signal line that are located at two sides of one of the at least two functional component regions.
18/984,723 (claim 7)
12,217,658 (claim 7)
The display panel according to claim 5, wherein the display panel further has a first non-display region located between the display region and one of the at least two functional component regions, wherein at least part of one first connecting line of the at least one first connecting line is located in the first non-display region.
The display panel according to claim 4, wherein at least part of one first connecting line of the at least one first connecting line is located in the display region.
18/984,723 (claim 11)
12,217,658 (claim 11)
The display panel according to claim 5, wherein the first signal lines comprise at least two first signal lines corresponding to the at least two functional component regions, wherein in the second direction, at least two first connecting lines in the at least two first signal lines are located at a same side of the at least two functional component regions.
The display panel according to claim 4, wherein the first signal lines comprise at least two first signal lines corresponding to the at least two functional component regions, wherein each of the at least two first signal lines comprises the at least one first connecting line; and in the second direction, one first connecting line of the at least one first connecting line of one first signal line of the at least two first signal lines is located at a first side of one functional component region of the at least two functional component regions, and one first connecting line of the at least one first connecting line of another first signal line of the at least two first signal lines is located at a second side of the one functional component region of the at least two functional component regions.
18/984,723 (claim 13)
12,217,658 (claim 13)
The display panel according to claim 1, wherein the at least one second-type signal line comprises a control signal line, the display panel further comprises a second non-display region that at least partially surrounds the display region, wherein the display panel further comprises: a first-type driving circuit located in the second non-display region and electrically connected to one of the at least one first-type signal line and located at a side of the display region in the first direction; and second-type driving circuits located in the second non-display region and electrically connected to the control signal line and located at two sides of the display region in the first direction.
The display panel according to claim 12, wherein the at least one first-type signal line comprises at least one first-type connecting line, wherein one of the at least one first-type connecting line electrically connects parts of one first-type signal line of the at least one first-type signal line that are located at two sides of one of the at least one functional component region; wherein the display panel further comprises pixel driving circuit groups arranged in the display region along the second direction, wherein each pixel driving circuit group of the pixel driving circuit groups comprises at least two pixel driving circuit rows arranged in the second direction, wherein each pixel driving circuit row of the at least two pixel driving circuit rows comprises pixel driving circuits arranged in the first direction; wherein the at least one first-type signal line comprises a plurality of first-type signal lines, the first-type driving circuit comprises first-type driving units that are cascaded, wherein one of the first-type driving units is electrically connected to the at least two pixel driving circuit rows in one pixel driving circuit group of the pixel driving circuit groups through at least two first-type signal lines of the plurality of first-type signal lines; and wherein the display panel further comprises at least one first jointing line, wherein at least two of the plurality of first-type signal lines that are electrically connected to the at least two pixel driving circuit rows in one pixel driving circuit group of the pixel driving circuit groups are electrically connected to one of the at least one first jointing line, and the one of the at least one first jointing line is electrically connected to the at least one first-type connecting line.
18/984,723 (claim 14)
12,217,658 (claim 14)
The display panel according to claim 13, wherein the at least one first-type signal line comprises at least one first-type connecting line, wherein one of the at least one first-type connecting line electrically connects parts of one first-type signal line of the at least one first-type signal line that are located at two sides of one of the at least one functional component region; wherein the display panel further comprises pixel driving circuit groups arranged in the display region along the second direction, wherein each pixel driving circuit group of the pixel driving circuit groups comprises at least two pixel driving circuit rows arranged in the second direction, wherein each pixel driving circuit row of the at least two pixel driving circuit rows comprises pixel driving circuits arranged in the first direction; wherein the at least one first-type signal line comprises a plurality of first-type signal lines, the first-type driving circuit comprises first-type driving units that are cascaded, wherein one of the first-type driving units is electrically connected to the at least two pixel driving circuit rows in one pixel driving circuit group of the pixel driving circuit groups through at least two first-type signal lines of the plurality of first-type signal lines; and wherein the display panel further comprises at least one first jointing line, wherein at least two of the plurality of first-type signal lines that are electrically connected to the at least two pixel driving circuit rows in one pixel driving circuit group of the pixel driving circuit groups are electrically connected to one of the at least one first jointing line, and the one of the at least one first jointing line is electrically connected to the at least one first-type connecting line.
The display panel according to claim 12, further comprising: pixel driving circuits located in the display region, wherein each of the pixel driving circuit comprises: a driving transistor, a light-emitting control circuit having a control terminal electrically connected to a light-emitting control signal line, a gate reset circuit having a control terminal electrically connected to a first scanning control signal line and an input terminal electrically connected to a first reset signal line, a data input circuit having a control terminal electrically connected to one second scanning control signal line of second scanning control signal lines, a threshold voltage compensation circuit having a control terminal electrically connected to a third scanning control signal line, and a light-emitting element reset circuit having a control terminal electrically connected to a fourth scanning control signal line, wherein the at least one first-type signal line comprises at least one of the light-emitting control signal line, the first scanning control signal line, the third scanning control signal line, or the fourth scanning control signal line; and the control signal line comprises the one second scanning control signal line.
18/984,723 (claim 16)
12,217,658 (claim 16)
The display panel according to claim 1, wherein the display region comprises pixel driving circuits; and the at least one second-type signal line comprises a functional signal line, wherein the functional signal line is configured to transmit a constant signal and is electrically connected to an input terminal of the pixel driving circuit.
The display panel according to claim 15, wherein the functional signal line comprises the first reset signal line.
18/984,723 (claim 18)
12,217,658 (claim 18)
The display panel according to claim 16, wherein at least one of the pixel driving circuits comprises a light-emitting element reset circuit, an input terminal of the light-emitting element reset circuit is electrically connected to a second reset signal line, and the functional signal line comprises the second reset signal line.
The display panel according to claim 15, wherein the pixel driving circuit further comprises a bias adjusting circuit, wherein the bias adjusting circuit is electrically connected to the fourth scanning control signal and a signal adjusting line, and the functional signal line comprises the signal adjusting line.
18/984,723 (claim 36)
12,217,658 (claim 33)
The display panel according to claim 11, wherein the at least one first-type signal line comprises a plurality of first-type signal lines, and the first-type driving circuit comprises a first-side driving circuit and a second-side driving circuit, wherein the display region is located between the first-side driving circuit and the second-side driving circuit in the first direction, one of the plurality of first-type signal lines is electrically connected to the first-side driving circuit, and another one of the plurality of at least one first-type signal lines is electrically connected to the second-side driving circuit.
The display panel according to claim 15, wherein the at least one first-type signal line comprises a plurality of first-type signal lines, and the first-type driving circuit comprises a first-side driving circuit and a second-side driving circuit, wherein the display region is located between the first-side driving circuit and the second-side driving circuit in the first direction, one of the plurality of first-type signal lines is electrically connected to the first-side driving circuit, and another one of the plurality of at least one first-type signal lines is electrically connected to the second-side driving circuit.
18/984,723 (claim 37)
12,217,658 (claim 34)
The display panel according to claim 36, wherein the first-side driving circuit comprises a first scanning control circuit and a light-emitting control circuit, wherein the first scanning control circuit is electrically connected to the first scanning control signal line, and the light-emitting control circuit is electrically connected to the light-emitting control signal line, and wherein the second-side driving circuit comprises a third scanning control circuit and a fourth scanning control circuit, wherein the third scanning control circuit is electrically connected to the third scanning control signal line, and the fourth scanning control circuit is electrically connected to the fourth scanning control signal line.
The display panel according to claim 33, wherein the first-side driving circuit comprises a first scanning control circuit and a light-emitting control circuit, wherein the first scanning control circuit is electrically connected to the first scanning control signal line, and the light-emitting control circuit is electrically connected to the light-emitting control signal line, and wherein the second-side driving circuit comprises a third scanning control circuit and a fourth scanning control circuit, wherein the third scanning control circuit is electrically connected to the third scanning control signal line, and the fourth scanning control circuit is electrically connected to the fourth scanning control signal line.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
3. Claim(s) 1-2, 5-7, 11, 13, 16-19, and 36-37 is/are rejected under 35 U.S.C. 103 as being unpatentable over Min et al (US 2023/0020515) in view of Kim et al (US 2022/0069033).
As to claim 1, Min teaches a display panel, comprising:
a display region (display region DA, fig. 4);
at least two functional component regions (a first opening area OA1 and a second opening area OA2, [0083] The opening area OA may be a component area (e.g., a sensor area, a camera area, a speaker area, etc.)), wherein the display region at least partially surrounds the at least two functional component regions (display region DA, fig. 4), the at least two functional component regions comprise a first functional component region (a first opening area OA1 , [0083]) and a second functional component region (second opening area OA2, [0083]) that are arranged along a first direction (horizontal direction, fig. 4), and the display region located between the first functional component region and the second functional component region is provided with sub-pixels for display (fig. 4 illustrates plurality of pixels P between the first opening area OA1 and the second opening area OA2 ); and
first signal lines (emission control lines EL and scan lines SL, fig. 4) located in the display region, wherein at least part of each first signal line of the first signal lines extends in a first direction (horizontal direction, fig. 4), and the first signal lines are arranged in a second direction intersecting with the first direction (as seen in fig. 4, emission control lines EL and scan lines SL are arranged in the vertical direction), wherein the first signal lines comprise at least one first-type signal line (scan lines SL, fig. 4) and at least one second-type signal line (emission control lines EL, fig. 4), wherein one of the at least one first-type signal line at least partially surrounds the at least two functional component regions (scan lines SL, fig. 4),
Min does not teach the at least one second-type signal line is broken at two sides as claimed.
However, Kim teaches the at least one second-type signal line is broken at two sides of one functional component region of the at least two functional component regions in the first direction (Figure 5 illustrates that the first emission control line Ela is broken at two side of the first region R1).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Min to teach, second-type signal line is broken at two sides of one functional component region, as suggested by Kim. the motivation would have been in order to reduce the bezel along with the display driving unit ([0004]).
As to claim 2, Min teaches the display panel, further comprising a dummy line extending in the second direction, wherein the dummy line comprises a first edge and a second edge that are opposite to each other in the first direction, wherein a distance d1 between the first edge and the dummy line and a distance d2 between the second edge and the dummy line satisfy 0.9≤d1/d2≤1.1, and wherein the dummy line passes through the first functional component region(the first opening area OA1 and the second opening area OA2 may be located on a central portion of the display area DA. Examiner’s note: from the equation 0.9≤d1/d2≤1.1, we conclude that d1 is within ±10% of d2. If the imaginary line or the dummy line extends through OA1, and the distance between the left side edge of the display device and the dummy line inside OA1 is d1 and the distance between the right-side edge of the display device and the dummy line inside OA1 is d2, then d1 is within ±10% of d2).
Min does not teach the at least one second-type signal line is broken at two sides as claimed.
However, Kim teaches one of the at least one second-type signal line is broken at two sides of the first functional component region in the first direction (Figure 5 illustrates that the first emission control line Ela is broken at two side of the first region R1).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Min to teach, second-type signal line is broken at two sides of one functional component region, as suggested by Kim. the motivation would have been in order to reduce the bezel along with the display driving unit ([0004]).
Claim 3 (Withdrawn)
Claim 4 (Withdrawn)
As to claim 5, Min in view of Kim teaches the display panel, wherein at least one first signal line of the first signal lines (Min: emission control lines EL and scan lines SL, fig. 4) comprises at least one first connecting line, wherein one of the at least one first connecting line electrically connects two parts, which are located at two sides of one functional component region of the at least two functional component regions, of one first signal line of the first signal lines (Min: curved part of EL and SL corresponding to OA1 and OA2, fig. 4).
As to claim 6, Min in view of Kim teaches the display panel, wherein the at least one first connecting line comprises a first-type connecting line (Min: curved part of SL corresponding to OA1 and OA2, fig. 4) and a second-type connecting line (Min: curved part of EL corresponding to OA1 and OA2, fig. 4), wherein the at least one first-type signal line (Min: scan lines SL, fig. 4) comprises the first-type connecting line (Min: curved part of SL corresponding to OA1 and OA2, fig. 4), and the first-type connecting line electrically connects parts of one of the at least one first-type signal line that are located at two sides of one of the at least two functional component regions (Min: curved part of SL corresponding to OA1 and OA2, fig. 4); and the at least one second-type signal line (Min: emission control lines EL, fig. 4) comprises the second-type connecting line (Min: curved part of EL corresponding to OA1 and OA2, fig. 4), and the second-type connecting line electrically connects parts of one of the at least one second-type signal line that are located at two sides of one of the at least two functional component regions (Min: curved part of EL corresponding to OA1 and OA2, fig. 4).
As to claim 7, Min in view of Kim teaches the display panel, wherein the display panel further has a first non-display region located between the display region and one of the at least two functional component regions, wherein at least part of one first connecting line of the at least one first connecting line is located in the first non-display region (Min: [0090] the intermediate area MA may surround each of the first opening area OA1 and the second opening area OA2. The intermediate area MA is an area where a display element such as an organic light-emitting diode that emits light is not located, and signal lines for applying signals to the pixels P located around the first opening area OA1 and the second opening area OA2 may pass through the intermediate area MA Figs. 3 and 4).
Claim 8 (Withdrawn)
Claim 9 (Withdrawn)
Claim 10 (Withdrawn)
As to claim 11, Min in view of Kim teaches the display panel, wherein the first signal lines comprise at least two first signal lines (Min: emission control lines EL and scan lines SL, fig. 4) corresponding to the at least two functional component regions (a first opening area OA1 and a second opening area OA2), wherein in the second direction (vertical direction, fig. 4), at least two first connecting lines in the at least two first signal lines are located at a same side of the at least two functional component regions (Min: Fig. 4 illustrates that the curved part of EL and SL corresponding to OA1 and OA2 are located at a same side of the OA1 and OA2).
Claim 12 (Withdrawn)
As to claim 13, Min in view of Kim teaches the display panel, wherein the at least one second-type signal line comprises a control signal line (Min: emission control lines EL, fig. 3), the display panel further comprises a second non-display region that at least partially surrounds the display region (Min: peripheral area PA, fig. 3), wherein the display panel further comprises: a first-type driving circuit located in the second non-display region (Min: a scan driver 2100, fig. 3) and electrically connected to one of the at least one first-type signal line and located at a side of the display region in the first direction (Min: scan lines SL, fig. 3), and second-type driving circuits located in the second non-display region (Min: fig. 3 illustrates two emission control drivers 2300 connected to emission control lines EL) and electrically connected to the control signal line and located at two sides of the display region in the first direction (Min: see fig. 3).
As to claim 16, Min in view of Kim teaches the display panel, wherein the display region comprises pixel driving circuits (Min: PC, fig. 5); and the at least one second-type signal line comprises a functional signal line (Min: first initialization voltage line Vl1 and second initialization voltage line VL2, fig. 5), wherein the functional signal line is configured to transmit a constant signal and is electrically connected to an input terminal of the pixel driving circuit (Min: an anode initialization voltage Aint, and first initialization voltage Vint, fig. 5).
As to claim 17, Min in view of Kim teaches the display panel, wherein at least one of the pixel driving circuits comprises a gate reset circuit (Min: a first initialization thin-film transistor T4, fig. 5) having an input terminal electrically connected to a first reset signal line (Min: first initialization voltage line VL1, fig. 5), and wherein the functional signal line comprises the first reset signal line (Min: Min: first initialization voltage line VL1, fig. 5).
As to claim 18, Min in view of Kim teaches the display panel, wherein at least one of the pixel driving circuits comprises a light-emitting element reset circuit (Min: T7, fig. 5), an input terminal of the light-emitting element reset circuit (Min: second initialization thin-film transistor T7, fig. 5) is electrically connected to a second reset signal line, and the functional signal line comprises the second reset signal line (Min: second initialization voltage line VL2, fig. 5).
As to claim 19, Min in view of Kim teaches the display pane, further comprising: a first metal layer (Min: OLED layer, fig. 8); a second metal layer (Min: data line layer DL-D for red and blue, fig. 8); a third metal layer (Min: data line layer DL-D for green, fig. 8); a fourth metal layer (Min: SL1-D, fig. 8); and a fifth metal layer (Min: SL2-D and SLP-D, fig. 8) that are sequentially stacked in a thickness direction of the display panel (see fig. 8), wherein a signal adjusting line is located in the fifth metal layer (Min: SL2-D, fig. 8).
Claim 20 (Withdrawn)
Claim 21 (Withdrawn)
Claim 22 (Withdrawn)
Claim 23 (Withdrawn)
Claim 24 (Withdrawn)
Claim 25 (Withdrawn)
Claim 26 (Withdrawn)
Claim 27 (Withdrawn)
Claim 28 (Withdrawn)
Claim 29 (Withdrawn)
Claim 30 (Withdrawn)
Claim 31 (Withdrawn)
Claim 32 (Withdrawn)
Claim 33 (Withdrawn)
Claim 34 (Withdrawn)
Claim 35 (Withdrawn)
As to claim 36, Min in view of Kim teaches the display panel, wherein the at least one first-type signal line (Min: scan lines SL, fig. 3) comprises a plurality of first-type signal lines (Min: see fig. 3), and the first-type driving circuit comprises a first-side driving circuit (Min: scan driver 2100 at the left hand side of fig. 3) and a second-side driving circuit (Min: scan driver 2100 at the right hand side of fig. 3), wherein the display region is located between the first-side driving circuit and the second-side driving circuit in the first direction (Min: DA, fig. 3), one of the plurality of first-type signal lines is electrically connected to the first-side driving circuit, and another one of the plurality of at least one first-type signal lines is electrically connected to the second- side driving circuit (Min: fig. 3 illustrates SL at the top is connected to the scan driver 2100 at the left hand side and SL at the bottom is connected to the scan driver 2100 at the right hand side).
As to claim 37, Min in view of Kim teaches the display panel, wherein the first-side driving circuit comprises a first scanning control circuit (Min: scan driver 2100 at the left hand side of fig. 3) and a light-emitting control circuit (Min: emission control driver 2300 at the left hand side of fig. 3 ), wherein the first scanning control circuit is electrically connected to the first scanning control signal line (Min: SL at the top, fig. 3), and the light-emitting control circuit is electrically connected to the light-emitting control signal line (Min: EL at the top, fig. 3), and wherein the second-side driving circuit comprises a third scanning control circuit (Min: scan driver 2100 at the right hand side of fig. 3) and a fourth scanning control circuit (Min: emission control driver 2300 at the right hand side of fig. 3), wherein the third scanning control circuit is electrically connected to the third scanning control signal line (Min: SL at the bottom, fig. 3), and the fourth scanning control circuit is electrically connected to the fourth scanning control signal line (Min: EL at the bottom, fig. 3).
4. Claim(s) 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Min et al (US 2023/0020515) in view of Kim et al (US 2022/0069033) and further in view of Huang et al (US 2024/0257733).
As to claim 15, Min in view of Kim teaches the display panel, further comprising: pixel driving circuits located in the display region, wherein each of the pixel driving circuit comprises: a driving transistor (Min: a driving thin-film transistor T1, fig. 5), a light-emitting control circuit (Min: T5 and T6, fig. 5) having a control terminal electrically connected to a light- emitting control signal line (Min: emission control line EL, fig. 5), a gate reset circuit (Min: a first initialization thin-film transistor T4, fig. 5) having a control terminal electrically connected to a first scanning control signal line (Min: previous scan line SLp, fig. 5) and an input terminal electrically connected to a first reset signal line (Min: first initialization voltage line VL1, fig. 5), a data input circuit (Min: switching thin-film transistor T2, fig. 5) having a control terminal electrically connected to one second scanning control signal line of second scanning control signal lines (Min: first scan line SL1, fig. 5), a threshold voltage compensation circuit (Min: gate electrode of the compensation thin-film transistor T3, fig. 5 ) having a control terminal electrically connected to a third scanning control signal line (Min: second scan line SL2, fig. 5), and a light-emitting element reset circuit (Min: T7, fig. 5) having an input terminal electrically connected to a second reset signal line (Min: Aint, fig. 5), wherein the at least one first-type signal line comprises at least one of the light-emitting control signal line (Min: emission control line EL, fig. 5), the first scanning control signal line (Min: previous scan line SLp, fig. 5), the third scanning control signal line (Min: second scan line SL2, fig. 5), or the fourth scanning control signal line (Min: next scan line SLn, fig. 5); and the control signal line comprises the one second scanning control signal line (Min: first scan line SL1, fig. 5)
Min in view of Kim does not teach a bias adjusting circuit having a control terminal electrically connected to a fourth scanning control signal line and a signal adjusting line.
Huang teaches a bias adjusting circuit (3, fig. 6) having a control terminal electrically connected to a fourth scanning control signal line (Re1, fig. 6) and a signal adjusting line (VGH, fig. 6).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Min and Kim to teach, a bias adjusting circuit, as suggested by Huang. the motivation would have been in order to improve “the afterimage problem of the display panel” ([0132]).
Claim 38 (Withdrawn)
Claim 39 (Withdrawn)
Claim 40 (Withdrawn)
Claim 41 (Withdrawn)
Claim 42 (Withdrawn)
Claim 43 (Withdrawn)
Claim 44 (Withdrawn)
Claim 45 (Withdrawn)
Allowable Subject Matter
5. Claim 14 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
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/AMEN W BOGALE/Examiner, Art Unit 2628
/NITIN PATEL/Supervisory Patent Examiner, Art Unit 2628