Prosecution Insights
Last updated: April 19, 2026
Application No. 18/984,733

DISPLAY PANEL AND DISPLAY APPARATUS

Non-Final OA §103
Filed
Dec 17, 2024
Examiner
BOGALE, AMEN W
Art Unit
2628
Tech Center
2600 — Communications
Assignee
Wuhan Tianma Microelectronics Co., Ltd.
OA Round
1 (Non-Final)
74%
Grant Probability
Favorable
1-2
OA Rounds
2y 5m
To Grant
78%
With Interview

Examiner Intelligence

Grants 74% — above average
74%
Career Allow Rate
338 granted / 455 resolved
+12.3% vs TC avg
Minimal +4% lift
Without
With
+4.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
29 currently pending
Career history
484
Total Applications
across all art units

Statute-Specific Performance

§101
1.2%
-38.8% vs TC avg
§103
56.5%
+16.5% vs TC avg
§102
34.1%
-5.9% vs TC avg
§112
5.4%
-34.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 455 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions 1. Claims 3-4, 6-8, 10, 19-34 and 37-44 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 01/23/2026. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 2. Claim(s) 1-2, 5, 9, 11, 14-15, 17-18, and 35-36 is/are rejected under 35 U.S.C. 103 as being unpatentable over Min et al (US 2023/0020515) in view of Kim et al (US 2022/0069033). As to claim 1, Min teaches a display panel, comprising: a display region (display region DA, fig. 4); at least two functional component regions (a first opening area OA1 and a second opening area OA2, [0083] The opening area OA may be a component area (e.g., a sensor area, a camera area, a speaker area), wherein the display region at least partially surrounds the at least two functional component regions (display region DA, fig. 4), and the at least two functional component regions are arranged along a first direction (in the x direction, fig. 4) and comprise a first functional component region (a first opening area OA1, fig. 4) and a second functional component region(a second opening area OA2, fig. 4); and first signal lines (emission control lines EL and scan lines SL, fig. 4) located in the display region, wherein at least part of each first signal line of the first signal lines extends in a first direction (x direction, fig. 4), and the first signal lines are arranged in a second direction intersecting with the first direction (fig. 4 illustrates that the emission lines EL and the scan lines SL are arranged in the vertical direction), wherein the first signal lines comprise at least one first-type signal line (scan line SL, fig. 4) and at least one second-type signal line (emission control line, fig. 4), wherein the at least one first-type signal line (scan line SL, fig. 4) comprises at least two first-type connecting line (the first curved part of scan line SL that surrounds OA1 and the second curved part of scan line SL that surrounds OA2, fig. 4), and one of the at least two first-type connecting line (the first curved part of scan line SL that surrounds OA1, fig. 4) electrically connects parts of one of the at least one first-type signal line (scan line SL) that are located at two sides of the first functional component region (a first opening area OA1, fig. 4), another one of the at least two first-type connecting line (the second curved part of scan line SL that surrounds OA2, fig. 4) electrically connects parts of one of the at least one first-type signal line (scan line SL) that are located at two sides of the second functional component region (a second opening area OA2, fig. 4), and the at least one second-type signal line (emission control line, fig. 4) comprises a second-type connecting line (the first curved part of emission control line that surrounds OA1, fig. 4), and the second-type connecting line electrically connects parts of one of the at least one second-type signal line (emission control line, fig. 4) that are located at two sides of one of the at least two functional component regions (a first opening area OA1, fig. 4) Min does not teach the at least one second-type signal line is broken at two sides of the another one of the at least two functional component regions as claimed. However, Kim teaches the at least one second-type signal line is broken at two sides of the another one of the at least two functional component regions (Figure 5 illustrates that the first emission control line Ela is broken at two side of the first region R1). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Min to teach, second-type signal line is broken at two sides of one functional component region, as suggested by Kim. the motivation would have been in order to reduce the bezel along with the display driving unit ([0004]). As to claim 2, Min teaches the display panel, wherein the display panel further comprises a dummy line extending in the second direction and comprises a first edge and a second edge that are opposite to each other in the first direction, wherein a distance d1 between the first edge and the dummy line and a distance d2 between the second edge and the dummy line satisfy 0.9≤d1/d2≤1.1, and wherein the dummy line passes through the first functional component region (the first opening area OA1 and the second opening area OA2 may be located on a central portion of the display area DA. Examiner's note: from the equation 0.9≤d1/d2≤1.1, we conclude that d1 is within +10% of d2. If the imaginary line or the dummy line extends through OA1, and the distance between the left side edge of the display device and the dummy line inside OA1 is d1 and the distance between the right-side edge of the display device and the dummy line inside OA1 is d2, then d1 is within +10% of d2). Min does not teach the at one of the at least one second-type signal line is broken at two sides as claimed. However, Kim teaches one of the at least one second-type signal line is broken at two sides of the first functional component region in the first direction (Figure 5 illustrates that the first emission control line Ela is broken at two side of the first region R1). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Min to teach, second-type signal line is broken at two sides of one functional component region, as suggested by Kim. the motivation would have been in order to reduce the bezel along with the display driving unit ([0004]). Claim 3 (Withdrawn) Claim 4 (Withdrawn) As to claim 5, Min in view of Kim teaches the display panel, wherein the display panel further has a first non-display region located between the display region and one of the at least two functional component regions, wherein at least part of one first connecting line of the at least one first connecting line is located in the first non-display region (Min: [0090] the intermediate area MA may surround each of the first opening area OA1 and the second opening area OA2. The intermediate area MA is an area where a display element such as an organic light-emitting diode that emits light is not located, and signal lines for applying signals to the pixels P located around the first opening area OA1 and the second opening area OA2 may pass through the intermediate area MA Figs. 3 and 4). Claim 6 (Withdrawn) Claim 7 (Withdrawn) Claim 8 (Withdrawn) As to claim 9, Min in view of Kim teaches the display panel, wherein the first signal lines comprise at least two first signal lines (Min: emission control lines EL and scan lines SL, fig. 4) corresponding to the at least two functional component regions (a first opening area OA1 and a second opening area OA2), wherein in the second direction (vertical direction, fig. 4), at least two first connecting lines in the at least two first signal lines are located at a same side of the at least two functional component regions (Min: Fig. 4 illustrates that the curved part of EL and SL corresponding to OA1 and OA2 are located at a same side of the OA1 and OA2). Claim 10 (Withdrawn) As to claim 11, Min in view of Kim teaches the display panel, wherein the at least one second-type signal line comprises a control signal line (Min: emission control lines EL, fig. 3), the display panel further has a second non-display region that at least partially surrounds the display region (Min: peripheral area PA, fig. 3), wherein the display panel further comprises: a first-type driving circuit located in the second non-display region (Min: a scan driver 2100, fig. 3) and electrically connected to one of the at least one first-type signal line and located at a side of the display region in the first direction (Min: scan lines SL, fig. 3), and second-type driving circuits located in the second non-display region (Min: fig. 3 illustrates two emission control drivers 2300 connected to emission control lines EL) and electrically connected to the control signal line and located at two sides of the display region in the first direction (Min: see fig. 3). As to claim 14, Min in view of Kim teaches the display panel, wherein the display region comprises pixel driving circuits (Min: PC, fig. 5); and the at least one second-type signal line comprises a functional signal line (Min: first initialization voltage line Vl1 and second initialization voltage line VL2, fig. 5), wherein the functional signal line is configured to transmit a constant signal and is electrically connected to an input terminal of the pixel driving circuit (Min: an anode initialization voltage Aint, and first initialization voltage Vint, fig. 5). As to claim 15, Min in view of Kim teaches the display panel, wherein at least one of the pixel driving circuits comprises a gate reset circuit (Min: a first initialization thin-film transistor T4, fig. 5) having an input terminal electrically connected to a first reset signal line (Min: first initialization voltage line VL1, fig. 5), and wherein the functional signal line comprises the first reset signal line (Min: Min: first initialization voltage line VL1, fig. 5). Claim 16 (Withdrawn) As to claim 17, Min in view of Kim teaches the display panel, wherein at least one of the pixel driving circuits comprises a light-emitting element reset circuit (Min: T7, fig. 5), an input terminal of the light-emitting element reset circuit (Min: second initialization thin-film transistor T7, fig. 5) is electrically connected to a second reset signal line, and the functional signal line comprises the second reset signal line (Min: second initialization voltage line VL2, fig. 5). As to claim 18, Min in view of Kim teaches the display pane, further comprising: a first metal layer (Min: OLED layer, fig. 8); a second metal layer (Min: data line layer DL-D for red and blue, fig. 8); a third metal layer (Min: data line layer DL-D for green, fig. 8); a fourth metal layer (Min: SL1-D, fig. 8); and a fifth metal layer (Min: SL2-D and SLP-D, fig. 8) that are sequentially stacked in a thickness direction of the display panel (see fig. 8), wherein a signal adjusting line is located in the fifth metal layer (Min: SL2-D, fig. 8). Claim 19 (Withdrawn) Claim 20 (Withdrawn) Claim 21 (Withdrawn) Claim 22 (Withdrawn) Claim 23 (Withdrawn) Claim 24 (Withdrawn) Claim 25 (Withdrawn) Claim 26 (Withdrawn) Claim 27 (Withdrawn) Claim 28 (Withdrawn) Claim 29 (Withdrawn) Claim 30 (Withdrawn) Claim 31 (Withdrawn) Claim 32 (Withdrawn) Claim 33 (Withdrawn) Claim 34 (Withdrawn) As to claim 35, Min in view of Kim teaches the display panel, wherein the at least one first-type signal line (Min: scan lines SL, fig. 3) comprises a plurality of first-type signal lines (Min: see fig. 3), and the first-type driving circuit comprises a first-side driving circuit (Min: scan driver 2100 at the left hand side of fig. 3) and a second-side driving circuit (Min: scan driver 2100 at the right hand side of fig. 3), wherein the display region is located between the first-side driving circuit and the second-side driving circuit in the first direction (Min: DA, fig. 3), one of the plurality of first-type signal lines is electrically connected to the first-side driving circuit, and another one of the plurality of at least one first-type signal lines is electrically connected to the second- side driving circuit (Min: fig. 3 illustrates SL at the top is connected to the scan driver 2100 at the left hand side and SL at the bottom is connected to the scan driver 2100 at the right hand side). As to claim 36, Min in view of Kim teaches the display panel, wherein the first-side driving circuit comprises a first scanning control circuit (Min: scan driver 2100 at the left hand side of fig. 3) and a light-emitting control circuit (Min: emission control driver 2300 at the left hand side of fig. 3 ), wherein the first scanning control circuit is electrically connected to the first scanning control signal line (Min: SL at the top, fig. 3), and the light-emitting control circuit is electrically connected to the light-emitting control signal line (Min: EL at the top, fig. 3), and wherein the second-side driving circuit comprises a third scanning control circuit (Min: scan driver 2100 at the right hand side of fig. 3) and a fourth scanning control circuit (Min: emission control driver 2300 at the right hand side of fig. 3), wherein the third scanning control circuit is electrically connected to the third scanning control signal line (Min: SL at the bottom, fig. 3), and the fourth scanning control circuit is electrically connected to the fourth scanning control signal line (Min: EL at the bottom, fig. 3). Claim 37 (Withdrawn) Claim 38 (Withdrawn) Claim 39 (Withdrawn) Claim 40 (Withdrawn) Claim 41 (Withdrawn) Claim 42 (Withdrawn) Claim 43 (Withdrawn) Claim 44 (Withdrawn) 3. Claim(s) 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Min et al (US 2023/0020515) in view of Kim et al (US 2022/0069033) and further in view of Huang et al (US 2024/0257733). As to claim 13, Min in view of Kim teaches the display panel, further comprising: pixel driving circuits located in the display region, wherein each of the pixel driving circuit comprises: a driving transistor (Min: a driving thin-film transistor T1, fig. 5), a light-emitting control circuit (Min: T5 and T6, fig. 5) having a control terminal electrically connected to a light- emitting control signal line (Min: emission control line EL, fig. 5), a gate reset circuit (Min: a first initialization thin-film transistor T4, fig. 5) having a control terminal electrically connected to a first scanning control signal line (Min: previous scan line SLp, fig. 5) and an input terminal electrically connected to a first reset signal line (Min: first initialization voltage line VL1, fig. 5), a data input circuit (Min: switching thin-film transistor T2, fig. 5) having a control terminal electrically connected to one second scanning control signal line of second scanning control signal lines (Min: first scan line SL1, fig. 5), a threshold voltage compensation circuit (Min: gate electrode of the compensation thin-film transistor T3, fig. 5 ) having a control terminal electrically connected to a third scanning control signal line (Min: second scan line SL2, fig. 5), and a light-emitting element reset circuit (Min: T7, fig. 5) having an input terminal electrically connected to a second reset signal line (Min: Aint, fig. 5), wherein the at least one first-type signal line comprises at least one of the light-emitting control signal line (Min: emission control line EL, fig. 5), the first scanning control signal line (Min: previous scan line SLp, fig. 5), the third scanning control signal line (Min: second scan line SL2, fig. 5), or the fourth scanning control signal line (Min: next scan line SLn, fig. 5); and the control signal line comprises the one second scanning control signal line (Min: first scan line SL1, fig. 5) Min in view of Kim does not teach a bias adjusting circuit having a control terminal electrically connected to a fourth scanning control signal line and a signal adjusting line. Huang teaches a bias adjusting circuit (3, fig. 6) having a control terminal electrically connected to a fourth scanning control signal line (Re1, fig. 6) and a signal adjusting line (VGH, fig. 6). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify Min and Kim to teach, a bias adjusting circuit, as suggested by Huang. the motivation would have been in order to improve “the afterimage problem of the display panel” ([0132]). Allowable Subject Matter 4. Claim 12 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to AMEN W BOGALE whose telephone number is (571)270-1579. The examiner can normally be reached M-F 10:AM-6:PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Nitin Patel can be reached at (571)272-7677. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /AMEN W BOGALE/Examiner, Art Unit 2628 /NITIN PATEL/Supervisory Patent Examiner, Art Unit 2628
Read full office action

Prosecution Timeline

Dec 17, 2024
Application Filed
Mar 17, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
74%
Grant Probability
78%
With Interview (+4.0%)
2y 5m
Median Time to Grant
Low
PTA Risk
Based on 455 resolved cases by this examiner. Grant probability derived from career allow rate.

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