Prosecution Insights
Last updated: April 19, 2026
Application No. 18/986,432

DRIVING CONTROLLER AND DISPLAY DEVICE INCLUDING THE SAME

Final Rejection §103§112
Filed
Dec 18, 2024
Examiner
CRAWLEY, KEITH L
Art Unit
2626
Tech Center
2600 — Communications
Assignee
Samsung Display Co., Ltd.
OA Round
2 (Final)
59%
Grant Probability
Moderate
3-4
OA Rounds
3y 7m
To Grant
85%
With Interview

Examiner Intelligence

Grants 59% of resolved cases
59%
Career Allow Rate
340 granted / 577 resolved
-3.1% vs TC avg
Strong +26% interview lift
Without
With
+26.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 7m
Avg Prosecution
27 currently pending
Career history
604
Total Applications
across all art units

Statute-Specific Performance

§101
2.0%
-38.0% vs TC avg
§103
53.6%
+13.6% vs TC avg
§102
20.5%
-19.5% vs TC avg
§112
19.9%
-20.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 577 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 In light of the amendment filed 12/5/25, the rejection of claims 6 and 16 under 35 U.S.C. 112(b) is withdrawn. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-5, 7-15, and 17-20 are rejected under 35 U.S.C. 103 as being unpatentable over Pyun et al. (US 2022/0215803) in view of Kim et al. (US 2021/0201781) and Lee et al. (US 2021/0049954). Regarding claim 1, Pyun discloses a driving controller comprising: a voltage determination block configured to analyze a grayscale of an input image signal, and to output a voltage signal according to the analyzed grayscale (abstract, figs. 2-4, ¶ 44-45, ¶ 59-64, see also ¶ 83-92, peak grayscale detector 220 detects highest grayscale among input image data; see also fig. 11); a power luminance controller configured to calculate a load of the input image signal (figs. 2-4, ¶ 44-45, ¶ 59-64, see also ¶ 83-92, load value calculator 210 calculates load value; see also fig. 11); an overcurrent-reference-setting block configured to output an overcurrent reference value based on the voltage signal and based on the load (figs. 2-4, ¶ 83-95, reference first power supply voltage generated based on load value LV and peak grayscale PG; see also fig. 11); a current-sensing-and-overcurrent-determining unit configured to receive a feedback signal, to compare a current level of the feedback signal with the overcurrent reference value, and to output a first signal corresponding to a comparison result (figs. 2-4, ¶ 83-95, feedback signal compared with reference first power voltage; see also ¶ 102-111; see also fig. 11); and a voltage controller configured to output a voltage control signal for setting a voltage level of a first driving voltage based on the voltage signal and based on the first signal (figs. 2-4, see also fig. 9 and fig. 11, ¶ 83-95, ¶ 112-113, corrected power voltage VDD provided to display panel in response to power control signal PCS). Pyun fails to disclose a feedback current signal, wherein the overcurrent-reference-setting block is further configured to output the overcurrent reference value based on a current error corresponding to the voltage level of the first driving voltage, which is indicated by the voltage signal, and a maximum current corresponding to the load, wherein the overcurrent reference value has a first overcurrent reference value when the first driving voltage is a first voltage level, wherein the overcurrent reference value has a second overcurrent reference value lower than the first overcurrent reference value when the first driving voltage is a second voltage level higher than the first voltage level, and wherein the first signal indicates an overcurrent when the current level of the feedback current signal is greater than or equal to the overcurrent reference value. Kim teaches a feedback current signal (figs. 1-4, ¶ 60-71, global current GC, see also ¶ 78-83; see also fig. 6), wherein the overcurrent-reference-setting block is further configured to output the overcurrent reference value based on a current error corresponding to the voltage level of the first driving voltage, which is indicated by the voltage signal, and a maximum current corresponding to the load (figs. 1-4, ¶ 60-71, global current value selected corresponding to load, global current signal GCS includes a difference between GC and the global current value; margin may be set as a percentage, e.g., 20% margin, see also ¶ 78-83; see also fig. 6), and wherein the first signal indicates an overcurrent when the current level of the feedback current signal is greater than or equal to the overcurrent reference value (figs. 1-4, ¶ 60-71, global current value selected corresponding to load, global current signal GCS includes a difference between GC and the global current value; margin may be set as a percentage, e.g., 20% margin, see also ¶ 78-83; see also fig. 6). Pyun and Kim are both directed to display driving adjustment based on display panel load. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the device of Pyun with the device of Kim since such a modification provides the overcurrent protection circuit may be operated adaptively according to the screen load (Kim, ¶ 31) and may operate even at a low screen load to prevent or reduce degradation of the organic light emitting diode (Kim, ¶ 31). Lee teaches wherein the overcurrent reference value has a first overcurrent reference value when the first driving voltage is a first voltage level, wherein the overcurrent reference value has a second overcurrent reference value lower than the first overcurrent reference value when the first driving voltage is a second voltage level higher than the first voltage level (¶ 12-16, ¶ 292-298, current reference is decreased when driving voltage is greater than a predetermined voltage). Pyun in view of Kim and Lee are both directed to display driving adjustment based on display panel load. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the device of Pyun in view of Kim with the device of Lee since such a modification prevents and/or reduces overheating of the light emitting diode and/or the driving switch by preventing and/or reducing an overvoltage from being applied to the light emitting diode (Lee, ¶ 293). Regarding claim 2, Kim further teaches wherein the current error has a value that is greater as the voltage level of the first driving voltage indicated by the voltage signal is higher (figs. 1-4, ¶ 60-71, global current value selected corresponding to load, global current signal GCS includes a difference between GC and the global current value; margin may be set as a percentage, e.g., 20% margin, see also ¶ 78-83; see also fig. 6). Regarding claim 3, Kim further teaches wherein the overcurrent reference value decreases as a value of the current error increases (figs. 1-4, ¶ 60-71, global current value selected corresponding to load, global current signal GCS includes a difference between GC and the global current value; when load value is 1% or less, GCM is at 1A and OCP is set to 2A, i.e., error value of 50% disclosed, see also ¶ 78-83; see also fig. 6). Regarding claim 4, Kim further teaches a current error lookup table configured to store the current error corresponding to the voltage level of the first driving voltage indicated by the voltage signal (figs. 2-4, lookup tables disclosed, ¶ 60-71, see also ¶ 78-83); and a load-current lookup table configured to store the maximum current corresponding to the load (figs. 2-4, lookup tables disclosed, ¶ 60-71, see also ¶ 78-83). Regarding claim 5, Kim further teaches wherein the overcurrent-reference-setting block is configured to output the overcurrent reference value based on the current error and the maximum current (global current value selected corresponding to load, global current signal GCS includes a difference between GC and the global current value; margin may be set as a percentage, e.g., 20% margin, see also ¶ 78-83; see also fig. 6). Regarding claim 7, Pyun discloses wherein the current-sensing-and-overcurrent-determining unit is configured to: output the first signal of a first level when the current level of the feedback current signal is less than the overcurrent reference value; and output the first signal of a second level when the current level of the feedback current signal is greater than or equal to the overcurrent reference value (figs. 2-4, see also fig. 9 and fig. 11, ¶ 83-95, ¶ 102-113, corrected power voltage VDD provided to display panel in response to power control signal PCS). Regarding claim 8, Pyun discloses wherein the voltage controller is configured to: output the voltage control signal corresponding to the voltage level of the first driving voltage when the first signal is at the first level; and output the voltage control signal corresponding to a voltage level that is lower than the voltage level of the first driving voltage when the first signal is at the second level (figs. 2-4, see also fig. 9 and fig. 11, ¶ 83-95, ¶ 102-113, corrected power voltage VDD provided to display panel in response to power control signal PCS; see also fig. 5). Regarding claim 9, Pyun discloses wherein the voltage determination block comprises: a grayscale analyzer configured to extract a highest grayscale of the input image signal of one frame (figs. 2-4, ¶ 44-45, ¶ 59-64, see also ¶ 83-92, peak grayscale detector 220 detects highest grayscale among input image data; see also fig. 11); and a power control block configured to determine the voltage level of the first driving voltage based on the highest grayscale and the load (figs. 2-4, see also fig. 9 and fig. 11, ¶ 83-95, ¶ 112-113, corrected power voltage VDD provided to display panel in response to power control signal PCS; see also fig. 5). Regarding claim 10, Pyun discloses wherein the voltage level of the first driving voltage increases as the highest grayscale increases (figs. 2-4, see also fig. 9 and fig. 11, ¶ 83-95, ¶ 102-113, corrected power voltage VDD provided to display panel in response to power control signal PCS; see also fig. 5). Regarding claim 11, Pyun discloses an electronic device comprising: a display panel (figs. 1-2, ¶ 44-45, ¶ 59-64); a driving controller configured to receive an input image signal, and to output an image data signal (figs. 1-2, ¶ 44-45, timing controller 600, ¶ 49-50); a data-driving circuit configured to provide the display panel with a data signal corresponding to the image data signal (figs. 1-2, ¶ 44-45, data driver 500, ¶ 49-50); and a voltage generator configured to provide a first driving voltage to the display panel in response to a voltage control signal (figs. 1-2, ¶ 44-45, power supply 300, ¶ 48-50; see also ¶ 59-64). The remaining limitations of claim 11 are rejected under the same rationale as claim 1. Regarding claim 12, this claim is rejected under the same rationale as claim 2. Regarding claim 13, this claim is rejected under the same rationale as claim 3. Regarding claim 14, this claim is rejected under the same rationale as claim 4. Regarding claim 15, this claim is rejected under the same rationale as claim 5. Regarding claim 17, this claim is rejected under the same rationale as claim 7. Regarding claim 18, this claim is rejected under the same rationale as claim 8. Regarding claim 19, this claim is rejected under the same rationale as claim 9. Regarding claim 20, this claim is rejected under the same rationale as claim 10. Allowable Subject Matter Claims 6 and 16 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Response to Arguments Applicant’s arguments with respect to claims 1 and 11 have been considered but are moot in view of the new ground(s) of rejection. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to KEITH L CRAWLEY whose telephone number is (571)270-7616. The examiner can normally be reached Monday - Friday 10-6 ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Temesghen Ghebretinsae can be reached at 571-272-3017. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /KEITH L CRAWLEY/Primary Examiner, Art Unit 2626
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Prosecution Timeline

Dec 18, 2024
Application Filed
Sep 06, 2025
Non-Final Rejection — §103, §112
Dec 05, 2025
Response Filed
Mar 06, 2026
Final Rejection — §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
59%
Grant Probability
85%
With Interview (+26.4%)
3y 7m
Median Time to Grant
Moderate
PTA Risk
Based on 577 resolved cases by this examiner. Grant probability derived from career allow rate.

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