DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statements submitted on 8/06/2025 and 7/25/2025 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
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Claims 14-33 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 12,219,126 B2 in view of Li et al. (US 20200177873 A1). Although the claims at issue are not identical, they are not patentably distinct from each other because of the following:
**Note: The limitations that are BOLD indicate claim limitations that are identical in the issued patent and the patent being examined.
Instant Application No. 18/987,219
Issued U.S. Patent No. 12,219,126 B2
Claim 14
A device for video decoding, comprising:
a processor configured to:
obtain a combined inter merge-intra prediction (ClIP) indication that indicates whether ClIP is applied for a video block;
determine, based on the CIIP indication, that CIIP is applied for the video block;
determine that a merge mode is enabled for a picture that comprises the video block, wherein the merge mode allows a triangle partition of the video block to be predicted using a uni-prediction merge candidate associated with the video block;
determine to disable the merge mode for the video block based on determining that CIIP is applied for the video block; and
decode the video block based on disabling the merge mode for the video block.
Claim 1
A device for video decoding, comprising:
a processor configured to:
obtain a combined inter merge-intra prediction (CIIP) indication that indicates whether CIIP is applied for a video block;
determine, based on the CIIP indication, that CIIP is applied for the video block;
determine that triangle merge mode is enabled for a picture that comprises the video block;
determine that a condition for disabling triangle merge mode for the video block is satisfied based on the determination that CIIP is applied for the video block;
disable triangle merge mode for the video block; and
decode the picture based on the disablement of triangle merge mode for the video block.
Claim 21
A device for video encoding, comprising:
a processor configured to:
obtain a video block in a picture;
determine that combined inter merge-intra prediction (CIIP) is applied for the video block;
determine that a merge mode is enabled for the picture that comprises the video block, wherein the merge mode allows a triangle partition of the video block to be predicted using a uni-prediction merge candidate associated with the video block;
determine to disable the merge mode for the video block based on determining that CIIP is applied for the video block; and
encode the video block based on disabling the merge mode for the video block.
Claim 5
A device for video encoding, comprising:
a processor configured to:
obtain a video block in a picture;
determine that combined inter merge-intra prediction (CIIP) is applied for the video block;
determine that triangle merge mode is enabled for the picture that comprises the video block;
determine that a condition for disabling triangle merge mode for the video block is satisfied based on the determination that CIIP is applied for the video block;
disable triangle merge mode for the video block; and
encode the picture based on the disablement of triangle merge mode for the video block.
Claim 27
A method for video decoding, comprising:
obtaining a combined inter merge-intra prediction (ClIP) indication that indicates whether ClIP is applied for a video block;
determining, based on the CIIP indication, that CIIP is applied for the video block;
determining that a merge mode is enabled for a picture that comprises the video block, wherein the merge mode allows a triangle partition of the video block to be predicted using a uni- prediction merge candidate associated with the video block;
determining to disable the merge mode for the video block based on determining that CIIP is applied for the video block; and
decoding the video block based on disabling the merge mode for the video block.
Claim 5
A method for video decoding, comprising:
obtaining a combined inter merge-intra prediction (CIIP) indication that indicates whether CIIP is applied for a video block;
determining, based on the CIIP indication, that CIIP is applied for the video block;
determining that triangle merge mode is enabled for a picture that comprises the video block;
determining that a condition for disabling triangle merge mode for the video block is satisfied based on the determination that CIIP is applied for the video block;
disabling triangle merge mode for the video block; and
decoding the picture based on the disablement of triangle merge mode for the video block.
Claim 31
A method for video encoding, comprising:
obtaining a video block in a picture;
determining that combined inter merge-intra prediction (CIIP) is applied for the video block;
determining that a merge mode is enabled for the picture that comprises the video block, wherein the merge mode allows a triangle partition of the video block to be predicted using a uni-prediction merge candidate associated with the video block;
determining to disable the merge mode for the video block based on determining that CIIP is applied for the video block; and
encoding the video block based on disabling the merge mode for the video block.
Claim 13
A method for video encoding, comprising:
obtaining a video block in a picture;
determining that combined inter merge-intra prediction (CIIP) is applied for the video block;
determining that triangle merge mode is enabled for the picture that comprises the video block;
determining that a condition for disabling triangle merge mode for the video block is satisfied based on the determination that CIIP is applied for the video block;
disabling triangle merge mode for the video block; and
encoding the picture based on the disablement of triangle merge mode for the video block.
Table 1.0
The difference between the claims of the instant Application to that of the patent claims is that the claims of the instant Application recite: “wherein the merge mode allows a triangle partition of the video block to be predicted using a uni-prediction merge candidate associated with the video block”
However, this is well-known in the art as evidenced by Li et al. (US 20200177873 A1) (hereinafter Li). Li discloses: wherein the merge mode allows a triangle partition of the video block to be predicted using a uni-prediction merge candidate associated with the video block [See Li, ¶ 0124 discloses FIG. 11 is a schematic illustration of two splitting examples for a current block (1110A or 1110B) according to a triangle prediction unit mode in accordance with one embodiment. In some embodiments according to the triangle prediction unit mode, a current block (1110A or 1110B) can be split into two triangular prediction units. In some examples, each triangular prediction unit in the current block (1110A or 1110B) can be inter-predicted based on respective uni-prediction motion vector and reference frame index.]
It would have been obvious to the person having ordinary skill in the art before the effective filing date of the claimed invention to modify the invention disclosed by Issued U.S. Patent No. 12,219,126 B2 to add the teachings of Li in order to signal a splitting method and provide flags capable of indicating whether a current block is encoded/decoded according to a triangle prediction unit mode.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PATRICK E DEMOSKY whose telephone number is (571)272-8799. The examiner can normally be reached Monday - Friday 7-4 EST.
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/PATRICK E DEMOSKY/ Primary Examiner, Art Unit 2486