Prosecution Insights
Last updated: August 17, 2026
Application No. 18/988,669

DISPLAY DEVICE AND METHOD OF DRIVING THE SAME, AND ELECTRONIC DEVICE

Non-Final OA §103
Filed
Dec 19, 2024
Priority
Apr 08, 2024 — RE 10-2024-0047213
Examiner
AU, SCOTT D
Art Unit
2624
Tech Center
2600 — Communications
Assignee
Samsung Display Co., Ltd.
OA Round
3 (Non-Final)
77%
Grant Probability
Favorable
3-4
OA Rounds
1y 2m
Est. Remaining
88%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allowance Rate
403 granted / 524 resolved
+14.9% vs TC avg
Moderate +11% lift
Without
With
+11.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
14 currently pending
Career history
547
Total Applications
across all art units

Statute-Specific Performance

§101
2.4%
-37.6% vs TC avg
§103
70.0%
+30.0% vs TC avg
§102
16.9%
-23.1% vs TC avg
§112
5.7%
-34.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 524 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 4/27/2026 has been entered. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Komiya et al. (US 2012/0026207 hereinafter Komiya) in view of Xiong et al. ( US 11,308,852 hereinafter Xiong). Referring to claim 19, Komiya discloses a display device (FIG. 1; the organic light emitting display) comprising: a display unit (Fig. 1; 130) partitioned into a plurality of blocks including a plurality of rows and columns of two or more sub-pixels ([0045], Fig. 1; The display unit 130 includes the pixels 140 positioned at the crossing regions of the scan lines S1 to Sn and the data lines D1 to Dm. Thus, each pixel 140 comprises a plurality of sub-pixels), adjacent ones of the blocks being separated by a dividing line where the plurality of rows and columns of the two or more sub-pixels of the adjacent ones of the blocks are located on opposite sides of the dividing line ([0041], Fig. 2, 6A-6D; For example, the panel may be divided into four blocks via lines as illustrated in FIG. 2. A first block 1401 includes a first emission control line E1 to a n/4th emission control line En/4. A second block 1402 includes a (n/4+1)th emission control line En/4+1 to a 2n/4th emission control line E2n/4. A third block 1403 includes a (2n/4+1)th emission control line E2n/4+1 to a (3n/4)th emission control line E3n/4. A fourth block 1404 includes a (3n/4+1)th emission control line E3n/4+1 to an nth emission control line En.), wherein sub-pixels included in different blocks are configured to emit light at different times during one frame period ([0018]; A panel including emission control lines and at least 2 horizontal blocks including pixels for charging voltages according to the data signals when the scan signals are supplied, and for controlling an amount of current supplied to an organic light emitting diode (OLED) when the emission control signals are not supplied, wherein a panel is divided into at least 2 horizontal blocks, and wherein the scan driver is configured to supply the emission control signals at different times to each of the horizontal blocks…, [0045]; The pixels 140 control the amount of current supplied from the first power source ELVDD to the second power source ELVSS via an organic light emitting diode (OLED) according to the data signals in the emission period in one frame. Then, light (e.g., light with a predetermined brightness) is generated by the OLED. Here, during the emission period, the pixels 140 start emission at different times, according to their respective blocks, as illustrated in FIG. 2..., and [0069-0072]; Fig. 6A-6D; each block 1401-1404 emits light at different points in time). However, Komiya does not specifically disclose wherein a first data signal corresponding to an emission time is supplied while sequentially selecting the sub-pixels included in the plurality of blocks, and a second data signal corresponding to a driving current is concurrently supplied to the sub-pixels included in the plurality of blocks. In an analogous art, Xiong discloses wherein a first data signal corresponding to an emission time is supplied while sequentially selecting the sub-pixels included in the plurality of blocks, and a second data signal corresponding to a driving current is concurrently supplied to the sub-pixels included in the plurality of blocks (Col. 14 lines 41-55; It is to be understood that when the pixel driving circuit of each sub-pixel is the pixel driving circuit shown in FIG. 3, the switching transistors M of the pixel driving circuits in each row of sub-pixels can be sequentially controlled to be turned on so that data signals corresponding to the gray scale values of each row of sub-pixels can be sequentially written. While before the data signals are written into all the sub-pixels, during the data signals being written into all the sub-pixels, or after the data signals are written into all the sub-pixels, the first reset signal and/or the second reset signal can be correspondingly written to the anodes of the organic light emitting elements in each sub-display region. In addition, when the structure of the pixel driving circuit is in other forms, the data writing stage and the reset stage of each sub-pixel may also be set according to conditions…. and Col. 14 line 56 to Col. 15 line 4; In an embodiment, when each sub-pixel includes the pixel driving circuit, and the pixel driving circuit at least includes the driving transistor, an initialization stage may further be included before the data writing stage. In the initialization stage, an initialization signal is provided to the gate of the driving transistor of the sub-pixel, to initialize the driving transistor of the sub-pixel and prevent a data signal written in the last driving period of the sub-pixel affecting the data signal written in the next driving period, and enabling the data signal of each sub-pixel to be accurately written to the gate of the driving transistor of the each sub-pixel. In this way, in the light emitting stage, when the driving transistor provides the driving current to the organic light emitting element, the luminous brightness level of the organic light emitting element can be accurately controlled, and improving the display effect of the display panel.). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to apply the technique of Xiong to the system of Komiya in order to allow the method to enable preventing the sub-pixel from getting stolen in a low gray scale. Allowable Subject Matter Claims 1-6, 8-18, and 21 are allowed. The following is a statement of reasons for the indication of allowable subject matter: Claims 1-6, 8-18, and 21 are allowed since certain key features of the claimed invention are not taught or fairly suggested by prior art. Referring to amended claim 1, the prior art of record, however, does not teach, disclose or suggest the claimed limitations of (in combination with all other limitations in the claim), “A display device comprising: sub-pixels including a first circuit unit configured to control a supply period of a driving current correspondingly to a first data signal, and a second circuit unit configured to supply the driving current to a light emitting element correspondingly to a second data signal; and a display unit partitioned into j (j is a natural number of 2 or more) blocks including two or more of the sub-pixels, wherein the sub-pixels included in different blocks are configured to emit light at different times, and wherein the first circuit unit comprises: a first transistor having a gate electrode connected to a first node, a first electrode connected to a second node, and a second electrode connected to a third node; a second transistor connected between a data line and the second node, and having a gate electrode connected to a first scan line; a third transistor connected between the first node and the third node and having a gate electrode connected to the first scan line; a fourth transistor connected between the first node and a fourth power line, and having a gate electrode connected to a first initialization line; a fifth transistor connected between a first power line and the second node, and having a gate electrode connected to an emission control line; a sixth transistor connected between the third node and a fourth node, and having a gate electrode connected to the emission control line; and a first capacitor connected between a sweep line and the first node.”. Referring to claims 2-6 and 8-18 are allowable based upon dependent on the independent claim 1. Referring to amended claim 20, the prior art of record, however, does not teach, disclose or suggest the claimed limitations of (in combination with all other limitations in the claim), “A method of driving a display device, the method comprising: initializing sub-pixels included in a first block and a second block, each of the first block and the second block including a plurality of rows and columns of the sub-pixels, adjacent ones of the blocks being separated by a dividing line where the plurality of rows and columns of the two or more sub-pixels of the adjacent ones of the blocks are located on opposite sides of the dividing line; supplying a first data signal corresponding to an emission time to control an emission period of the sub-pixels while sequentially selecting the sub-pixels included in the first block and the second block; simultaneously supplying a second data signal corresponding to a driving current to control a magnitude of current supplied to light emitting elements of the sub-pixels to the sub-pixels included in the first block and the second block; emitting light by the sub-pixels included in the first block during a first period of one frame period; and emitting light by the sub-pixels included in the second block during a second period that does not overlap the first period of the one frame period.”. Referring to independent claim 21, the claim is allowed for same reason as set forth in the independent claim 1. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SCOTT D AU whose telephone number is (571)272-5948. The examiner can normally be reached M-F. General 8am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Eason can be reached at 571-270-7230. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SCOTT D AU/Examiner, Art Unit 2624
Read full office action

Prosecution Timeline

Dec 19, 2024
Application Filed
Oct 22, 2025
Non-Final Rejection mailed — §103
Jan 22, 2026
Response Filed
Feb 26, 2026
Final Rejection mailed — §103
Apr 27, 2026
Response after Non-Final Action
May 20, 2026
Request for Continued Examination
May 22, 2026
Response after Non-Final Action
Jun 02, 2026
Non-Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
77%
Grant Probability
88%
With Interview (+11.1%)
2y 10m (~1y 2m remaining)
Median Time to Grant
High
PTA Risk
Based on 524 resolved cases by this examiner. Grant probability derived from career allowance rate.

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