DETAILED ACTION
Notice of AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-20 are pending in the application.
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file (KR10-2024-0075303 Republic of Korea 06/10/2024).
Information Disclosure Statement
The information Disclosure Statement (IDS) Form PTO-1449, filed 12/20/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosed therein was considered by the examiner.
Drawings
The drawings submitted on 12/20/2024. These drawings are review and accepted by the examiner.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f):
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f). The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f). The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f), except as otherwise indicated in an Office action.
This application includes one or more claim limitations that use recite functional language but are not interpreted under 35 U.S.C. 112(f). Such claim limitation(s) is/are:
Apparatus claims 1-12’s “row hammering protector”, “processing circuitry” that is “configured to” perform recited operations;
Apparatus claims 13-20’s “row hammering protector”, “processing circuitry” that is “configured to” perform recited operations.
Because these claim limitation(s) are not being interpreted under 35 U.S.C. 112(f), they are not being interpreted to cover only the corresponding structure, material, or acts described in the specification as performing the claimed function, and equivalents thereof.
If applicant intends to have this/these limitation(s) interpreted under 35 U.S.C. 112(f), applicant may: (1) amend the claim limitation(s) to remove the structure, materials, or acts that performs the claimed function; or (2) present a sufficient showing that the claim limitation(s) does/do not recite sufficient structure, materials, or acts to perform the claimed function.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-20 are rejected under both 35 U.S.C. 102(a)(1) as being anticipated by NALE (US 2019/0066759 A1 hereinafter “Nale”).
Per MPEP 2111 and 2111.01, the claims are given their broadest reasonable interpretation and the words of the claims are given their plain meaning consistent with the specification without importing claim limitations from the specification.
Regarding Independent Claim 1, Nale, for example in Figs. 1-11, discloses a memory device (e.g., memory device 120/430/940/1030; in Figs. 1, 4, 9-10 related in Figs. 2-3, 5-8, 11), comprising:
a memory cell array (e.g., memory array 130; in Figs. 1, 4, 9-10 related in Figs. 2-3, 5-8, 11) connected to a plurality of wordlines (e.g., rows of memory cells; in Figs. 1, 4, 9-10 related in Figs. 2-3, 5-8, 11); and
a row hammering protector (i.e., RH logic 164; in Figs. 1, 3-4, 9-10 related in Figs. 2, 5-8, 11) including processing circuitry (e.g., 1036; in Figs. 1, 4, 9-10 related in Figs. 2-3, 5-8, 11) configured to probabilistically perform (implied that is to be probabilistic or heuristic operation; in Figs. 1-4, 9-10 related in Figs. 5-8, 11; see paragraph [0019+]), based on an adjacent wordline activation count with respect to each of the plurality of wordlines (e.g., the refresh counter to perform refresh of vitim rows; in Figs. 1, 4, 9-10 related in Figs. 2-3, 5-8, 11; see paragraph [0068+]) during a first bank refresh period (e.g., BANK 140/BANK 150; in Figs. 1-2, 6-7 related in Figs. 3-5, 8-11), an additional refresh operation (via RH COUNTER 124, OPTIONAL ADDR; in Figs. 1-2, 6-7 related in Figs. 3-5, 8-11) with respect to each of the plurality of wordlines within a second bank (e.g., BANK 140/BANK 150; in Figs. 1-2, 6-7 related in Figs. 3-5, 8-11) refresh period after the first bank refresh period (see for example in Figs. 1-2, 6-7 related in Figs. 3-5, 8-11).
The structure in of the prior art (Nale) is substantially identical to the structure of the claims. MPEP 2112.01(I). The manner of operation does not distinguish this apparatus claim from the prior art apparatus. MPEP 2114(II).
Regarding claim 2, Nale, for example in Figs. 1-11, discloses wherein the row hammering protector comprises: a probability memory configured to store a global probability table (via COMMAND TABLE; in Figs. 6-7 related in Figs. 1-5, 8-11), the global probability table including a plurality of probabilities corresponding to a plurality of count ranges (see for example in Figs. 1, 4, 9-10 related in Figs. 2-3, 5-8, 11; see paragraph [0019+], as discussed above), respectively; and a first row hammering protection circuit configured to issue a first row refresh command with respect to a first wordline, of the plurality of wordlines, within the second bank refresh period, based on the global probability table and a first number of times wordlines adjacent to the first wordline are activated during the first bank refresh period (see for example in Figs. 1, 4, 9-10 related in Figs. 2-3, 5-8, 11; see paragraph [0019+], as discussed above). Also, the structure in of the prior art (Nale) is substantially identical to the structure of the claims. MPEP 2112.01(I). The manner of operation does not distinguish this apparatus claim from the prior art apparatus. MPEP 2114(II).
Regarding claim 3, Nale, for example in Figs. 1-11, discloses wherein the row hammering protector further comprises: a second row hammering protection circuit configured to probabilistically issue a second row refresh command with respect to a second wordline, of the plurality of wordlines (e.g., RH LOGIC 330; in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above), within the second bank refresh period, based on the global probability table (see for example in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above) and a second number of times wordlines adjacent to the second wordline are activated during the first bank refresh period (see for example in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above). Also, the structure in of the prior art (Nale) is substantially identical to the structure of the claims. MPEP 2112.01(I). The manner of operation does not distinguish this apparatus claim from the prior art apparatus. MPEP 2114(II).
Regarding claim 4, Nale, for example in Figs. 1-11, discloses wherein, the first row hammering protection circuit is further configured to: identify a first probability corresponding to a count range, among the plurality of count ranges, including a first count value, the first count value corresponding with the first number (e.g., probability or heuristic operation; see for example in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above); and issue the first row refresh command within the second bank refresh period according to the first probability (via COMMAND LOGIC; in Figs. 1, 4, 9 related in Figs. 2-3, 5-8, 10-11), and the second row hammering protection circuit is further configured to: identify a second probability corresponding to a count range, among the plurality of count ranges, including a second count value, the second count value corresponding with the second number (e.g., probability or heuristic operation; see for example in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above); and issue the second row refresh command within the second bank refresh period according to the second probability (see for example in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above). Also, the structure in of the prior art (Nale) is substantially identical to the structure of the claims. MPEP 2112.01(I). The manner of operation does not distinguish this apparatus claim from the prior art apparatus. MPEP 2114(II).
Regarding claim 5, Nale, for example in Figs. 1-11, discloses wherein: the first row refresh command comprises a first activation command for the first wordline, and a first precharge command for the memory cell array (see for example in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above); and the second row refresh command comprises a second activation command for the second wordline, and a second precharge command for the memory cell array (see for example in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above). Also, the structure in of the prior art (Nale) is substantially identical to the structure of the claims. MPEP 2112.01(I). The manner of operation does not distinguish this apparatus claim from the prior art apparatus. MPEP 2114(II).
Regarding claim 6, Nale, for example in Figs. 1-11, discloses wherein: the first row hammering protection circuit is further configured to store a first local probability table corresponding to a first portion of the global probability table, and determine the first probability based on a count range corresponding to the first count value among count ranges included in the first local probability table (see for example in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above); and the second row hammering protection circuit is further configured to store a second local probability table corresponding to a second portion of the global probability table, and determine the second probability based on a count range corresponding to the second count value among count ranges included in the second local probability table (see for example in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above). Also, the structure in of the prior art (Nale) is substantially identical to the structure of the claims. MPEP 2112.01(I). The manner of operation does not distinguish this apparatus claim from the prior art apparatus. MPEP 2114(II).
Regarding claim 7, Nale, for example in Figs. 1-11, discloses wherein: the first row hammering protection circuit is further configured to dynamically adjust each of the count ranges included in the first local probability table based on the first count value (see for example in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above); and the second row hammering protection circuit is further configured to dynamically adjust each of the count ranges included in the second local probability table based on the second count value (see for example in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above). Also, the structure in of the prior art (Nale) is substantially identical to the structure of the claims. MPEP 2112.01(I). The manner of operation does not distinguish this apparatus claim from the prior art apparatus. MPEP 2114(II).
Regarding claim 8, Nale, for example in Figs. 1-11, discloses wherein: the first row hammering protection circuit is further configured to update the first local probability table based on a third portion of the global probability table in response to the first count value being out of the count ranges included in the first local probability table (see for example in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above); and the second row hammering protection circuit is further configured to update the second local probability table based on a fourth portion of the global probability table in response to the second count value being out of the count ranges included in the second local probability table (see for example in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above). Also, the structure in of the prior art (Nale) is substantially identical to the structure of the claims. MPEP 2112.01(I). The manner of operation does not distinguish this apparatus claim from the prior art apparatus. MPEP 2114(II).
Regarding claim 9, Nale, for example in Figs. 1-11, discloses wherein: the plurality of count ranges comprises a first plurality of count ranges and a second plurality of count ranges higher than the first plurality of count ranges (see for example in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above); the plurality of probabilities comprises a first plurality of probabilities corresponding to the first plurality of count ranges and a second plurality of probabilities corresponding to the second plurality of count ranges (see for example in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above); upper limit values of the first plurality of count ranges are a first plurality of upper limit values, respectively (see for example in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above); upper limit values of the second plurality of count ranges are a second plurality of upper limit values, respectively (see for example in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above); and a first ratio of a second value to a first value is greater than a second ratio of a fourth value to a third value, wherein the second value corresponds with a difference between a greatest probability of the first plurality of probabilities and a smallest probability of the first plurality of probabilities (see for example in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above), the first value corresponds with a difference between a greatest upper limit value of the first plurality of upper limit values and a smallest upper limit value of the first plurality of upper limit values (see for example in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above), the fourth value corresponds with a difference between a greatest probability of the second plurality of probabilities and a smallest probability of the second plurality of probabilities (see for example in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above), and the third value corresponds with a difference between a greatest upper limit value of the second plurality of upper limit values and a smallest upper limit value of the second plurality of upper limit values (see for example in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above). Also, the structure in of the prior art (Nale) is substantially identical to the structure of the claims. MPEP 2112.01(I). The manner of operation does not distinguish this apparatus claim from the prior art apparatus. MPEP 2114(II).
Regarding claim 10, Nale, for example in Figs. 1-11, discloses wherein: the first plurality of probabilities is logarithmic with respect to the first plurality of upper limit values (see for example in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above); and the second plurality of probabilities is linear with respect to the second plurality of upper limit values (see for example in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above). Also, the structure in of the prior art (Nale) is substantially identical to the structure of the claims. MPEP 2112.01(I). The manner of operation does not distinguish this apparatus claim from the prior art apparatus. MPEP 2114(II).
Regarding claim 11, Nale, for example in Figs. 1-11, discloses wherein sizes of the first plurality of count ranges are smaller than or equal to sizes of the second plurality of count ranges (see for example in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above). Also, the structure in of the prior art (Nale) is substantially identical to the structure of the claims. MPEP 2112.01(I). The manner of operation does not distinguish this apparatus claim from the prior art apparatus. MPEP 2114(II).
Regarding claim 12, Nale, for example in Figs. 1-11, discloses wherein a size of a first count range, of the first plurality of count ranges, is smaller than or equal to a size of a second count range among the first plurality of count ranges (see for example in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above). Also, the structure in of the prior art (Nale) is substantially identical to the structure of the claims. MPEP 2112.01(I). The manner of operation does not distinguish this apparatus claim from the prior art apparatus. MPEP 2114(II).
Regarding Independent Claim 13, Nale, for example in Figs. 1-11, discloses a memory device (e.g., memory device 120/430/940/1030; in Figs. 1, 4, 9-10 related in Figs. 2-3, 5-8, 11) configured to operate in response to control from an external device (e.g., device 110/410/920; in Figs. 1, 4, 9 related in Figs. 2-3, 5-7, 10-11), the memory device comprising:
a memory cell array (e.g., memory array 130; in Figs. 1, 4, 9-10 related in Figs. 2-3, 5-8, 11) connected to a plurality of wordlines (e.g., rows of memory cells; in Figs. 1, 4, 9-10 related in Figs. 2-3, 5-8, 11); and
processing circuitry (e.g., 1036; in Figs. 1, 4, 9-10 related in Figs. 2-3, 5-8, 11) configured to
generate a first count value by counting the number of times of an activation command for second and third wordlines adjacent to a first wordline among the plurality of wordlines is received from the external device (via counter; in Figs. 1, 4, 9 related in Figs. 2-3, 5-7, 10-11), between a first time point at which a first bank refresh command (e.g., BANK 140 / BANK 150 via COMMAND LOGIC 112; in Figs. 1, 4, 9-10 related in Figs. 2-3, 5-8, 11) is received from the external device (see for example in Figs. 1, 4, 9 related in Figs. 2-3, 5-7, 10-11, as discussed above) and a second time point at which a second bank refresh command (e.g., BANK 150 / BANK 140 via COMMAND LOGIC 112; in Figs. 1, 4, 9-10 related in Figs. 2-3, 5-8, 11) is received from the external device (see for example in Figs. 1, 4, 9 related in Figs. 2-3, 5-7, 10-11, as discussed above);
determine a first probability corresponding to the first count value (e.g., probability or heuristic operation; in Figs. 1-4, 6-7 related in Figs. 5, 8-11 see paragraph [0003], [0019], [0029+]); and
issue a first row refresh command for the first wordline according to the first probability, at a fourth time point between the second time point and a third time point at which a third bank refresh command is received from the external device (e.g., BANK via COMMAND LOGIC; in Fig. 9-10).
The structure in of the prior art (Nale) is substantially identical to the structure of the claims. MPEP 2112.01(I). The manner of operation does not distinguish this apparatus claim from the prior art apparatus. MPEP 2114(II).
Regarding claim 14, Nale, for example in Figs. 1-11, discloses wherein: the memory device further comprises a probability memory (e.g., probability or heuristic operation; see for example in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above) configured to store a global probability table (via COMMAND TABLE; in Figs. 6-7 related in Figs. 1-5, 8-11) comprising a plurality of probabilities corresponding to a plurality of count ranges, respectively (see for example in Figs. 1, 4, 9-10 related in Figs. 2-3, 5-8, 11; see paragraph [0019+], as discussed above); and the processing circuitry is further configured to determine the first probability based on a count range corresponding to the first count value among the plurality of count ranges (see for example in Figs. 1, 4, 9-10 related in Figs. 2-3, 5-8, 11; as discussed above). Also, the structure in of the prior art (Nale) is substantially identical to the structure of the claims. MPEP 2112.01(I). The manner of operation does not distinguish this apparatus claim from the prior art apparatus. MPEP 2114(II).
Regarding claim 15, Nale, for example in Figs. 1-11, discloses wherein a time interval between the second time point and the fourth time point is a first time length (see for example in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above). Also, the structure in of the prior art (Nale) is substantially identical to the structure of the claims. MPEP 2112.01(I). The manner of operation does not distinguish this apparatus claim from the prior art apparatus. MPEP 2114(II).
Regarding claim 16, Nale, for example in Figs. 1-11, discloses wherein the processing circuitry is further configured to issue a second row refresh command for the first wordline at a fifth time point according to a second probability determined based on the first probability, in response to the fifth time point, after the first time length has elapsed from the fourth time point, being ahead of the third time point (see for example in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above). Also, the structure in of the prior art (Nale) is substantially identical to the structure of the claims. MPEP 2112.01(I). The manner of operation does not distinguish this apparatus claim from the prior art apparatus. MPEP 2114(II).
Regarding claim 17, Nale, for example in Figs. 1-11, discloses wherein the second probability is higher than or equal to the first probability (see for example in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above). Also, the structure in of the prior art (Nale) is substantially identical to the structure of the claims. MPEP 2112.01(I). The manner of operation does not distinguish this apparatus claim from the prior art apparatus. MPEP 2114(II).
Regarding claim18, Nale, for example in Figs. 1-11, discloses wherein the first row refresh command comprises an activation command for the first wordline, and a precharge command for the memory cell array (see for example in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above). Also, the structure in of the prior art (Nale) is substantially identical to the structure of the claims. MPEP 2112.01(I). The manner of operation does not distinguish this apparatus claim from the prior art apparatus. MPEP 2114(II).
Regarding claim 19, Nale, for example in Figs. 1-11, discloses wherein the processing circuitry is further configured to generate a first additional refresh command comprising a target row refresh (TRR) mode enter command and the first row refresh command (see for example in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above). Also, the structure in of the prior art (Nale) is substantially identical to the structure of the claims. MPEP 2112.01(I). The manner of operation does not distinguish this apparatus claim from the prior art apparatus. MPEP 2114(II).
Regarding Independent Claim 20, Nale, for example in Figs. 1-11, discloses a memory device (e.g., memory device 120/430/940/1030; in Figs. 1, 4, 9-10 related in Figs. 2-3, 5-8, 11) configured to receive first and second bank (e.g., BANK 140 / BANK 150; in Figs. 1, 4, 9 related in Figs. 2-3, 5-8, 10-11) refresh commands from an external device (e.g., device 110/410/920; in Figs. 1, 4, 9 related in Figs. 2-3, 5-7, 10-11) at first and second time points, respectively (see for example in Figs. 1-3, 6-7 related in Figs. 4-5, 8-11, as discussed above), the memory device comprising:
a memory cell array (e.g., memory array 130; in Fig. 1 related in Figs. 2-11) connected to first and second aggressor wordlines (e.g., rows of memory cells; in Figs. 1, 4, 9-10 related in Figs. 2-3, 5-8, 11), and a victim wordline (e.g., VICTIM ROW 148; in Fig. 1 related in Figs. 2-11) located between the first and second aggressor wordlines (e.g., TARGET ROW 142 and 146; in Fig. 1 related in Figs. 2-11); and
processing circuitry configured to probabilistically issue, based on a number of times of activation commands for the first and second aggressor wordlines are received between the first and the second time points (e.g., 1036; in Figs. 1, 4, 9-10 related in Figs. 2-3, 5-8, 11), a row refresh command (via COMMAND LOGIC; in Fig. 9 related in Figs. 1-8, 10-11) for the victim wordline at each time interval from the second time point until a third bank refresh command is received (e.g., BANK; in Fig. 9 related in Figs. 1-8, 10-11).
The structure in of the prior art (Nale) is substantially identical to the structure of the claims. MPEP 2112.01(I). The manner of operation does not distinguish this apparatus claim from the prior art apparatus. MPEP 2114(II).
Applicant are reminded that when presenting amendments to claims. In order to be fully responsive, an attempt should be made to point out the patentable novelty (see MPEP 714.04). Additionally, Applicant should point out where and/or how the originally filed disclosure supports the amendment(s) (see MPEP 2163 (II)(A)).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to THA-O H BUI whose telephone number is (571)270-7357. The examiner can normally be reached M-F 7:00AM - 3:00PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, ALEXANDER SOFOCLEOUS can be reached at 571-272-0635. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/THA-O H BUI/Primary Examiner, Art Unit 2825 07/08/2026