DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This office action is in response to the communication filed on 03/30/2026. Claims 1-24 remain pending.
Response to Arguments
Applicant's arguments filed 03/30/2026 have been fully considered but they are not persuasive.
In the remarks, Applicants made four arguments.
a) The first argument: Applicant submits that the cited references, alone or in combination, fails to teach or suggest at least the features “a first capacitor connected between the first node and the third node; and a second capacitor connected between the second node and the third node, wherein the first capacitor and the second capacitor are formed as different types of capacitors,” as recited in claim 1.
This argument is not persuasive. Please see rejection below for details.
b) The second argument: First, nowhere does Feng teach or suggest any of the transistor T5, the transistor T3, or the transistor T8 as including a first electrode connected to node N2 (alleged “first node”) and a second electrode connected to a scan signal line Ga (alleged “second node”). That is, Feng fails to teach or suggest “a first transistor comprising a first electrode connected to a first node, a second electrode connected to a second node, and a gate electrode connected to a third node,” as recited in claim 1.
This argument is not persuasive. As this is a 103 rejection, even Feng does not disclose Applicants’ allegation, but Meng clearly teach that first transistor T3 comprising a first electrode connected to a first node N3, a second electrode connected to a second node N2, and a gate electrode connected to a third node N1 (see figures 6B/7A and the depictions associated with figure 6B and section [0103]; i.e., the control electrode of the transistor T3 is the gate electrode connected to the third node N1, the second electrode of the transistor T3 is the second electrode connected to second node N2, the collector electrode of transistor T3 being connected to first node N3). Therefore, Meng in view of Feng clearly disclose the claimed invention.
C) The third argument: Indeed, turning to the second capacitor Cst2, the scan signal line Ga (alleged “second node”), and node N1 (alleged “third node”) of Feng, Feng fails to teach or suggest that Ga (alleged “second node”) is connected to an electrode of any of the transistor T5, the transistor T3, or the transistor T8.
This argument is not persuasive. Why would Feng need to teach or suggest any feature of limitation about transistors T5/T3/T8? Are transistors T5/T3/T8 specifically claimed or defined in the claims 1/14/24 at all?
d) The fourth argument: The Office Action broadly interprets the feature “different types of capacitors” recited in claim 1 by arguing that the capacitor Cst1 of Feng is a storage capacitor and the capacitor Cst2 of Feng is a parasitic capacitor, and thus asserts that they are different types.
This argument is not persuasive. If not different types of capacitors, are Applicants concluding that storage capacitor Cst1 and parasitic capacitor Cst2 are the same type of capacitors?
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3-9, 11-14, 16-24 are rejected under 35 U.S.C. 103 as being unpatentable over Meng et al (US 2025/0095524), hereinafter as Meng, in view of Feng et al (US 2024/0169911), hereinafter as Feng.
RE claims 1, 14 and 24, Meng discloses the invention substantially as claimed.
Meng discloses that an electronic device (see figure 1 and sections [0071], [0072]; i.e., display apparatus 1000 may be any product having a display function, such as a mobile phone, a tablet computer, etc.), comprising: a processor to provide input image data (see figure 3 and sections [0073], [0077]; i.e., processor 130 to provide input image data); a display device to display an image based on the input image data (see figures 1/2/3 and sections [0080], [0081]; i.e., display panel 110 has a display area A for displaying images based on the input image data provided by processor 130); and wherein the display device (see figures 1/2/3 and sections [0080], [0081]; i.e., the display panel 110) comprising: sub-pixels connected to gate lines, light emitting control lines, and data lines (see figures 3/5 and sections [0081], [0105], [0106], [0113], [0114], [0116]; i.e., sub-pixels P connected to gate lines GL, data lines SL, light-emitting control lines G1/G2 of pixel circuit 40); a gate driver driving the gate lines and the light emitting control lines (see figure 5 and sections [0105], [0106], [0116]; i.e., gate driver 140 for driving the gate lines GL and the light emitting control lines G1/G2 of pixel circuit 40 to drive each light emitting device 30 to emit light); and a data driver driving the data lines (see figure 5 and sections [0105], [0106]; i.e., data driver 150 for driving the data lines SL), wherein a sub-pixel of the sub-pixels (see figure 6B and section [0088]; i.e., sub-pixel P) includes: a first transistor comprising a first electrode connected to a first node, a second electrode connected to a second node, and a gate electrode connected to a third node (see figure 6B and its associated depictions; i.e., transistor T3 comprising its electrodes respectively connected to various nodes N1/N2/N3, with its gate electrode connected to node N1); a second transistor that is connected between a data line, which is one of the data lines, and the third node, wherein a gate electrode of the second transistor is connected to a first sub-gate line, which is one of the gate lines (see figure 6B and its associated depictions; i.e., transistor T1 connected between data line DL and node N1, gate electrode of T1 is connected to first sub-gate line GL1.1, which is one of the gate lines GL, namely, GL1.1/GL1.3/GL2.1/GL2.3).
However, Meng does not specifically disclose that a first capacitor connected between the first node and the third node; and a second capacitor connected between the second node and the third node, and the first capacitor and the second capacitor are formed as different types of capacitors.
Feng teaches that a display substrate 100 comprising of sub-pixels 12, wherein each sub-pixel 12 including a pixel circuit 120 and a light-emitting element 121 (see figure 1 and sections [0048], [0051]), with each pixel circuit 120 including first capacitor Cst1 connected between nodes N1/N2 and second capacitor Cst2 connected between nodes N1/Ga (see figure 2A and sections [0065], [0067]), as well as that the first capacitor being a storage capacitor Cst1 and the second capacitor Cst2 being a parasitic capacitor Cst2, both formed differently from each other (see sections [0065], [0067]). The motivation of Feng is to form a high-resolution display device with high display quality (see section [0002]).
Meng and Feng are combinable because they are from the same field of endeavor. It would have been obvious to one having ordinary skill in the art before the effective filing date of claimed invention to modify Meng by including the teaching from Feng in order to form a high-resolution display device with high display quality.
RE claims 3 and 16, Meng in view of Feng disclose the invention substantially as claimed.
However, Meng in view of Feng do not specifically disclose that the first capacitor has a higher capacity than the second capacitor.
The use of mathematical formula or ranges (i.e., the first capacitor has a higher capacity than the second capacitor) are akin to optimizing the values of a result effective variable. Therefore, determining the optimal value of a result effective variable would have been obvious and ordinarily within the skill of the art. In re Boesch, 617 F.2d 272, 276, 205 USPQ 215, 219 (CCPA 1980).
RE claims 4 and 17, Meng in view of Feng disclose the invention substantially as claimed.
However, Meng in view of Feng do not specifically disclose that the first capacitor is formed on the same layer as the first transistor, and the second capacitor is formed on a different layer from the first transistor.
Yet a circuit can have various forms of structures/wirings/connections as long as it producing the same output/result, i.e., a particular placement of a contact/structure/wiring in a conductivity measuring device was held to be an obvious matter of design choice, no patentable significance unless a new and unexpected result is produced. See In re Kuhle, 526 F.2d 553, 188 USPQ 7 (CCPA 1975).
RE claims 5 and 18, Meng in view of Feng disclose the invention substantially as claimed.
However, Meng in view of Feng do not specifically disclose that the second capacitor comprises a first electrode and a second electrode, and the first electrode is formed on the same layer as the second electrode.
A circuit can have various forms of structures/wirings/connections as long as it producing the same output/result, i.e., a particular placement of a contact/structure/wiring in a conductivity measuring device was held to be an obvious matter of design choice, no patentable significance unless a new and unexpected result is produced. See In re Kuhle, 526 F.2d 553, 188 USPQ 7 (CCPA 1975).
RE claims 6 and 19, Meng in view of Feng disclose the invention substantially as claimed.
However, Meng in view of Feng do not specifically disclose that a mounting area of the first capacitor is larger than a mounting area of the first transistor or a mounting area of the second transistor.
A circuit can have various forms of structures/wirings/connections as long as it producing the same output/result, i.e., a particular placement of a contact/structure/wiring in a conductivity measuring device was held to be an obvious matter of design choice, no patentable significance unless a new and unexpected result is produced. See In re Kuhle, 526 F.2d 553, 188 USPQ 7 (CCPA 1975).
RE claims 7 and 20, Meng in view of Feng disclose that wherein the sub-pixel (see Feng, figures 1/2A and its associated depictions; i.e., sub-pixel 12 comprising of pixel circuit 120) further comprises: a third transistor that is connected between a first power voltage node to which a first power voltage is inputted and the first node, wherein a gate electrode of the third transistor is connected to one of the light emitting control lines (see Feng, figure 2A and its associated depictions; i.e., transistor T5 is connected between a first power voltage VDD and node N2, wherein gate electrode of the transistor T5 is connected to the light emitting control lines EM1); a light emitting element connected between a second power voltage node to which a second power voltage is inputted and the second node (see Feng, figure 2A and its associated depictions; i.e., light emitting element 121 connected between a second power voltage VSS and node N4); and a fourth transistor that is connected between the second node and an initialization voltage node to which an initialization voltage is supplied, wherein a gate electrode of the fourth transistor is connected to a second sub-gate line that is one of the gate lines (see Feng, figure 2A and its associated depictions; i.e., transistor T7 is connected between the node N4 and an initialization voltage node Vint2 to which an initialization voltage is supplied, wherein gate electrode of the transistor T7 is connected to a second sub-gate line Re2 that is one of the gate lines).
RE claims 8 and 21, Meng in view of Feng disclose that the initialization voltage node is electrically connected to the second power voltage node VSS (see Feng, figure 2A and its associated depictions).
However, Meng in view of Feng do not disclose that the initialization voltage is the same as the second power voltage.
The use of mathematical formula or ranges (i.e., the initialization voltage is the same as the second power voltage) are akin to optimizing the values of a result effective variable. Therefore, determining the optimal value of a result effective variable would have been obvious and ordinarily within the skill of the art. In re Boesch, 617 F.2d 272, 276, 205 USPQ 215, 219 (CCPA 1980).
RE claim 9, Meng in view of Feng disclose that the initialization voltage is set such that the light emitting element is turned off when the initialization voltage is supplied to the second node (see Feng, sections [0062], [0089]).
RE claims 11 and 22, Meng in view of Feng disclose that the first power voltage is inputted to the body electrodes of the first transistor, the second transistor, the third transistor, and the fourth transistor (see Meng, figure 6B; i.e., power voltage VDD, transistors T1/T2/T3/T4; and Feng, figure 2A; power voltage VDD, transistors T1/T2/T3/T4).
RE claim 12, Meng in view of Feng disclose that wherein the sub-pixel is driven in a first period, a second period, and a third period, the second transistor is turned on during the first period and the second period, the fourth transistor is turned on during the first period to the third period, and the third transistor is turned off during the second period (see Meng, section [0176], and Feng, sections [0089], [0090], [0091]).
RE claim 13, Meng in view of Feng disclose that a data signal is supplied to the data line during at least a portion of the second period (see Meng, section [0176], and Feng, section [0093]).
RE claim 23, Meng in view of Feng disclose that wherein the sub-pixel is driven in a first period, a second period, and a third period, the gate driver supplies a first scan signal to the first sub-gate line such that the second transistor is turned on during the first period and the second period, the gate driver supplies a second scan signal to the second sub-gate line such that the fourth transistor is turned on during the first period to the third period, the gate driver supplies a light emitting control signal to the light emitting control line such that the third transistor is turned off during the second period, and the data driver supplies a data signal to the data line during at least a portion of the second period (see Meng, section [0176], and Feng, sections [0089], [0090], [0091], [0093]).
Claims 2, 15 are rejected under 35 U.S.C. 103 as being unpatentable over Meng et al (US 2025/0095524), hereinafter as Meng, in view of Feng et al (US 2024/0169911), hereinafter as Feng, and further in view of Robin et al (US 2021/0366979), hereinafter as Robin, and Cong et al (US 2024/0284711), hereinafter as Cong.
RE claims 2 and 15, Meng in view of Feng disclose the invention substantially as claimed.
However, Meng in view of Feng do not specifically disclose that the first capacitor is a metal-oxide-semiconductor (MOS) capacitor, and the second capacitor is a metal-oxide-metal (MOM) capacitor.
From the same field of endeavor, Robin teaches that in general, each sub-pixel is constituted by a set composed by one or several light-emitting diode(s), an optoelectronic device thus comprising a plurality of such sets of light-emitting diodes for constituting the different sub-pixels (see section [0007]), further that, an electronic component being selected from a group comprising of a metal-oxide-semiconductor capacitor, a metal-insulator-metal capacitor (see sections [0039], [0139]). The motivation of Robin is to regulate the emission of each sub-pixel of each image pixel as well as protecting the light-emitting diodes of sub-pixels against electrostatic discharges and detecting the temperatures of the light-emitting diodes (see section [0011]).
Meng, Feng and Robin are combinable because they are from the same field of endeavor. It would have been obvious to one having ordinary skill in the art before the effective filing date of claimed invention to modify Meng in view of Feng by including the teaching from Robin in order to regulate the emission of each sub-pixel of each image pixel as well as protecting the light-emitting diodes of sub-pixels against electrostatic discharges and detecting the temperatures of the light-emitting diodes.
Furthermore, Meng in view of Feng and Robin do not specifically disclose that a capacitor is a metal-oxide-metal capacitor.
Cong teaches that a display substrate including a plurality of sub-pixels, wherein at least one sub-pixel including a pixel driving circuit, a plurality of transistors and a storage capacitor of a metal-oxide-metal structure (see section [0005]). The motivation of Cong is to reduce system volume and achieving light weight (see section [0003]).
Meng, Feng, Robin and Cong are combinable because they are from the same field of endeavor. It would have obvious to one having ordinary skill in the art before the effective filing date of claimed invention to modify Meng in view of Feng and Robin by including the teaching from Cong in order to reduce system volume and achieving light weight.
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Meng et al (US 2025/0095524), hereinafter as Meng, in view of Feng et al (US 2024/0169911), hereinafter as Feng, and further in view of Zhu et al (US 2022/0344425), hereinafter as Zhu.
RE claim 10, Meng in view of Feng disclose the invention substantially as claimed.
However, Meng in view of Feng do not specifically disclose that each of the first transistor, the second transistor, the third transistor, and the fourth transistor is a metal-oxide-semiconductor field-effect transistor (MOSFET) including a body electrode.
From the same field of endeavor, Zhu teaches that a display panel includes sub-pixel comprising pixel circuit with transistors and light-emitting element, wherein the transistors can be metal-oxide-semiconductor field effect transistors with its electrodes (see sections [0005], [0088], [0091]). The motivation of Zhu is to provide displays having excellent display characteristics, such as high resolution, high brightness, rich colors, low driving voltage, fast response and low power consumption (see section [004]).
Meng, Feng and Zhu are combinable because they are from the same field of endeavor. It would have been obvious to one having ordinary skill in the art before the effective filing date of claimed invention to modify Meng in view of Feng by including the teaching from Zhu in order to provide displays having excellent display characteristics, such as high resolution, high brightness, rich colors, low driving voltage, fast response and low power consumption.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication from the examiner should be directed to FRED TZENG whose telephone number is 571-272-7565. The examiner can normally be reached on weekdays from 2:0 pm to 10:00 pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Boddie can be reached on 571-272-0666. The fax phone numbers for the organization where this application or proceeding is assigned are 571-273-8300 for regular communications and 571-273-7565 for After Final communications.
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/FRED TZENG/ Primary Examiner, Art Unit 2625
FFT
June 12, 2026
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