Prosecution Insights
Last updated: October 02, 2026
Application No. 18/994,496

PLASMA DETECTION IN SEMICONDUCTOR FABRICATION APPARATUSES

Non-Final OA §103
Filed
Jan 14, 2025
Priority
Jul 15, 2022 — provisional 63/368,613 +1 more
Examiner
KIM, SEOKJIN
Art Unit
2845
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Lam Research Corporation
OA Round
1 (Non-Final)
78%
Grant Probability
Favorable
1-2
OA Rounds
6m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 78% — above average
78%
Career Allowance Rate
439 granted / 562 resolved
+10.1% vs TC avg
Moderate +14% lift
Without
With
+13.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
20 currently pending
Career history
588
Total Applications
across all art units

Statute-Specific Performance

§101
2.3%
-37.7% vs TC avg
§103
48.8%
+8.8% vs TC avg
§102
28.0%
-12.0% vs TC avg
§112
16.3%
-23.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 562 resolved cases

Office Action

§103
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Information Disclosure Statement The information disclosure statement (IDS) submitted on 07/01/2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 2, 4, 6-12, 14, and 16-20 are rejected under 35 U.S.C. 103 as being unpatentable over Bhutta (US 2021/0305018 A1) in view of Voronin (US 2016/0372933 A1). Regarding claim 1, Bhutta teaches a method of detecting plasma in semiconductor fabrication apparatuses, the method comprising: obtaining data from one or more sensors (Fig. 2, Sensors 21, 49, [0062] RF input sensor 21), wherein the data characterizes a radio frequency (RF) power ([0051] RF input sensor 21, output sensor 49, [0054] RF source 15) provided to one or more inductively-coupled plasma (ICP) coils (Fig. 2, inductor 35) of a semiconductor fabrication apparatus; determining a load impedance at an ICP coil of the one or more ICP coils using the data from the one or more sensors ([0087] The RF output parameter at the RF output 17 detected by the output sensor 49, including a voltage, a current, or a phase at 17); and determining an impedance of plasma at a location of the semiconductor fabrication apparatus within a vicinity of the ICP coil based on the load impedance at the ICP coil ([0087] the control circuit 45 may determine the plasma impedance). However, Bhutta does not explicitly teach the method comprising determining a presence or absence of plasma at a location of the semiconductor fabrication apparatus. Voronin teaches a method comprising determining a presence or absence of plasma at a location of a semiconductor apparatus ([0035] detecting presence of plasma from RF voltage or current response). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of claimed invention to apply the teachings of Voronin to the teachings of Bhutta in determining the presence or absence of plasma using the plasma impedance determined by the control circuit of Bhutta based on the voltage and/or current parameter of the output sensor in order to prevent chamber damage from power generators (Voronin, [0045]). Regarding claim 2, all the limitations of claim 1 are taught by Bhutta in view of Voronin. Bhutta further teaches the method wherein the one or more sensors comprise at least one voltage-current sensor configured to measure a voltage at a first ICP coil of the one or more ICP coils, a current at the ICP coil of the one or more ICP coils, and a phase between the voltage and the current ([0087] The RF output parameter at the RF output 17 detected by the output sensor 49, including a voltage, a current, or a phase at 17). Regarding claim 4, all the limitations of claim 1 are taught by Bhutta in view of Voronin. Voronin further teaches the method wherein determining the presence or the absence of the plasma comprises comparing the load impedance at the ICP coil to a predetermined threshold, and wherein plasma is determined to be present responsive to the load impedance exceeding the predetermined threshold ([0040] in response to identifying an impedance value above a predetermined threshold). Regarding claim 6, all the limitations of claim 1 are taught by Bhutta in view of Voronin. Bhutta further teaches the method wherein the semiconductor fabrication apparatus comprises an impedance matching network ([0051] the RF impedance matching network 11). Regarding claim 7, all the limitations of claim 6 are taught by Bhutta in view of Voronin. Bhutta further teaches the method wherein the one or more sensors comprise a first sensor that measures characteristics of the RF power at an output of an RF generator operatively coupled to the impedance matching network and a second sensor that measures characteristics of the RF power at an input of the impedance matching network (Fig. 2, 21, 49, [0051]). Regarding claim 8, all the limitations of claim 7 are taught by Bhutta in view of Voronin. Bhutta further teaches the method wherein determining the load impedance comprises utilizing data from the first sensor, data from the second sensor, and a model of the impedance matching network (Fig. 2, 21, 49 and 11, [0051]). Regarding claim 9, all the limitations of claim 6 are taught by Bhutta in view of Voronin. Bhutta further teaches the method wherein the one or more sensors comprise a sensor at an output of the impedance matching network (Fig. 2, 49). Regarding claim 10, all the limitations of claim 1 are taught by Bhutta in view of Voronin. Bhutta further teaches the method wherein the one or more sensors are utilized by a controller (Fig. 2, control circuit 45) associated with the semiconductor fabrication apparatus to control a ratio of current provided to ICP coils of the one or more ICP coils (35, [0059] the control circuit 45 to provide operational power, at the designed currents and voltages). Regarding claim 11, this claim has substantially the same subject matter as that in claim 1. Therefore, claim 11 is rejected under the same rationale as claim 1 above. Regarding claim 12, this claim has substantially the same subject matter as that in claim 2. Therefore, claim 12 is rejected under the same rationale as claim 2 above. Regarding claim 14, this claim has substantially the same subject matter as that in claim 4. Therefore, claim 14 is rejected under the same rationale as claim 4 above. Regarding claim 16, this claim has substantially the same subject matter as that in claim 6. Therefore, claim 16 is rejected under the same rationale as claim 6 above. Regarding claim 17, this claim has substantially the same subject matter as that in claim 7. Therefore, claim 17 is rejected under the same rationale as claim 7 above. Regarding claim 18, this claim has substantially the same subject matter as that in claim 8. Therefore, claim 18 is rejected under the same rationale as claim 8 above. Regarding claim 19, this claim has substantially the same subject matter as that in claim 9. Therefore, claim 19 is rejected under the same rationale as claim 9 above. Regarding claim 20, this claim has substantially the same subject matter as that in claim 10. Therefore, claim 20 is rejected under the same rationale as claim 10 above. Claims 3 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Bhutta (US 2021/0305018 A1) in view of Voronin (US 2016/0372933 A1) as applied to claim 1 above, and further in view of Lor (EP 1193726 A2). Regarding claim 3, all the limitations of claim 1 are taught by Bhutta in view of Voronin. Bhutta in view of Voronin does not explicitly teach the method, wherein the one or more sensors comprise at least one phase-magnitude sensor configured to measure a magnitude and a phase of an impedance at the ICP coil. Lor teaches a plasma processing method wherein the one or more sensors comprise at least one phase-magnitude sensor configured to measure a magnitude and a phase of an impedance at the ICP coil (Fig. 1A, [0008] a phase/magnitude sensor 13 ). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of claimed invention to apply the teachings of Lor to the teachings of Bhutta in view of Voronin in order for improved reliability, and cost savings (Lor, [0005]). Regarding claim 13, this claim has substantially the same subject matter as that in claim 3. Therefore, claim 13 is rejected under the same rationale as claim 3 above. Allowable Subject Matter Claims 5 and 15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Regarding claim 5, the prior arts fail to teach or reasonably suggest a method of detecting plasma in semiconductor fabrication apparatus wherein: the obtained data comprises data obtained from a first set of sensors of the one or more sensors, and wherein the obtained data is utilized to determine a presence or an absence of plasma at a first location of the semiconductor fabrication apparatus within a vicinity of a first ICP coil of the one or more ICP coils; and the obtained data comprises data obtained from a second set of sensors of the one or more sensors, and wherein the obtained data is utilized to determine a presence or an absence of plasma at a second location of the semiconductor fabrication apparatus within a vicinity of a second ICP coil of the one or more ICP coils, in combination with the other limitations of the claim. Regarding claim 15, this claim has substantially the same subject matter as that in claim 5. Therefore, claim 15 is objected to under the same rationale as claim 5 above. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SEOKJIN KIM whose telephone number is (571)272-1487. The examiner can normally be reached M-F: 8:30am-5:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Alexander Taningco can be reached at (571) 272-8048. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SEOKJIN KIM/Primary Examiner, Art Unit 2845
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Prosecution Timeline

Jan 14, 2025
Application Filed
Jun 29, 2026
Non-Final Rejection mailed — §103
Aug 21, 2026
Interview Requested
Sep 08, 2026
Applicant Interview (Telephonic)
Sep 09, 2026
Examiner Interview Summary

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
78%
Grant Probability
92%
With Interview (+13.6%)
2y 3m (~6m remaining)
Median Time to Grant
Low
PTA Risk
Based on 562 resolved cases by this examiner. Grant probability derived from career allowance rate.

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