Prosecution Insights
Last updated: August 15, 2026
Application No. 18/999,123

CONTROL CIRCUIT AND SWITCHING POWER SUPPLY THEREOF

Non-Final OA §102§103§112
Filed
Dec 23, 2024
Priority
Dec 28, 2023 — CN 202311845820.6 +1 more
Examiner
BEHM, HARRY RAYMOND
Art Unit
Tech Center
Assignee
Silergy Semiconductor Technology (Hangzhou) Ltd.
OA Round
1 (Non-Final)
80%
Grant Probability
Favorable
1-2
OA Rounds
9m
Est. Remaining
87%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allowance Rate
931 granted / 1169 resolved
+19.6% vs TC avg
Moderate +7% lift
Without
With
+7.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
38 currently pending
Career history
1196
Total Applications
across all art units

Statute-Specific Performance

§101
1.0%
-39.0% vs TC avg
§103
50.6%
+10.6% vs TC avg
§102
30.2%
-9.8% vs TC avg
§112
8.6%
-31.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1169 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statement (IDS) submitted on 12/23/2024 has been considered by the examiner. Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. A title such as the following is suggested: Control circuit for a switching power supply with adaptive voltage positioning. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 10-16 and 18 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Where applicant acts as his or her own lexicographer to specifically define a term of a claim contrary to its ordinary meaning, the written description must clearly redefine the claim term and set forth the uncommon definition so as to put one reasonably skilled in the art on notice that the applicant intended to so redefine that claim term. Process Control Corp. v. HydReclaim Corp., 190 F.3d 1350, 1357, 52 USPQ2d 1029, 1033 (Fed. Cir. 1999). The term “an analog-to-digital conversion” in lines 3-4 of claim 10 is used by the claim to mean “digital-to-analog conversion,” while the accepted meaning is “conversion of an analog signal to a digital signal.” The term is indefinite because the specification does not clearly redefine the term. Claim 10 requires a second digital-to-analog converter configured to perform an analog-to-digital conversion of the digital voltage reference signal, in order to obtain an analog voltage reference signal; but an analog-to-digital converter converts an analog signal into a digital signal, not a digital signal into an analog signal, making the claim indefinite. For the purpose of examination, the claim shall be interpreted as ‘a digital-to-analog conversion of the digital voltage reference signal, in order to obtain an analog voltage reference signal’. In line 7 of claim 10, the claim language requires “a voltage sampling signal” indicating a digital signal but the required signal is not sampled and is an analog signal that is combined with the analog reference voltage signal. The claim is indefinite because it is unclear if the voltage signal is sampled and is digital. For the purpose of examination, the claim shall be interpreted as ‘to process a difference between a voltage signal representing the output voltage and the analog voltage reference signal through a first gain to obtain a first signal’. In line 9 of claim 10, the claim language “a current sampling signal” is not consistent with the disclosure (see for instance Figure 8 iL and V2) which shows the current signal is analog, not digital, and is not sampled. The claim is indefinite when interpreted in light of the specification because it is unclear whether the current sampling signal is sampled and is digital. For the purpose of examination, the claim shall be interpreted as ‘to process a current signal representing an output current through a second gain to obtain a second signal’. The term “an analog-to-digital conversion” in lines 3-4 of claim 11 is used by the claim to mean “digital-to-analog conversion,” while the accepted meaning is “converting an analog signal to a digital signal.” The term is indefinite because the specification does not clearly redefine the term. Claim 11 requires a second digital-to-analog converter configured to perform an analog-to-digital conversion of the digital voltage reference signal, in order to obtain an analog voltage reference signal; but an analog-to-digital converter converts an analog signal into a digital signal, not a digital signal into an analog signal, making the claim indefinite. For the purpose of examination, the claim shall be interpreted as ‘a digital-to-analog conversion of the digital voltage reference signal, in order to obtain an analog voltage reference signal’. In lines 6-7 of claim 11, the claim language requires “a voltage sampling signal” indicating a digital signal but the required signal is not sampled and is an analog signal that is combined with the analog reference voltage signal. The claim is indefinite because it is unclear if the voltage signal is sampled and is digital. For the purpose of examination, the claim shall be interpreted as ‘to process a voltage signal’. In line 8 of claim 11, the claim language “a current sampling signal” is not consistent with the disclosure (see for instance Figure 8 iL and V2) which shows the current signal is analog, not digital, and is not sampled. The claim is indefinite when interpreted in light of the specification because it is unclear whether the current sampling signal is sampled and is digital. For the purpose of examination, the claim shall be interpreted as ‘to process a current signal’. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-3, 7 and 19-20 are rejected under 35 U.S.C. 102a1 as being anticipated by Guthrie (US 2015/0326228). With respect to claim 1, Guthrie discloses a control circuit (Fig. 8 800) for a switching power supply (Fig. 7 700) with adaptive voltage positioning control, the control circuit comprising: a) a compensation signal generation circuit (Fig. 8 802, error voltage summer,806,Rdroop multiplier) configured to receive a digital voltage reference signal (Fig. 8 Vref), a digital voltage sampling signal (Fig. 8 Vout) representing an output voltage (Fig. 8 Vsense) of the switching power supply, and a digital droop voltage (Fig. 8 output of multiplier of Rdroop and Total Current), and to integrate (Fig. 806 integrator of PID) an error (Fig. 8 Verror) between the digital voltage reference signal and a sum (Fig. 8 negative sum of Vout and droop voltage are summed in summer) of the digital voltage sampling signal and the digital droop voltage, in order to generate a compensation signal (Fig. 8 output of 806); and b) an adaptive voltage positioning control circuit (Fig. 8 Correction Current summers) configured to generate a positioning signal (Fig. 8 output of Correction Current summers) according to the compensation signal, in order to adjust the output voltage. With respect to claim 2, Guthrie discloses the control circuit of claim 1, wherein the digital droop voltage is generated by multiplying a digital droop resistor (Fig. 8 Rdroop) and a digital current sampling signal (Fig. 8 Total Current), and the digital current sampling signal is obtained by filtering (Fig. 8 870) a current sampling signal (Fig. 8 Isense) characterizing an inductor current (Fig. 6 Iinductor) of the switching power supply and then passing through analog-to-digital conversion (Fig. 7 IADC). With respect to claim 3, Guthrie discloses the control circuit of claim 2, wherein the digital droop resistor (Fig. 8 Rdroop) corresponds to an output characteristic curve (Fig. 6 Rdroop) of the output voltage and the output current. With respect to claim 7, Guthrie discloses the control circuit of claim 1, wherein the adaptive voltage positioning control circuit is configured generate the positioning signal according to a voltage sampling signal (Fig. 8 Vout sampled by 802) characterizing the output voltage (Fig. 8 Vout) of the switching power supply, a current sampling signal (Fig. 7 IADC sample the current) characterizing the inductor current (Fig. 6 Iinductor), the digital voltage reference signal (Fig. 8 Vref), and the compensation signal (Fig. 8 output of PID). With respect to claim 19, Guthrie discloses the control circuit of claim 1, further comprising a switch control circuit (Fig. 7 Pulse Computation) configured to generate a switch control signal (Fig. 6 gate signal for 604 as in Fig. 10 PWM) according to the positioning signal, in order to control the switching state of a power switch (Fig. 6 604) in the switching power supply. With respect to claim 20, Guthrie discloses a switching power supply (Fig. 6 600), comprising the control circuit of claim 1, and further comprising a power stage circuit (Fig. 6 600). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 17 is rejected under 35 U.S.C. 103 as being unpatentable over Guthrie (US 2015/0326228). With respect to claim 17, Guthrie discloses the control circuit of claim 2 as set forth above and remains silent as how to implement the digital droop resistance. It was well known before the effective filing date of the claimed invention to implement digital values with a binary weighting value. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement wherein a resistance of the digital droop resistor is divided into a first part with a first unit as a unit (such as a first binary weight of the first decimal place), and a second part with a second unit as a unit (such as a second binary weight of the second decimal place), and the sum of the first part and the second part is the resistance of the digital droop resistor, in order to efficiently represent the digital resistance value. Allowable Subject Matter Claims 4-6 and 8-9 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, while claims 10-16 and 18 are rejected for being indefinite, but would be allowed if the indefinite rejections stated above were overcome and if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: With respect to claim 4, the prior art does not disclose or suggest, in combination with the limitations of the base claim and any intervening claims, primarily, wherein the compensation signal generation circuit comprises: a) a digital integration operation module configured to integrate the error between the digital voltage reference signal and the sum of the digital voltage sampling signal and the digital droop voltage, in order to generate a digital compensation signal at an output terminal; and b) a first digital-to-analog converter configured to convert the digital compensation signal to obtain the compensation signal. With respect to claim 10, the prior art does not disclose or suggest, in combination with the limitations of the base claim and any intervening claims, primarily, wherein the adaptive voltage positioning control circuit comprises: a) a second digital-to-analog converter configured to perform a digital-to-analog conversion of the digital voltage reference signal, in order to obtain an analog voltage reference signal; and b) wherein the adaptive voltage positioning control circuit is configured to process a difference between a voltage signal representing the output voltage and the analog voltage reference signal through a first gain to obtain a first signal, to process a current signal representing an output current through a second gain to obtain a second signal, and to process the compensation signal through a third gain to obtain a third signal, in order to generate the positioning signal based on the first signal, the second signal, and the third signal. With respect to claim 11, the prior art does not disclose or suggest, in combination with the limitations of the base claim and any intervening claims, primarily, wherein the adaptive voltage positioning control circuit comprises: a) a second digital-to-analog converter configured to perform a digital-to-analog conversion of the digital voltage reference signal, in order to obtain an analog voltage reference signal; and b) wherein the adaptive voltage positioning control circuit is configured to process a voltage signal representing the output voltage through a first gain to obtain a first signal, to process a current signal representing an output current through a second gain to obtain a second signal, and to process a sum of the compensation signal and the analog voltage reference signal through a third gain to obtain a third signal, in order to generate the positioning signal based on the first signal, the second signal, and the third signal. The aforementioned limitations in combination with all remaining limitations of the respective claims are believed to render the aforementioned indicated claim and any dependent claims thereof patentable over the art of record. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Babazadeh (US 2016/0079851), Krishnamurthy (US 2011/0267019) and Huang (US 2008/0024100) disclose adaptive voltage positioning. Any inquiry concerning this communication or earlier communications from the examiner should be directed to HARRY RAYMOND BEHM whose telephone number is (571)272-8929. The examiner can normally be reached M-F: 8-5 EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thienvu Tran can be reached at 571-270-1276. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /HARRY R BEHM/Primary Examiner, Art Unit 2838
Read full office action

Prosecution Timeline

Dec 23, 2024
Application Filed
Jul 29, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12706538
MULTI-MODE POWER STAGE ARCHITECTURE FOR PULSE WIDTH MODULATION CONTROLLER
2y 7m to grant Granted Aug 11, 2026
Patent 12706454
SHORT-CIRCUIT CURRENT CONTROL IN POWER SYSTEMS
2y 10m to grant Granted Aug 11, 2026
Patent 12706521
SINGLE-INPUT, MULTI-OUTPUT DIRECT-CURRENT-TO-DIRECT CURRENT CONVERTERS AND ASSOCIATED METHODS
2y 5m to grant Granted Aug 11, 2026
Patent 12695376
VOLTAGE SOURCE CONVERTER SELECTIVELY DELAYING DEAD TIME
3y 3m to grant Granted Jul 28, 2026
Patent 12683481
ZERO VOLTAGE SWITCHING HYBRID CONVERTER
2y 2m to grant Granted Jul 14, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
80%
Grant Probability
87%
With Interview (+7.1%)
2y 5m (~9m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1169 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month