Prosecution Insights
Last updated: July 05, 2026
Application No. 18/999,983

SEQUENCE ALIGNMENT WITH MEMORY ARRAYS

Non-Final OA §DP
Filed
Dec 23, 2024
Priority
Sep 12, 2022 — continuation of 12/217,796
Examiner
HOANG, HUAN
Art Unit
Tech Center
Assignee
Micron Technology Inc.
OA Round
1 (Non-Final)
93%
Grant Probability
Favorable
1-2
OA Rounds
2m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 93% — above average
93%
Career Allowance Rate
1141 granted / 1224 resolved
+33.2% vs TC avg
Moderate +6% lift
Without
With
+5.6%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 8m
Avg Prosecution
16 currently pending
Career history
1240
Total Applications
across all art units

Statute-Specific Performance

§101
1.9%
-38.1% vs TC avg
§103
40.9%
+0.9% vs TC avg
§102
27.8%
-12.2% vs TC avg
§112
9.4%
-30.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1224 resolved cases

Office Action

§DP
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 4-6 and 9-18 of U.S. Patent No. 12,217,796. Although the claims at issue are not identical, they are not patentably distinct from each other because claims 1-20 are anticipated by claims 1, 4-6 and 9-18 of the patent. Regarding claim 1, claim 1, lines 9-17 of the patent recites a method comprising: summing a plurality of currents along corresponding ones of a plurality of sense lines coupled to a plurality of memory cells, wherein the plurality of currents are functions of a plurality of voltage values and corresponding ones of a plurality of resistance values of the plurality of memory cells along corresponding ones of the plurality of sense lines; providing a plurality of outputs based, at least in part, on the summing; and comparing the plurality of outputs to a target value. Regarding claim 2. claim 1, lines 3-4 of the patent recites the method of claim 1, wherein the plurality of resistance values correspond to nucleotide types. Regarding claim 3. Claim 1, lines 7-8 of the patent recites the method of claim 1, wherein the plurality of voltage values correspond to nucleotide types. Regarding claim 4. Claim 1, lines 1-2 of the patent recites the method of claim 1, further comprising programming the plurality of resistance values to the plurality of memory cells. Regarding claim 5, claim 1, lines 5-6 of the patent recites the method of claim 1, further comprising providing the plurality of voltage values to a plurality of access lines coupled to the plurality of memory cells. Regarding claim 6, claim 5 of the patent recites the method of claim 1, determining whether there is a potential match between the plurality of outputs and the target value. Regarding claim 7, claim 6 of the patent recites the method of claim 6, wherein the potential match is determined when at least one of the plurality of outputs is within a range of the target value. Regarding claim 8, claim 4 of the patent recites the method of claim 6, wherein the potential match indicates at least a portion of a first genetic sequence corresponding to the plurality of resistance values programmed in the plurality of memory cells matches a second genetic sequence corresponding to the plurality of voltage values. Regarding claim 9, claim 9 of the patent recites the method of claim 1, further comprising storing the plurality of outputs. Regarding claim 10, claim 10 of the patent recites the method of claim 1, further comprising storing results of the comparing. Regarding claim 11, claim 11, lines 6-13 of the patent recites a method comprising: multiplying a conductance value and a voltage value corresponding to a nucleotide type for each of a plurality of nucleotides of a first genetic sequence to generate a plurality of products; summing the plurality of products to generate a target value corresponding to the first genetic sequence; and comparing at least one output of a Bloom filter to the target value. Regarding claim 12, claim 11, lines 2-3 recites the method of claim 11, further comprising assigning each of a plurality of nucleotide types one of a plurality of conductance values. Regarding claim 13, claim 11, lines 4-5 of the patent recites the method of claim 11, further comprising assigning each of the plurality of nucleotide types one of a plurality of voltage values. Regarding claim 14, claim 12 of the patent recites the method of claim 11, further comprising based on the comparing, determining whether the Bloom filter includes a potential match to the first genetic sequence. Regarding 15, claim 13 of the patent recites the method of claim 11, further comprising providing an input corresponding to the first genetic sequence to the Bloom filter, wherein the at least one output is based, at least in part, on the input. Regarding claim 16, claim 14 of the patent recites the method of claim 11, wherein the Bloom filter is implemented by a memory array configured to store a second genetic sequence in a plurality of memory cells. Regarding claim 17, claim 15 of the patent recites the method of claim 16, further comprising programming a plurality of resistive elements of the plurality of memory cells with the plurality of conductance values corresponding to the second genetic sequence. Regarding claim 18, claim 16 of the patent recites the method of claim 16, further comprising storing a plurality of portions of the second genetic sequence along corresponding ones of a plurality of sense lines of the memory array, wherein each of the plurality of sense lines includes a portion of the second genetic sequence shifted by at least one nucleotide. Regarding claim 19, claim 17 of the patent recites the method of claim 11, further comprising when the at least one output of the Bloom filter is equal to or within a range of the target value, comparing the first genetic sequence to a second genetic sequence corresponding to the at least one output on a nucleotide-by-nucleotide basis. Regarding claim 20, claim 18 of the patent recites the method of claim 11, further comprising when the at least one output of the Bloom filter is not equal to or not within a range of the target value, ignoring or discarding the at least one output. Claims 1-6 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1 and 10 of U.S. Patent No. 12,073,110. Although the claims at issue are not identical, they are not patentably distinct from each other because claims 1-6 are anticipated by claims 1 and 10 of the patent. Regarding claim 1, claim 1, lines 9-17 of the patent recites a method comprising: summing a plurality of currents along corresponding ones of a plurality of sense lines coupled to a plurality of memory cells, wherein the plurality of currents are functions of a plurality of voltage values and corresponding ones of a plurality of resistance values of the plurality of memory cells along corresponding ones of the plurality of sense lines (claim 1, lines 10-17); providing a plurality of outputs based, at least in part, on the summing; and comparing the plurality of outputs to a target value (claim 10). Regarding claim 2, claim 1, lines 3-4 of the patent recites the method of claim 1, wherein the plurality of resistance values correspond to nucleotide types. Regarding claim 3. Claim 1, lines 7-9 of the patent recites the method of claim 1, wherein the plurality of voltage values correspond to nucleotide types. Regarding claim 4. Claim 1, lines 3-4 of the patent recites the method of claim 1, further comprising programming the plurality of resistance values to the plurality of memory cells. Regarding claim 5, claim 1, lines 6-8 of the patent recites the method of claim 1, further comprising providing the plurality of voltage values to a plurality of access lines coupled to the plurality of memory cells. Regarding claim 6, claim 10, lines 3-4 of the patent recites the method of claim 1, determining whether there is a potential match between the plurality of outputs and the target value. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Choi et al. (US 10.528,643) discloses vector-matrix multiplication using non-volatile memory cells. Any inquiry concerning this communication or earlier communications from the examiner should be directed to HUAN HOANG whose telephone number is (571)272-1779. The examiner can normally be reached 7:30AM-4:00PM M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, AMIR ZARABIAN can be reached at 571-272-1852. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /HUAN HOANG/ Primary Examiner, Art Unit 2827
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Prosecution Timeline

Dec 23, 2024
Application Filed
Jun 17, 2026
Non-Final Rejection mailed — §DP (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
93%
Grant Probability
99%
With Interview (+5.6%)
1y 8m (~2m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1224 resolved cases by this examiner. Grant probability derived from career allowance rate.

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