DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 7/14/2026 and 8/14/2026 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement submissions are being considered by the examiner.
Election/Restrictions
Applicant’s election without traverse of Species I of Figures 2,5 and 6, readable in claims 1-18 and 28 in the reply filed on 8/21/2026 is acknowledged.
It is noted however, that the response elects claim 28 as being directed to Species I. Claim 28 is dependent from non-elected claim 19 which recites, among other elements, a first switching circuitry and MR elements that include a plurality of tap points, shown in Figure 7, units 702 and 706. Accordingly, claim 28 is withdrawn from consideration as being directed to a non-elected Species (Species II of Figure 7).
Claims 19-29 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Species, there being no allowable generic or linking claim.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-2, 10 and 12-18 is/are rejected under 35 U.S.C. 103 as being unpatentable over the admitted prior art of Figure 1 (described in the Specification, paragraphs 0014- 0033, hereafter referred to as “APA”) in view of the IEEE Publication titled: Novel Strategies for DAC based Offset Elimination Technique in Resistive Bridge Sensor, by Sayan Sarkar (“Sarkar” hereafter). Please refer to the copy of the Publication provided with this Office Action.
Regarding claim 1, APA teaches a sensor comprising:
a sensing bridge including a first leg (111) and a second leg (113), the first leg including a first magnetoresistance (MR) element (102) that is coupled to a second MR element (104) via a first transistor (112), the second leg including a third MR element (106) that is coupled to a fourth MR element (108) via a second transistor (114);
a frontend circuit (151) having a first input (181) and a second input (183), the first input being coupled to the first leg, and the second input being coupled to the second leg; and
a first digital-to-analog converter (DAC) (126) that is coupled to at least the first leg, the first DAC being arranged to receive a first trim code (from controller 127) and modify a first resistance of the first leg based on the first trim code.
APA substantially teaches all of the elements disclosed above, except for explicitly mentioning the digital-to-analog converter (DAC) being a resistive digital-to-analog converter.
Sarkar teaches the use of resistive DAC structures (R-2R R-DAC) in resistive bridge sensors to achieve offset compensation (see Sarkar, page 3: “A. Resistive DAC structures”).
It would have been obvious to a person having ordinary skill in the art before the invention was effectively filed, to apply the teaching of resistive digital-to-analog converters (R-DAC) to provide offset compensation as taught by Sarkar, in the device/system/method of APA, in order to gain the advantage of simpler and more precise constructions (when compared to binary weighted converters for example), gain better output linearity and lower sensitivity to resistor tolerance.
Regarding claim 2, APA in view of Sarkar teaches the first R-DAC is coupled to both the first leg (111) and the second leg (113) of the sensing bridge.
Regarding claim 10, APA in view of Sarkar, teaches a a controller (127 in Fig. 1) that is configured to provide the first trim code to the first R-DAC.
Regarding claim 12, APA teaches the first transistor (112) is a binary junction transistor (see paragraph 0019 in the Specification: “According to the present example, each of the transistors 112 and 114 is a bipolar junction transistor (BJT).”) having a first collector that is coupled to the first MR element (102) and a first emitter that is coupled to the second MR element (104);
the second transistor (114) is a binary junction transistor having a second collector that is coupled to the third MR element (106) and a second emitter that is coupled to the fourth MR element (108).
Regarding claim 13, APA teaches the first transistor (112) is a metal-oxide field-effect transistor (MOSFET; see paragraph 0019 in the Specification: “However, alternative implementations are possible in which each of transistors 112 and 114 is a different type of transistor, such as a metal-oxide-semiconductor field-effect transistor (MOSFET).”) having a first drain that is coupled to the first MR element (102) and a first source that is coupled to the second MR element (104);
the second transistor (114) is a MOSFET having a second drain that is coupled to the third MR element (106) and a second source that is coupled to the fourth MR element (108).
Regarding claim 14, APA teaches the frontend circuit (151) includes an amplifier (128), wherein a first input of the amplifier is coupled to the first leg of the sensing bridge (through terminal 181) and a second input of the amplifier is coupled to the second leg of the sensing bridge (through terminal 183).
Regarding claim 15, APA teaches a driving circuit (122) that is coupled to a first control terminal of the first transistor (112) and a second control terminal of the second transistor (114).
Regarding claim 16, APA teaches the frontend circuit (151) is configured to receive a sensing signal that is at least in part generated by the sensing bridge in response to a magnetic field that is incident on the sensing bridge (signals received at terminals 181 and 183), and generate an output signal (VOUT) based on the sensing signal.
Regarding claim 17, APA teaches 17. The sensor of claim 1, wherein the output signal is indicative of one of: (i) a position of a target, (ii) a speed of a target, and (iii) a level of electrical current that is flowing through a conductor (see paragraph 0017; “The sensor 100 may be configured to output a signal VOUT that is indicative of the magnitude of a magnetic field that is incident on sensor 100 and/or the value of a quantity that is being measured. By way of example, the signal VOUT may be indicative of the speed of a target, the position of a target, the level of electrical current through a conductor, and/or any other suitable type of quantity.”).
Regarding claim 18, APA teaches 18. The sensor of claim 1, wherein each of the first, second, third, and fourth MR elements includes one of a giant magnetoresistance (GMR) element or a tunneling magnetoresistance (TMR) element (see paragraph 0019: “According to the present example, each of sensing elements 102, 104, 106, and 108 is a tunnelling magnetoresistance (TMR) element.”).
Claim(s) 6-9 is/are rejected under 35 U.S.C. 103 as being unpatentable over APA in view of Sarkar as applied to claim 1 above, and further in view of the US Patent Application Publication PGPub 2023/0101044 by Finlinson et al., (Finlinson hereafter).
Regarding claim 6, APA in view of Sarkar, substantially teaches all of the elements disclosed above, except for including a second R-DAC that is coupled to the second leg, the second R-DAC being arranged to receive a second trim code and modify a second resistance of the second leg based on the second trim code.
Finlinson teaches in Figure 7, a sensing system including a sensor bridge (602) including a first leg (upper 610+620) and second leg (lower 620+610). Furthermore Finlinson teaches the use of a first and second DAC units (720), each respectively connected to a leg of the bridge to provide compensation (see paragraph 0047: “DACs 720 may be, for example, 1-bit DACs that generate a global feedback current into or out of the inputs (e.g., positive/negative inputs) of amplifier 640, thus closing a global feedback loop around the temperature sensor.”).
It would have been obvious to a person having ordinary skill in the art before the invention was effectively filed, to apply the teaching of dual DACs providing feedback compensation to a sensor bridge as taught by Finlinson, and add a second R-DAC connected to the second leg of the bridge in the device/system/method of APA in view of Sarkar, in order to gain the advantage of providing feedback to each leg of the bridge separately, allowing for tailored feedback to each leg output.
Regarding claim 8, APA in view of Sarkar, substantially teaches all of the elements disclosed above, except for including a second R-DAC that is coupled to the first leg, the second R-DAC being arranged to receive a second trim code and further adjust the first resistance of the first leg based on the second trim code.
Finlinson teaches in Figure 7, a sensing system including a sensor bridge (602) including a first leg (upper 610+620) and second leg (lower 620+610). Furthermore Finlinson teaches the use of a first and second DAC units (720), each respectively connected to a leg of the bridge to provide compensation (see paragraph 0047: “DACs 720 may be, for example, 1-bit DACs that generate a global feedback current into or out of the inputs (e.g., positive/negative inputs) of amplifier 640, thus closing a global feedback loop around the temperature sensor.”).
It would have been obvious to a person having ordinary skill in the art before the invention was effectively filed, to apply the teaching of dual DACs providing feedback compensation to a sensor bridge as taught by Finlinson, and add a second R-DAC connected to the first leg of the bridge in the device/system/method of APA, in order to gain the advantage of providing feedback to each leg of the bridge separately, allowing for tailored feedback to each leg output.
Regarding claim 7 and 9, although Finlinson doesn’t explicitly mention that the second trim code is different from the first trim code, because each leg on APA’s bridge exhibit a resistance that varies with the magnitude of magnetic flux it is subjected to, and because the fields of magnetic flux surrounding the bridge would not be perfectly homogenous across the entire surface of the bridge, the exhibited resistances across each leg are not perfectly the same. Thus, the signals each legs receive (first and second trim) have different magnitude of voltage (because of the disparity of resistances).
Allowable Subject Matter
Claim 3-5 and 11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 3, the prior art of record doesn’t teach alone or in combination, the sensor wherein the first R-DAC includes a sequence of stages, each stage including a voltage divider and a respective switch, the respective switch of each of the stages being configured to toggle the respective voltage divider of the stage, based on a corresponding bit of the first trim code, between being coupled to the first R-DAC terminal and being coupled to the second R-DAC terminal, the respective voltage divider of each of the stages, except for a last stage in the sequence, having an output terminal that is coupled a respective end terminal of a next stage in the sequence, in combination with all other elements recited.
As to claim 4, the claim is objected as it includes the allowable subject matter in claim 3 noted above.
Regarding claim 5, the prior art of record doesn’t teach alone or in combination, the sensor wherein the first R-DAC includes a sequence of stages including a plurality of initial stages and a final stage, each of the initial stages including a respective switch and a respective voltage divider whereby the respective voltage dividers of one or more of the initial stages is implemented by using at least one MR element, the respective switch of each of the initial stages in the sequence being configured to toggle the respective voltage divider of the initial stage, based on a corresponding bit of the first trim code, between being coupled to the first R-DAC terminal and being coupled to the second R-DAC terminal, the respective voltage divider of each of the initial stages having an output terminal that is coupled to a respective end terminal of a next stage in the sequence, the next stage in the sequence being either another one of the initial stages or the final stage, in combination with all other elements recited.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
- The US Patent US 6,433,554 by Kawate et al., directed to condition responsive sensors having a full bridge circuit such as a bridge circuit comprising piezoresistive elements and more particularly to apparatus and methods for providing fault detection which enables detection of errors in either the offset or sensitivity of a sensor that can be smaller than a full scale output signal. See figure below:
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- The US Patent Application Publication PGPub 2015/0236648 by Ahmad et al., directed to compensating for a relatively large offset in a signal generated by a sensor, such as a pressure sensor and/or a resistive bridge based sensor. Such offset compensation can include applying an offset correction signal generated by a configurable voltage reference, such as a voltage mode digital-to-analog converter (DAC), to an input of an amplifier included in an instrumentation amplifier to compensate for the offset of the signal generated by the sensor. See figure below:
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/RICHARD ISLA/ Primary Patent Examiner, Art Unit 2858 September 2, 2026
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