DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “voltage control module configured to: monitor…compare…and adjust…” in Claim 1; “voltage control module…configured to: maintain…switch…and switch…” in Claim 2; “voltage control module configured to monitor…” in Claim 5; “voltage control module…configured to apply…” in Claim 6; “voltage control module…configured to: maintain…switch…switch…and switch…” in Claim 8; “voltage control module configured to: monitor…compare…and adjust…” in Claim 9; “workload execution unit…configured to execute…” in Claim 10; “voltage control module…configured to: maintain…and switch…” in Claim 11; “voltage control module…configured to switch…” in Claim 12; “voltage control module configured to monitor…” in Claim 14; “voltage control module…configured to apply…” in Claim 15; “voltage control module…configured to incorporate…” in Claim 16.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
The broadest reasonable interpretation of a method (or process) claim having contingent limitations requires only those steps that must be performed and does not include steps that are not required to be performed because the condition(s) precedent are not met. The broadest reasonable interpretation of a system (or apparatus or product) claim having structure that performs a function, which only needs to occur if a condition precedent is met, requires structure for performing the function should the condition occur. The system claim interpretation differs from a method claim interpretation because the claimed structure must be present in the system regardless of whether the condition is met and the function is actually performed. See MPEP 2111.04(II). "[i]f the condition for performing a contingent step is not satisfied, the performance recited by the step need not be carried out in order for the claimed method to be performed" (quotation omitted). Ex parte Schulhauser, Appeal 2013-007847 (PTAB April 28, 2016).
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim(s) 17 is/are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 17 recites the limitation “user-configurable parameters that allow fine-tuning of voltage margin behavior based on specific application requirements or system configurations”. The use of the term “allows” renders the metes and bounds of the claim unclear, as the term “allows” includes anything and everything that does not explicitly prohibit fine-tuning of voltage margin behavior based on specific application requirements or system configurations.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-5, 9-14, and 17-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US Patent Application Publication Number 2017/0344102 to Kolla et al. (“Kolla”).
In reference to Claim 1, Kolla discloses a device for dynamic voltage margin adjustment (See Paragraph 5), comprising: a processor (See Figure 1 Number 102, Figure 5 Number 500, and Paragraphs 9, 17, 45, and 46); a power supply monitor (PSM) configured to measure voltage levels of the processor (See Figure 1 Number 104 and Paragraphs 17-18); and a voltage control module (See Figure 1 Numbers 106 and 112 and Paragraphs 18 and 20) configured to: monitor minimum voltage levels reported by the PSM (See Figure 2 Number 202 and Paragraphs 17-18 and 27); compare the minimum voltage levels to a threshold (See Figure 2 Number 202 and Paragraphs 17-18 and 27 [droop threshold voltage]); and adjust a voltage margin applied to the processor based on the comparing of the minimum voltage levels to the threshold (See Figure 2 Numbers 208-214 and Paragraphs 4, 17-18, 21-24, and 27).
In reference to Claim 2, Kolla discloses the limitations as applied to Claim 1 above. Kolla further discloses that the voltage control module is further configured to: maintain a first voltage margin when the minimum voltage levels are below a first threshold (See Figure 2 Number 208 and Paragraphs 17, 231, 24, and 27); switch to a second voltage margin when the minimum voltage levels are above a second threshold for a predetermined time period, wherein the second voltage margin is lower than the first voltage margin (See Figure 2 Number 214 and Paragraphs 17, 23, 24, and 27); and switch back to the first voltage margin when the minimum voltage levels drop below the first threshold (See Figure 2 Number 208 and Paragraphs 17, 23, 24, and 27).
In reference to Claim 3, Kolla discloses the limitations as applied to Claim 2 above. Kolla further discloses that at least one of: the first threshold is different from the second threshold; or the first voltage margin is different from the second voltage margin (See Paragraph 23 [first voltage margin is 790mV, second voltage margin is 800mV]).
In reference to Claim 4, Kolla discloses the limitations as applied to Claim 1 above. Kolla further discloses that the PSM comprises multiple PSMs distributed across a die of the processor (See Figure 5 and Paragraphs 4 and 37 [the use of multiple supply voltage controller circuits and multiple corresponding processor/load circuit instances necessarily requires the use of a PSM for each of the multiple processor/load circuit instances]).
In reference to Claim 5, Kolla discloses the limitations as applied to Claim 4 above. Kolla further discloses that the voltage control module is configured to monitor a minimum voltage level across all of the multiple PSMs (See Paragraph 37).
In reference to Claim 9, Kolla discloses a system comprising: a processor (See Figure 1 Number 102, Figure 5 Number 500, and Paragraphs 9, 17, 45, and 46); a power supply monitor (PSM) configured to measure voltage levels of the processor (See Figure 1 Number 104 and Paragraphs 17-18); and a voltage control module (See Figure 1 Numbers 106 and 112 and Paragraphs 18 and 20) configured to: monitor minimum voltage levels reported by the PSM (See Figure 2 Number 202 and Paragraphs 17-18 and 27); compare the minimum voltage levels to a threshold (See Figure 2 Number 202 and Paragraphs 17-18 and 27 [droop threshold voltage]); and adjust a voltage margin applied to the processor based on the comparing of the minimum voltage levels to the threshold (See Figure 2 Numbers 208-214 and Paragraphs 4, 17-18, 21-24, and 27); a memory coupled to the processor (See Figure 5 Number 512 and Paragraph 47); and a voltage regulator coupled to the processor and configured to supply power to the processor based on control signals from the voltage control module (See Figure 1 Number 124 and Paragraph 23).
In reference to Claim 10, Kolla discloses the limitations as applied to Claim 9 above. Kolla further discloses a workload execution unit coupled to the processor and configured to execute various processing tasks (See Figure 5 Numbers 504, 520, and 528 and Paragraphs 46 and 48).
In reference to Claim 11, Kolla discloses the limitations as applied to Claim 9 above. Kolla further discloses that the voltage control module is further configured to: maintain a first voltage margin when the minimum voltage levels are below a first threshold (See Figure 2 Number 208 and Paragraphs 17, 231, 24, and 27); switch to a second voltage margin when the minimum voltage levels are above a second threshold for a predetermined time period, wherein the second voltage margin is lower than the first voltage margin (See Figure 2 Number 214 and Paragraphs 17, 23, 24, and 27).
In reference to Claim 12, Kolla discloses the limitations as applied to Claim 11 above. Kolla further discloses that the voltage control module is further configured to switch back to the first voltage margin when the minimum voltage levels drop below the first threshold (See Figure 2 Number 208 and Paragraphs 17, 23, 24, and 27).
In reference to Claim 13, Kolla discloses the limitations as applied to Claim 9 above. Kolla further discloses that the PSM comprises multiple PSMs distributed across a die of the processor (See Figure 5 and Paragraphs 4 and 37 [the use of multiple supply voltage controller circuits and multiple corresponding processor/load circuit instances necessarily requires the use of a PSM for each of the multiple processor/load circuit instances]).
In reference to Claim 14, Kolla discloses the limitations as applied to Claim 13 above. Kolla further discloses that the voltage control module is configured to monitor a minimum voltage level across all of the multiple PSMs (See Paragraph 37).
In reference to Claim 17, Kolla discloses the limitations as applied to Claim 9 above. Kolla further discloses user-configurable parameters that allow fine-tuning of voltage margin behavior based on specific application requirements or system configurations (See Paragraphs 29 and 34).
In reference to Claim 18, Kolla discloses a method for dynamic voltage margin adjustment (See Paragraph 5), comprising: monitoring minimum voltage levels (See Figure 2 Number 202 and Paragraphs 17-18 and 27) of a processor (See Figure 1 Number 102, Figure 5 Number 500, and Paragraphs 9, 17, 45, and 46) using a power supply monitor (PSM) (See Figure 1 Number 104 and Paragraphs 17-18); comparing the minimum voltage levels to a threshold (See Figure 2 Number 202 and Paragraphs 17-18 and 27 [droop threshold voltage]); and adjusting a voltage margin applied to the processor based on the comparing of the minimum voltage levels to the threshold (See Figure 2 Numbers 208-214 and Paragraphs 4, 17-18, 21-24, and 27).
In reference to Claim 19, Kolla discloses the limitations as applied to Claim 9 above. Kolla further discloses maintaining a first voltage margin when the minimum voltage levels are below the threshold (See Figure 2 Number 208 and Paragraphs 17, 231, 24, and 27); and switching to a second voltage margin when the minimum voltage levels are above the threshold for a predetermined time period, wherein the second voltage margin is lower than the first voltage margin (See Figure 2 Number 214 and Paragraphs 17, 23, 24, and 27).
It is noted that Claim 19 is a method claim reciting contingent limitations. As indicated above, if the condition for performing a contingent step is not satisfied, the performance recited by the step need not be carried out in order for the claimed method to be performed.
In reference to Claim 20, Kolla discloses the limitations as applied to Claim 11 above. Kolla further discloses switching back to the first voltage margin when the minimum voltage levels drop below the threshold (See Figure 2 Number 208 and Paragraphs 17, 23, 24, and 27).
It is noted that Claim 20 is a method claim reciting contingent limitations. As indicated above, if the condition for performing a contingent step is not satisfied, the performance recited by the step need not be carried out in order for the claimed method to be performed.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 6-8 and 15-16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kolla as applied to Claim 9 above, and further in view of US Patent Application Publication Number 2021/0116982 to Khanna et al. (“Khanna”).
In reference to Claim 6, Kolla discloses the limitations as applied to Claim 1 above. Kolla does not explicitly disclose that the voltage control module is further configured to apply different voltage margins for different types of workloads executed by the processor. Khanna discloses a voltage control module (See Figure 2 Number 236 and Paragraph 87) that is configured to apply different voltage margins for different types of workloads executed by a processor (See Paragraphs 30, 62-63, and 87-98).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to construct the device of Kolla using the machine learning techniques and different voltage margins for different workload types of Khanna to refine the voltage margin adjustment strategies, resulting in the invention of Claim 6, in order to yield the predictable result of proactively instead of reactively tuning the voltage margins for energy efficiency while minimizing and/or reducing the probability of voltage droop occurrence, thus optimizing between energy savings, probability of critical voltage droop occurrence, and acceptable performance loss (See Paragraphs 32, 87-88, and 98 of Khanna).
In reference to Claim 7, Kolla and Khanna disclose the limitations as applied to Claim 6 above. Khanna further discloses that the different types of workloads include at least one of: typical application workloads (See Paragraph 63 [typical demand]), worst-case profiled workloads, and worst-case pathological workloads (See Paragraph 62 [high demand]).
In reference to Claim 8, Kolla and Khanna disclose the limitations as applied to Claim 6 above. Kolla further discloses that the voltage control module is further configured to: maintain a first voltage margin when the minimum voltage levels are below a first threshold (See Figure 2 Number 208 and Paragraphs 17, 231, 24, and 27); switch to a second voltage margin when the minimum voltage levels are above a second threshold for a predetermined time period, wherein the second voltage margin is lower than the first voltage margin (See Figure 2 Number 214 and Paragraphs 17, 23, 24, and 27); switch to a third voltage margin when the minimum voltage levels are above a third threshold for a second predetermined time period, wherein the third voltage margin is lower than the second voltage margin (See Figure 2 Number 214 and Paragraphs 17, 23, 24, and 27 [voltage margin is adjusted in multiple steps]); and switch back to a higher voltage margin when the minimum voltage levels drop below any of the thresholds (See Figure 2 Number 208 and Paragraphs 17, 23, 24, and 27).
In reference to Claim 15, Kolla discloses the limitations as applied to Claim 9 above. Kolla does not explicitly disclose that the voltage control module is further configured to apply different voltage margins for different types of workloads executed by the processor. Khanna discloses a voltage control module (See Figure 2 Number 236 and Paragraph 87) that is configured to apply different voltage margins for different types of workloads executed by a processor (See Paragraphs 30, 62-63, and 87-98).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to construct the device of Kolla using the machine learning techniques and different voltage margins for different workload types of Khanna to refine the voltage margin adjustment strategies, resulting in the invention of Claim 15, in order to yield the predictable result of proactively instead of reactively tuning the voltage margins for energy efficiency while minimizing and/or reducing the probability of voltage droop occurrence, thus optimizing between energy savings, probability of critical voltage droop occurrence, and acceptable performance loss (See Paragraphs 32, 87-88, and 98 of Khanna).
In reference to Claim 16, Kolla discloses the limitations as applied to Claim 9 above. Kolla does not explicitly disclose that the voltage control module is further configured to incorporate machine learning techniques to refine voltage margin adjustment strategies based on historical data of voltage behavior and workload characteristics. Khanna discloses a voltage control module (See Figure 2 Number 236 and Paragraph 87) that is configured to incorporate machine learning techniques to refine voltage margin adjustment strategies based on historical data of voltage behavior and workload characteristics (See Paragraphs 32, 82-83, and 90-98).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to construct the device of Kolla using the machine learning techniques of Khanna to refine the voltage margin adjustment strategies, resulting in the invention of Claim 16, in order to yield the predictable result of proactively instead of reactively tuning the voltage margins for energy efficiency while minimizing and/or reducing the probability of voltage droop occurrence, thus optimizing between energy savings, probability of critical voltage droop occurrence, and acceptable performance loss (See Paragraphs 32, 87-88, and 98 of Khanna).
Conclusion
The art made of record and not relied upon is considered pertinent to applicant's disclosure.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to THOMAS J CLEARY whose telephone number is (571)272-3624. The examiner can normally be reached Monday-Friday 8AM-5PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrew Jung can be reached at 571-270-3779. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/THOMAS J. CLEARY/Primary Examiner, Art Unit 2175
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