Prosecution Insights
Last updated: September 17, 2026
Application No. 19/008,702

Pipelined Decoding Microarchitecture Design Method for RISC-V Vector Instructions

Final Rejection §112
Filed
Jan 03, 2025
Priority
Jan 25, 2024 — CN 202410102578.1
Examiner
HUISMAN, DAVID J
Art Unit
2183
Tech Center
2100 — Computer Architecture & Software
Assignee
Jiangsu Huachuang Microsystem Company Limited
OA Round
2 (Final)
58%
Grant Probability
Moderate
3-4
OA Rounds
2y 12m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 58% of resolved cases
58%
Career Allowance Rate
395 granted / 683 resolved
+2.8% vs TC avg
Strong +34% interview lift
Without
With
+33.9%
Interview Lift
resolved cases with interview
Typical timeline
4y 8m
Avg Prosecution
44 currently pending
Career history
771
Total Applications
across all art units

Statute-Specific Performance

§101
6.7%
-33.3% vs TC avg
§103
35.1%
-4.9% vs TC avg
§102
19.6%
-20.4% vs TC avg
§112
32.0%
-8.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 683 resolved cases

Office Action

§112
DETAILED ACTION Claims 1-8 have been examined. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Specification The specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. The amended disclosure is objected to because of the following informalities: In paragraph 3, “uses multiple registers as a register file that is cited as a single operand” is not understood. A register file is a collection of individual registers. The individual registers are generally known to be cited as operands. The examiner does not understand what it means for a register file to be cited as a single operand. Please reword. Appropriate correction is required. Drawing The replacement figure is objected to because the bottom of “information” is cut off in the 2nd to last step. A corrected drawing sheet in compliance with 37 CFR 1.121(d) is required in reply to the Office action to avoid abandonment of the application. Please ensure the replacement is in only black and white (as is the current figure of record) to avoid pixelation and further objection. The figure of an amended drawing should not be labeled as “amended.” Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawing will not be held in abeyance. Claim Objections/Recommendations Claim 1 is objected to because of the following informalities: In step S1, it appears that “and has been coded” can be deleted. All instructions are coded, so the examiner is not sure the purpose of this language. The examiner is also not sure if applicant is claiming that the packet is coded or that each instruction is coded. At the end of step S2, replace the comma with a semicolon. Are the splitting and storing steps immediately preceding step S4 part of step S3? If so, delete “and” on page 3, line 2, and insert --and-- at the end of the splitting step. It is important to know whether these are part of step S3 since S3 is claimed as being repeated in the 2nd to last paragraph. If they’re not part of step S3, are these steps being repeated? On page 4, line 6, it appears that applicant could delete “in S1” as the instruction fields have sufficient basis in S1. On page 4, in the paragraph prior to step S4, should “taking information of each microoperation” be replaced with --taking information of each microoperation of at least the subset of the plurality of microoperations-- (to match the beginning of the paragraph)? Or, is the information from a given microoperation used as control logic even if the given microoperation is not to be stored? In the last paragraph, applicant refers to “the split quantity”. Which split quantity is applicant referring to because there is a split quantity for each instruction, perp.4, lines 1-2? Claim 2 is objected to because of the following informalities: How can the configuration instruction (singular) comprise multiple instructions? Should the claim say --each configuration instruction comprises one of a vsetvl instruction, a vsetvli instruction, or a vsetivli instruction;--? Claim 5 is objected to because of the following informalities: In line 4, is applicant trying to claim “reading, in said step S3, the field information” or is applicant referring to the field information in said step S3? If the latter, it appears that “in S3” could be removed due to proper basis existing. If the former, the examiner recommends rewording as quoted above. Claim Interpretation At least one claim is identified as including non-limiting contingent limitations. “The broadest reasonable interpretation of a method (or process) claim having contingent limitations requires only those steps that must be performed and does not include steps that are not required to be performed because the condition(s) precedent are not met.” “The broadest reasonable interpretation of a system (or apparatus or product) claim having structure that performs a function, which only needs to occur if a condition precedent is met, requires structure for performing the function should the condition occur. The system claim interpretation differs from a method claim interpretation because the claimed structure must be present in the system regardless of whether the condition is met and the function is actually performed.” See MPEP 2111.04(II). Regarding claim 1, the last two paragraphs are mutually exclusive, i.e., the generated vtype information will only be one of (1) not identical to the predicted vtype information, or (2) identical to the predicted vtype information. As such, the claimed method only requires one of the last two paragraphs. For instance, any prior art teaching everything but the last paragraph would still anticipate the entire claim. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 1-8 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. In claim 1, 2nd to last paragraph, applicant claims entirely repeating steps S2, S3, and S4. Applicant argues that this is done until the vtype information generated after execution is identical to the predicted vtype information (p.9 of response filed on June 4, 2026). However, if applicant merely repeats steps S2 through S4, the same prediction as made in the first execution/iteration of steps S1 through S4 would presumably be made each time, and, thus, it would appear that the method would infinitely loop. The prior claim appears to have set forth that the prediction was actually replaced with something else, which means S3 would be acquiring different prediction data, not the same prediction data obtained in the first iteration. Thus, claim 1 appears to include new matter by simply repeating the exact same thing that previously occurred whereas the original claim required something different. Claims 2-8 are rejected due to their dependence on a claim lacking adequate written description. Allowable Subject Matter Claims 1-8 are allowed over the prior art. The following is a statement of reasons for the indication of allowable subject matter: Regarding claim 1, the prior art of record, either individually or in combination, has not taught, together with all other claimed features, the entirety of the claimed method through the determining step in the 3rd to last paragraph, plus either one of the last two paragraphs. In other words, the contingent limitations do not affect allowability because the examiner has been unable to find either of the last paragraphs in combination with the entirety of the method preceding the final two paragraphs. Response to Arguments Regarding argument 4 on p.8 of the response, the examiner does not understand the argument. Also, the language “in RVV, the operand of a vector instruction can correspond to a logical group formed by multiple physical vector registers, but only this group of registers is used as a whole during programming” does not match that in the specification - “uses multiple registers as a register file that is cited as a single operand”. The examiner does not understand what it means for a register file to be cited as an operand. Normally a register within the register file is cited as an operand. Thus, the objection is maintained. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to David J. Huisman whose telephone number is 571-272-4168. The examiner can normally be reached on Monday-Friday, 9:00 am-5:30 pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jyoti Mehta, can be reached at 571-270-3995. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /David J. Huisman/Primary Examiner, Art Unit 2183
Read full office action

Prosecution Timeline

Jan 03, 2025
Application Filed
Mar 11, 2026
Non-Final Rejection mailed — §112
May 05, 2026
Applicant Interview (Telephonic)
May 05, 2026
Examiner Interview Summary
Jun 04, 2026
Response Filed
Aug 28, 2026
Final Rejection mailed — §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12737304
DEVICE, METHOD AND SYSTEM FOR PRIORITIZING ENTRIES OF AN INSTRUCTION FETCH RESOURCE
3y 6m to grant Granted Sep 15, 2026
Patent 12730644
MECHANISM FOR EFFICIENT MASSIVELY-CONCURRENT CONDITIONAL COMPUTATION
5y 10m to grant Granted Sep 08, 2026
Patent 12717582
HIERARCHICAL THREAD SCHEDULING
6y 2m to grant Granted Aug 25, 2026
Patent 12705055
Repeat Instruction for Loading and/or Executing Code in a Claimable Repeat Cache a Specified Number of Times
4y 5m to grant Granted Aug 11, 2026
Patent 12693866
TRANSFORMING DATA WITHIN A QUEUING SYSTEM
4y 6m to grant Granted Jul 28, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

3-4
Expected OA Rounds
58%
Grant Probability
92%
With Interview (+33.9%)
4y 8m (~2y 12m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 683 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month