DETAILED ACTION
Notice of AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This action is responsive to the following communications: the Application filed January 6, 2025.
Claims 1-20 are pending. Claims 1, 11 and 17 are independent.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55 received on February 3, 2025.
Drawings
The drawings are objected to because:
Figures 1, 3 and 12-14 should be designated by a legend such as --Prior Art-- because only that which is old is illustrated. See MPEP § 608.02(g).
Applicant’s Figures 1, 3 and 12-14 are identical to U.S. 2023/0260560 Figures 1-4.
Corrected drawings in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. The replacement sheet(s) should be labeled “Replacement Sheet” in the page header (as per 37 CFR 1.84(c)) so as not to obstruct any portion of the drawing figures. If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification
Applicant is reminded of the proper language and format for an abstract of the disclosure.
The abstract should be in narrative form and generally limited to a single paragraph on a separate sheet within the range of 50 to 150 words in length. The abstract should describe the disclosure sufficiently to assist readers in deciding whether there is a need for consulting the full patent text for details.
The language should be clear and concise and should not repeat information given in the title. It should avoid using phrases which can be implied, such as, “The disclosure concerns,” “The disclosure defined by this invention,” “The disclosure describes,” etc. In addition, the form and legal phraseology often used in patent claims, such as “means” and “said,” should be avoided.
The abstract of the disclosure is objected to because it contains a phrase that can be implied (i.e. “Examples of the present disclosure”). A corrected abstract of the disclosure is required and must be presented on a separate sheet, apart from any other text. See MPEP § 608.01(b).
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. See MPEP 606.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-8, 10 and 17-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ha Sung Joo (KR 20120061572; hereinafter “Joo”).
Regarding independent claim 1, Joo discloses a memory (Fig. 2), comprising:
a memory string (Fig. 2: string comprising cells F0-FN) connected between a bit line (Fig. 2: BLe) and a source line (Fig. 2: CSL); and
a peripheral circuit (Fig. 2: 190, BS and PB1) comprising:
a first discharge circuit connected with the bit line and comprising a first discharge transistor (Fig. 2: BS connected to Ble comprising S1); and
a second discharge circuit connected with the source line and comprising a second discharge transistor (Fig. 2: 190 connected to CSL comprising S15);
wherein:
the first discharge circuit is configured to discharge the bit line through the first discharge transistor based on a first voltage received (Fig. 2: BS discharge the bit line through S1 based on DISE);
the second discharge circuit is configured to discharge the source line through the second discharge transistor based on a second voltage received (Fig. 2: 190 discharge CSL through S15 based on PRb).
As discussed above, Joo’s memory is substantially identical in structure to the claimed “memory,” where the differences reside only in the remaining limitations relating to function of “the second voltage is higher than the first voltage, and a discharge current outputted by the second discharge transistor is greater than a discharge current outputted by the first discharge transistor.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Joo’s memory appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Regarding claim 2, Joo discloses wherein the first discharge circuit further comprises a first switch transistor (Fig. 2: BS comprises S3);
a gate of the first switch transistor is configured to receive the first voltage (Fig. 2: gate of S3 receive BSLe), a first electrode of the first switch transistor is connected with the bit line (Fig. 2: first source/drain terminal of S3 connected to Ble), and a second electrode of the first switch transistor is connected with a first electrode of the first discharge transistor (Fig. 3: second source/drain terminal of S3 connected to first source/drain terminal of S1); and
a gate of the first discharge transistor is configured to receive a third voltage (Fig. 2: gate of S1 receive DISE), and a second electrode of the first discharge transistor is configured to be grounded (Fig. 2: second source/drain terminal of S1 connected to VIRPWR which is ground voltage during read operation).
Regarding claim 3, Joo discloses wherein the second discharge circuit further comprises a second switch transistor (Fig. 2: 190 comprises S14);
a gate of the second switch transistor is configured to receive the second voltage (Fig. 2: gate of S14 receive PR), a first electrode of the second switch transistor is connected with the source line (Fig. 2: first source/drain terminal of S14 connected to CSL), and a second electrode of the second switch transistor is connected with a first electrode of the second discharge transistor (Fig. 2: second source/drain terminal is electrically connected to first source/drain terminal of S15); and
a gate of the second discharge transistor is configured to receive a third voltage (Fig. 2: gate of S15 receive PRb), and a second electrode of the second discharge transistor is configured to be grounded (Fig. 2: second source/drain terminal of S15 is connected to VSS).
Regarding claim 4, Joo discloses the limitations with respect to claim 2.
As discussed above, Joo’s memory is substantially identical in structure to the claimed “memory,” where the differences reside only in the remaining limitations relating to function of “wherein the third voltage is equal to the first voltage.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Joo’s memory appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Regarding claim 5, Joo discloses the limitations with respect to claim 4.
As discussed above, Joo’s memory is substantially identical in structure to the claimed “memory,” where the differences reside only in the remaining limitations relating to function of “wherein the first voltage ranges from 1.75 volts (V) to 2.2 V, and the second voltage ranges from 3 V to 3.5 V.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Joo’s memory appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Regarding claim 6, Joo discloses the limitations with respect to claim 2.
As discussed above, Joo’s memory is substantially identical in structure to the claimed “memory,” where the differences reside only in the remaining limitations relating to function of “wherein the switch transistors comprises in the first discharge circuit and the second discharge circuit are high voltage transistors.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Joo’s memory appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Regarding claim 7, Joo discloses the limitations with respect to claim 1.
As discussed above, Joo’s memory is substantially identical in structure to the claimed “memory,” where the differences reside only in the remaining limitations relating to function of “wherein the first discharge transistor operates in a linear region, and the second discharge transistor operates in a saturation region.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Joo’s memory appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Regarding claim 8, Joo discloses wherein the peripheral circuit further comprises a page buffer (Fig. 2: PB1); and
transistors in the first discharge circuit are transistors in the page buffer (Fig. 2: transistors of BS are part of PB1).
Regarding claim 10, Joo discloses wherein transistors comprised in the first discharge circuit and the second discharge circuit are N-type transistors (Fig. 2: transistors S1-S4 and S14-S15 are implemented as NMOS transistors).
Regarding independent claim 17, Joo discloses a memory system (Fig. 1), comprising:
at least one memory (Fig. 1: 110), each comprising:
a memory string (Fig. 2: string comprising cells F0-FN) connected between a bit line (Fig. 2: Ble) and a source line (Fig. 2: CSL); and
a peripheral circuit (Fig. 2: 190, BS and PB1) comprising:
a first discharge circuit connected with the bit line and comprising a first discharge transistor (Fig. 2: BS connected to Ble comprising S1), and
a second discharge circuit connected with the source line and comprising a second discharge transistor (Fig. 2: 190 connected to CSL comprising S15);
wherein:
the first discharge circuit is configured to discharge the bit line through the first discharge transistor based on a first voltage received (Fig. 2: BS discharge the bit line through S1 based on DISE);
the second discharge circuit is configured to discharge the source line through the second discharge transistor based on a second voltage received (Fig. 2: 190 discharge CSL through S15 based on PRb); and
a controller coupled to the memory and configured to control the memory (Fig. 1: 120).
As discussed above, Joo’s memory system is substantially identical in structure to the claimed “memory system,” where the differences reside only in the remaining limitations relating to function of “the second voltage is higher than the first voltage, and a discharge current outputted by the second discharge transistor is greater than a discharge current outputted by the first discharge transistor.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Joo’s memory appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Regarding claim 18, Joo discloses wherein the first discharge circuit further comprises a first switch transistor (Fig. 2: BS comprises S3);
a gate of the first switch transistor is configured to receive the first voltage (Fig. 2: gate of S3 receive BSLe), a first electrode of the first switch transistor is connected with the bit line (Fig. 2: first source/drain terminal of S3 connected to Ble), and a second electrode of the first switch transistor is connected with a first electrode of the first discharge transistor (Fig. 3: second source/drain terminal of S3 connected to first source/drain terminal of S1); and
a gate of the first discharge transistor is configured to receive a third voltage (Fig. 2: gate of S1 receive DISE), and a second electrode of the first discharge transistor is configured to be grounded (Fig. 2: second source/drain terminal of S1 connected to VIRPWR which is ground voltage during read operation).
Regarding claim 19, Joo discloses wherein the second discharge circuit further comprises a second switch transistor (Fig. 2: 190 comprises S14);
a gate of the second switch transistor is configured to receive the second voltage (Fig. 2: gate of S14 receive PR), a first electrode of the second switch transistor is connected with the source line (Fig. 2: first source/drain terminal of S14 connected to CSL), and a second electrode of the second switch transistor is connected with a first electrode of the second discharge transistor (Fig. 2: second source/drain terminal is electrically connected to first source/drain terminal of S15); and
a gate of the second discharge transistor is configured to receive a third voltage (Fig. 2: gate of S15 receive PRb), and a second electrode of the second discharge transistor is configured to be grounded (Fig. 2: second source/drain terminal of S15 is connected to VSS).
Regarding claim 20, Joo discloses the limitations with respect to claim 17.
As discussed above, Joo’s memory system is substantially identical in structure to the claimed “memory system,” where the differences reside only in the remaining limitations relating to function of “wherein the first discharge transistor operates in a linear region, and the second discharge transistor operates in a saturation region.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Joo’s memory appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Allowable Subject Matter
Claim 9 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
With respect to claim 9, there is no teaching or suggestion in the prior art of record to provide the recited peripheral circuit further comprises a current supply, one end of the current supply being respectively connected with the first discharge circuit and the second discharge circuit, and the other end of the current supply being grounded and the current supply is configured to regulate the discharge current outputted to ground.
Claims 11-16 are allowed.
The following is an examiner’s statement of reasons for allowance:
With respect to independent claim 11, there is no teaching or suggestion in the prior art of record to provide the recited second voltage is higher than the first voltage, and a discharge current outputted by the second discharge transistor is greater than a discharge current outputted by the first discharge transistor, in combination with the other limitations.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALFREDO BERMUDEZ LOZADA whose telephone number is (571)272-0877. The examiner can normally be reached 7:00AM-3:30PM EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Alexander G Sofocleous can be reached at 571-272-0635. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/Alfredo Bermudez Lozada/ Primary Examiner, Art Unit 2825
Prosecution Insights