Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed 3/16/2026 have been fully considered but they are not persuasive.
“Prior art is not limited just to the references being applied, but includes the understanding of one of ordinary skill in the art. The prior art reference (or references when combined) need not teach or suggest all the claim limitations. The "mere existence of differences between the prior art and an invention does not establish the invention’s nonobviousness." Dann v. Johnston, 425 U.S. 219, 230, 189 USPQ 257, 261 (1976) The gap between the prior art and the claimed invention may not be "so great as to render the [claim] nonobvious to one reasonably skilled in the art."” (MPEP 2141 III.)
“If an applicant disagrees with any factual findings by the Office, an effective traverse of a rejection based wholly or partially on such findings must include a reasoned statement explaining why the applicant believes the Office has erred substantively as to the factual findings. A mere statement or argument that the Office has not established a prima facie case of obviousness or that the Office’s reliance on common knowledge is unsupported by documentary evidence will not be considered substantively adequate to rebut the rejection or an effective traverse of the rejection under 37 CFR 1.111(b). Office personnel addressing this situation may repeat the rejection made in the prior Office action and make the next Office action final. See MPEP § 706.07(a).” (MPEP 2141 IV.)
Applicant's arguments fail to comply with 37 CFR 1.111(b) because they amount to a general allegation that the claims define a patentable invention without specifically pointing out how the language of the claims patentably distinguishes them from the references.
Applicant's arguments do not comply with 37 CFR 1.111(c) because they do not clearly point out the patentable novelty which he or she thinks the claims present in view of the state of the art disclosed by the references cited or the objections made. Further, they do not show how the amendments avoid such references or objections.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim (US 2023/0063656).
In regards to claims 1 and 10, Kim teaches
A memory system, comprising: one or more memory devices; and a memory controller coupled with the memory devices and configured to: (fig. 1A, memory sub-system 110, memory devices 130/140, memory subsystem controller 115 and local media controller 135)
store a count of suspend operations [performed] received in response to suspend instructions; (fig. 1A, ¶42 counters 142 of the local media controller 135 can be used to track the number of suspend commands received. See also fig. 6, ¶81-82, steps 615, 620. Fig. 7, ¶100-101, steps 715, 720. Fig. 8, ¶113-114, steps 820 and 830)
after receiving a suspend instruction, perform a suspend operation upon determining that the count of the [performed] received suspend operations corresponding to a type of a current operation is less than or equal to a preset value corresponding to the type of the current operation. (Fig. 6, ¶78-95 the suspend command is received at step 615, the count is incremented in step 620, and the count is compared to a threshold at 630. If the count is below the threshold (i.e. less than or equal to a preset value) (No to step 630), then the suspend operation is performed (step 635), performs the operation for which the suspend operation was received, and then resumes the current erase operation at step 640. See also the similar operations of Fig. 7 and 8 and associated ¶96-116)
Kim may not specifically teach that the count is for performed suspend operations; as the counting operation happens directly after receiving the suspend command. However, Kim directly states in ¶78 “Although shown in a particular sequence or order, unless otherwise specified, the order of the processes can be modified. Thus, the illustrated embodiments should be understood only as examples, and the illustrated processes can be performed in a different order”, and ¶128 “It will be evident that various modifications can be made thereto without departing from the broader spirit and scope of embodiments of the disclosure”
Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to have been able to rearrange the order of the processes such that the counting of the suspend operations was moved to after the checking of the suspend threshold was not satisfied (i.e. thereby now counting the number of performed suspend commands, instead of just the number received), and adjusting the command threshold accordingly (i.e. reducing it by 1). This end result of this rearrangement for the performance of the system is exactly the same (i.e. the result is predictable and expected.). The courts have held that “the selection of any order of performing process steps is prima facie obvious in the absence of new or unexpected results (see MPEP 2144.04 IV. C.)
In regards to claims 2 and 11, Kim further teaches and/or makes obvious
wherein after receiving the suspend instruction the memory controller is further configured to: responsive to the count of the performed suspend operations corresponding to the type of the current operation being greater than the preset value corresponding to the type of the current operation, continue to perform the current operation without responding to the suspend instruction; (in accordance with the modification above for claim 1, fig. 6. Yes to step 630, and the current operation is continued to be performed without suspending)
upon performing the suspend operation in response to the suspend instruction when the count of the performed suspend operations corresponding to the type of the current operation is less than or equal to the preset value corresponding to the type of the current operation, add one to the count of the performed suspend operations corresponding to the type of the current operation and store the count in the memory controller. (in accordance with the modification above for claim 1, and fig. 6 if the threshold isn’t met (no to step 630) then the count would be increased and the suspend operation would be performed)
In regards to claim 3, Kim further teaches and/or makes obvious
the type of the current operation comprises any one of a program operation, an erase operation, or a read operation, and the suspend operation comprises one or more of a program suspend operation, an erase suspend operation, and a read suspend operation. (¶18 the current operation can be an erase operation that is suspended to perform a read or other non-erase memory operation)
In regards to claims 4 and 12, Kim further teaches and/or makes obvious
wherein the current operation comprises a program operation, the preset value comprises a maximum program suspend threshold, the performed suspend operations comprise performed program suspend operations, and the memory controller is configured to: during the program operation, receive the suspend instruction, determine a magnitude relationship between a count of the performed program suspend operations and the maximum program suspend threshold, and determine whether to perform the suspend operation in response to the suspend instruction. (¶72-73, the current operation being interrupted (suspended) can be a pre-program operation. in accordance with the modification above for claim 1, See fig. 6 step 615 a suspend instruction is received and the number of suspend operations (i.e. magnitude) is compared to the threshold (step 630), maximum suspend threshold to determine if the suspend operation is processed or not. ¶84 the threshold is set to be under a number of commands that could cause damage to the memory (i.e. a max allowable)
In regards to claims 5 and 13, Kim further teaches and/or makes obvious
wherein the current operation comprises an erase operation, the preset value comprises a maximum erase suspend threshold, the performed suspend operations comprise performed erase suspend operations, and the memory controller is configured to: during the erase operation, receive the suspend instruction, determine a magnitude relationship between a count of the performed erase suspend operations and the maximum erase suspend threshold, and determine whether to perform the suspend operation in response to the suspend instruction. (¶72-73, the current operation being interrupted (suspended) can be an erase operation. in accordance with the modification above for claim 1, See fig. 6 step 615 a suspend instruction is received and the number of suspend operations (i.e. magnitude) is compared to the threshold (step 630), maximum suspend threshold to determine if the suspend operation is processed or not. ¶84 the threshold is set to be under a number of commands that could cause damage to the memory (i.e. a max allowable)
In regards to claims 6 and 14, Kim further teaches and/or makes obvious
wherein the preset value comprises a maximum erase pulse suspend threshold, the performed suspend operations comprise performed erase pulse suspend operations, the memory controller is configured to: during the erase operation, receive the suspend instruction, determine a magnitude relationship between a count of the performed erase pulse suspend operations and the maximum erase pulse suspend threshold, and determine whether to perform the suspend operation in response to the suspend instruction, and the maximum erase pulse suspend threshold is less than or equal to the maximum erase suspend threshold. (¶72-73, the current operation being interrupted (suspended) can be an erase operation. in accordance with the modification above for claim 1, See fig. 6 step 615 a suspend instruction is received and the number of suspend operations (i.e. magnitude) is compared to the threshold (step 630), maximum suspend threshold to determine if the suspend operation is processed or not. ¶84 the threshold is set to be under a number of commands that could cause damage to the memory (i.e. a max allowable) due to a number of voltage stresses (i.e. max erase pulses). ¶76 and ¶86 teach that the erase pulse period can be tracked.
In regards to claims 7, 15 and 16 Kim further teaches and/or makes obvious
a control logic circuit coupled with a memory cell array of the memory devices, and configured to: receive the suspend instruction (¶42, fig. 1A local media controller 135, and erase operation manager can handle the received suspend commands)
determine a magnitude relationship between the count of the performed suspend operations corresponding to the type of the current operation and the preset value corresponding to the type of the current operation, control part of memory cells of the memory cell array to suspend in response to the suspend instruction, add one to the count of the performed suspend operations corresponding to the type of the current operation and store the count, or continue to perform the current operation, (see modification above for claim 1)
wherein the control logic circuit is further configured to: after an end of the suspend operation, receive a resume instruction, and control the part of memory cells of the memory cell array to resume an operation performed prior to the suspend operation in response to the resume instruction; (¶86, fig. 6 step 640, resume operations after suspending is performed in response to receiving a resume command after the operation that caused the suspend command has completed)
a buffer circuit coupled with the control logic circuit and comprising a plurality of registers, wherein the plurality of registers are configured to respectively store counts of performed suspend operations corresponding to different types of operations and preset values corresponding to the different types of operations. (¶42, fig. 1A counters(s) 142 and timer(s) 144 for suspend operations, along with fig. 1B, address register 114, status register 122, command register 124, data register 121 and cache register 118)
In regards to claims 8 and 17 Kim further teaches and/or makes obvious
further comprising an internal processor configured to perform at least one of: acquiring a working state of the memory device (fig. 1A, processor 117 of memory controller 115. ¶46 teaches that the memory controller 115 can receive status information (working state of the memory device)
and generate the suspend instruction and the resume instruction; (¶42 suspend operation are sent from the sub-system controller 115, ¶86, resume instruction can be received from the controller)
or after the control logic circuit resumes the operation performed prior to the suspend operation in response to the resume instruction for a duration of a first time period, judging whether the control logic circuit receives the suspend instruction. (¶89, fig. 6 step 645, the processing device can be alerted to terminate sending suspend commands, and/or the number of suspend command and the status of the counters/timers can be sent to the processing device (i.e. so it can make the “judgement” to send further suspend instructions)
In regards to claims 9 and 18 Kim further teaches and/or makes obvious
wherein the memory device comprises a NAND memory. (fig. 1A, ¶25, the memory device 130 can be NAND)
In regards to claim 19, is similar to claim 1 and rejected for the same reasons, with the addition of Kim further teaching
a host coupled with the memory system and configured to control the memory system. (fig. 1A host system 120)
In regards to claim 20, Kim further teaches and/or makes obvious
wherein the host configured to generate and send the suspend instruction or a resume instruction to the memory system. (¶43 the memory subsystem 115 can be a host. ¶42 suspend operation are sent from the sub-system controller 115, ¶86, resume instruction can be received from the controller)
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JASON W BLUST whose telephone number is (571)272-6302. The examiner can normally be reached 12-8:30 EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Hosain Alam can be reached at (571) 272-3978. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JASON W BLUST/Primary Examiner, Art Unit 2132
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