Prosecution Insights
Last updated: October 01, 2026
Application No. 19/012,272

SEMICONDUCTOR DEVICE INCLUDING I/O SYSTEM, AND METHOD OF OPERATING THE SAME

Final Rejection §DP
Filed
Jan 07, 2025
Priority
Mar 16, 2020 — provisional 62/990,298 +3 more
Examiner
WELLS, KENNETH B
Art Unit
2842
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
2 (Final)
86%
Grant Probability
Favorable
3-4
OA Rounds
1m
Est. Remaining
89%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
1239 granted / 1437 resolved
+18.2% vs TC avg
Minimal +2% lift
Without
With
+2.4%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 10m
Avg Prosecution
30 currently pending
Career history
1477
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
41.0%
+1.0% vs TC avg
§102
31.4%
-8.6% vs TC avg
§112
20.9%
-19.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1437 resolved cases

Office Action

§DP
DETAILED ACTION Response to Amendment 1. Applicant’s amendment filed on 09/14/26 has been received and entered in the case. The amendments to claim 1 are sufficient to overcome the previously applied prior art rejection and the arguments are sufficient to overcome the drawing objection and the rejections under 35 USC 112(a). Therefore, the only remaining rejection is the outstanding obviousness double patenting rejection which is set forth below. Double Patenting 2. Claims 1-3 and 5-21 are rejected on the ground of non-statutory double patenting as being unpatentable over the claims of U.S. Patent No. 11,201,618. Although the claims at issue are not identical, they are not patentably distinct from each other because the limitations of claims 1-20 of the present application, i.e., the limitations of the instant claims are either anticipated by or obvious from the claims of U.S. Patent 11,201,618. Specifically, note that the limitations of claim 1 of the present application are just a combination of claims 1, 2 and 16 of the '618 patent, i.e., it would have been obvious to one of ordinary skill in the art to combine the limitations of claims 1, 2 and 16 of the '618 patent so as to arrive at the input/output system recited in claim 1 of the present application; the limitations of claims 2, 3 and 6-8 of the present application are just a combination of claims 1, 2 and 9-16 of the '618 patent; as to claim 19, as noted above the limitation in this claim that the second gating signal has a second enabling-state duty cycle that has a shorter duration than a first enabling-state duty cycle of the first gating signal is not enabled by the specification and drawings of the present application, but it would have been obvious to one of ordinary skill in the art that the claimed first and second gating signals could have either the same duty cycle or different duty cycles, and therefore the limitations of claim 19 do not distinguish patentably over what is recited in claims 1, 2 and 9-16 of the '618 patent; the limitation of claim 5 of the present application would have been obvious from what is recited in claim 18 of the '618 patent, i.e., claim 18 of the '618 patent recites that the input buffer is coupled between the external terminal and a second node, and therefore the input buffer will inherently or obviously have its input coupled to the output of the output driver; the limitations of claims 6-8 of the present application are just a combination of claims 1, 2 and 9-16 of the '618 patent; the limitations of claim 9 would have been obvious from what is recited in claim 18 of the '618 patent, note that this claim recites the input buffer and the input level shifter, again note that the input buffer in claim 18 of the '618 patent will inherently or obviously have its input coupled to the output of the output driver, and the input level shifter of claim 9 of the present application will also inherently or obviously be coupled to an output of the input buffer; the limitations of claims 10 and 11 of the present application are anticipated by what is recited in claims 1-6 and 16 of the '618 patent; and the limitations of claims 12-20 of the present application are all anticipated by what is recited in claims 1, 2 and 9-16 of the '618 patent, similar to the limitations of claims 6-8 of the present application. The non-statutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A non-statutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on non-statutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a non-statutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Allowable Subject Matter 3. Claims 1-3 and 5-21 would be allowable upon the filing of the above-noted terminal disclaimer. The following is a statement of reasons for the indication of allowable subject matter: none of the prior art of record discloses or suggests the input/output (I/O) system of claim 1 with the newly added limitations recited on the last five lines thereof; nor does any of the prior art of record disclose or suggest an input/output (I/O) system comprising an output level shifter, an output driver and a gating signal generator wherein the output driver gating signal provided by the gating signal generator is based on a logic operation on first and second signals, the first and second signals being signals as recited on the last four lines of claim 12; nor does any of the prior art of record disclose or suggest a method of operating an input/output (I/O) system comprising the delaying, inverting, performing and providing steps recited in independent claim 15. Action is Final 4. THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Conclusion 5. Any inquiry concerning this communication or earlier communications from the examiner should be directed to KENNETH B WELLS whose telephone number is (571)272-1757. The examiner can normally be reached Monday-Friday, 8:30am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, REGIS J BETSCH, can be reached at (571)270-7101. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /KENNETH B WELLS/Primary Examiner, Art Unit 2836 September 22, 2026
Read full office action

Prosecution Timeline

Jan 07, 2025
Application Filed
May 13, 2026
Non-Final Rejection mailed — §DP
Sep 10, 2026
Examiner Interview Summary
Sep 10, 2026
Applicant Interview (Telephonic)
Sep 14, 2026
Response Filed
Sep 24, 2026
Final Rejection mailed — §DP (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
86%
Grant Probability
89%
With Interview (+2.4%)
1y 10m (~1m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 1437 resolved cases by this examiner. Grant probability derived from career allowance rate.

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