DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Species A claim 1-5 and 7-21 in the reply filed on 2/27/2026 is acknowledged.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-5, 7-8 and 20-21 are rejected under 35 U.S.C. 103 as being unpatentable over Jung (US 2022/0225481) in view of Lee (US 2025/0193980).
Regarding claims 1,and 20-21 which recites similar language, Jung teaches A display apparatus comprising: a display panel including a pixel circuit; (Fig. 6 display 1000) a gate driver which outputs a gate signal to the pixel circuit (Fig. 6 gate driver 830); and a data driver which outputs a data voltage to the pixel circuit (Fig. 6 data driver 820), wherein the pixel circuit comprises: a first transistor including a control electrode connected to a first node, a first electrode connected to a second node and a second electrode connected to a third node (Fig. 7 driving transistor 321);
a second transistor which applies a data voltage to the first transistor (Fig. 7 transistor 323); a third transistor connected to the first node and the third node (Fig. 7 transistor 322 connected across driving transistor forming the third node and first node is formed at the control node of driving transistor 321);
a seventh transistor connected to a fourth node (control node of transistor), wherein the seventh transistor applies a driving current to a light emitting element (Fig. 7 transistor 311) ; a ninth transistor which applies a constant-current voltage to the fourth node (Fig. 7 ; and the light emitting element which emits a light based on the data voltage and the constant-current voltage (Fig. 7 LED 200-1),
wherein the first transistor is a P-type transistor (Fig. 7 shows that driving transistor 321 is p-type), and
wherein the seventh transistor is a P-type transistor (Fig. 7 shows that driving transistor 321 is p-type). Although Jung teaches the limitations above, and it is known in the art that pixel circuit can function using combinations of N-type and P-type transistors, Jung does not teach wherein the second transistor is an N-type transistor, wherein the third transistor is an N-type transistor.
However in the field of manufacturing a pixel circuit by PWM circuit and a constant current, Lee teaches a second transistor is an N-type transistor, wherein a third transistor is an N-type transistor (switching transistor T1, T2, and SWT connected to driving transistors DRTsg and DRTccg. Where T1,T2,SWT are N-type transistors while DRTsg and DRTccg are P-type transistor).
Therefore it would have obvious to one of ordinary skill in the art to combine the device as taught by Jung with the pixel design choice as taught by Lee. This combination would help reduce the falling time of a constant current as taught by Lee [0005-0007].
Regarding claim 2, Jung teaches a sixth transistor including a control electrode which receives a first initialization signal, a first electrode connected to the first node and a second electrode connected to a first initialization voltage terminal (Fig. 7 transistor 352).
Regarding claim 3, Jung teaches further comprising a first capacitor including a first electrode which receives a sweep signal and a second electrode connected to the first node (Fig. 7 transistor 341).
Regarding claim 4, Jung teaches a fourth transistor including a control electrode which receives an emission signal, a first electrode which receives a first power voltage and a second electrode connected to the second node (Fig. 7 transistor 331); and
a fifth transistor including a control electrode which receives the emission signal, a first electrode connected to the third node and a second electrode connected to the fourth node (Fig. 7 transistor 332).
Regarding claim 5, Jung teaches an eighth transistor including a control electrode which receives an emission signal, a first electrode connected to a second electrode of the seventh transistor and a second electrode connected to an anode electrode of the light emitting element (Fig. 7 transistor 333).
Regarding claim 7, Jung teaches a tenth transistor including a control electrode which receives a second initialization signal, a first electrode connected to an anode electrode of the light emitting element and a second electrode which receives a second initialization voltage (Fig. 7 transistor 354).
Regarding claim 8, Jung teaches a second capacitor including a first electrode which receives a second power voltage and a second electrode connected to the fourth node (Fig. 7 transistor 342).
Allowable Subject Matter
Claims 9-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claim 9 is objected to for the functions of the transistors based on the connection in the pixel circuit.
Claim 19 is indicated allowable for the second power voltage, third power voltage, and second initialization voltage as well as their function.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDRE L MATTHEWS whose telephone number is (571)270-5806. The examiner can normally be reached Mon-Fri 9:00-6:00.
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/ANDRE L MATTHEWS/ Primary Examiner, Art Unit 2621
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