DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 20-26 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
The recitation of “a second chip including: a third bonding pad connected to the first bonding pad; a fourth bonding pad connected to the fourth bonding pad; and a sense amplifier unit including a first transistor connected to the first bit line through the first bonding pad and the third bonding pad and a second transistor connected to the second bit line through the second bonding pad and the fourth bonding pad.” in claims 20 and 26 are not disclosed in the specification or shown in any of the drawings.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 20-26 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 20 recites the limitation of “a fourth bonding pad connected to the fourth bonding pad” in line 12 and claim 26 recites the limitation of “a fourth bonding pad in direct contact with the fourth bonding pad” in line 12. It is unclear what bonding pad a fourth bonding pad is connected to because the claims recite a fourth bonding pad is connected to itself.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 20 and 26 are rejected under 35 U.S.C. 103 as being unpatentable over Son et al. (US 2021/0090922, hereinafter “Son”) in view of Kim et al. (US 2021/0233900, hereinafter “Kim”).
Regarding claims 20 and 26, Son discloses a memory device, comprising:
a first chip including:
a first memory cell and a second memory cell, each of the first memory cell and the second memory corresponding to a column address;
a first bit line (Abstract, lines 4-5, a first memory cell connected to a first one of the bitlines) connected to the first memory cell;
a first bonding pad connected to the first bit line (Abstract, lines 6-7) the first one of the bitlines connected to a first one of the first bonding pad;
a second bit line (Abstract, lines 4-5, a second memory cell in the bitlines connected to a second one of the bitlines) connected to the second memory cell; and
a second bonding pad connected to the second bit line (Abstract, lines 6-7); and
a second chip including (Abstract, lines 9-10):
a third bonding pad (Abstract, lines 12-13, a fourth bonding pad) connected to the first bonding pad;
a fourth bonding pad (Abstract, lines 13-14, a fifth bonding pad) connected to the fourth bonding pad.
Son does not disclose “a sense amplifier unit including a first transistor connected to the first bit line through the first bonding pad and the third bonding pad and a second transistor connected to the second bit line through the second bonding pad and the fourth bonding pad.”. However, Kim discloses a sense amplifier (a sense amplifier has at least two transistors) connected to a first and second bit-line hookup bonding pads (paragraph [0070]) to sense the data signals from the memory cells of the memory device. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to use a sense amplifier from a second chip to connect to the bit lines of a first memory chip through the bonding pads to sense the data signals from the memory cells in a memory device.
Claim 21 is rejected under 35 U.S.C. 103 as being unpatentable over Son in view of Kim as applied to claim 20 above, and further in view of Hosomura (US 2021/0057028)
Regarding claim 21, Kim does not disclose that the first bit line is disposed between the first memory cell and the sense amplifier unit in a vertical direction and the second bit line is disposed between the second memory cell and the sense amplifier unit in the vertical direction. However, Hosomura discloses the bit lines BL are disposed between the memory cells and the sense amplifier in a vertical direction (Fig. 17 and paragraph [0108]) to improve the speeds of data reading, data writing and data erasing.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to dispose the bit lines BL between the memory cells and the sense amplifier in a vertical direction to improve the speeds of data reading, data writing and data erasing.
Regarding claim 22, Kim discloses the memory device according to claim 20, wherein the first bit line and the second bit line both extend along a lateral direction, and are spaced apart from each other along the lateral direction (paragraph [0091], lines 7-9]).
Regarding claim 23, Kim discloses the memory device according to claim 22, wherein the first chip includes: a first word line connected to the first memory cell and extending along the lateral direction; and a second word line connected to the second memory cell and extending along the lateral direction (paragraph [0091]).
Regarding claim 25, Son (Fig. 6) shows the memory device according to claim 20, wherein the first chip includes: a plurality of third memory cells corresponding to the same column address of the first memory cell; and a plurality of fourth memory cells corresponding to the same column address of the second memory cell.
Conclusion
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/HUAN HOANG/ Primary Examiner, Art Unit 2827
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