DETAILED ACTION
This non-final action is responsive to the following communications: application filed on 01/10/2025.
Claims 1-20 are pending. Claims 1, and 11 are independent.
Examiner Notes
A) Per MPEP 2111 and 2111.01, the claims are given their broadest reasonable interpretation and the words of the claims are given their plain meaning consistent with the specification without importing claim limitations from the specification. B) Per MPEP 2173.04 “If the claim is too broad because it reads on the prior art, a rejection under either 35 U.S.C. 102 or 103 would be appropriate”. D) Examiner cites particular paragraphs or columns and lines in the references as applied to Applicant's claims for the convenience of the Applicant. Other passages and figures may apply as well. Per MPEP 2141.02 VI prior art must be considered in its entirety. E) Per MPEP 2112 and 2112 V, express, implicit, and inherent disclosures of a prior art reference may be relied upon in the rejection of claims under 35 U.S.C. 102 or 103.
Notice of Pre-AIA or AIA Status
3. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
No Priority
4. See ADS, no priority is in the record.
Information Disclosure Statement
5. IDS filed on 01/10/2025 has been considered by the examiner.
Claim Rejections - 35 USC § 112
6. The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION. — The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
7. Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
7a. Claim 1 (lines 16-17) and claim 11 (lines 19-20) recite “…standard deviations of two adjacent PV states having a read valley in between…” which is unclear and vague in context of the claim functions since it is not clear if the adjacent PV states are related to the previously indicated PV thresholds (RT1, RT2) in antecedent limitations or are setting forth new adjacent PV states. For the purpose of art rejection, the adjacent PV states will be treated as previously used PV thresholds/ states.
7b. Claim 1 (lines 12-13) and claim 11 (lines 14-15) incorrectly recite "determine a mean μ and a standard deviation σ of a NAND PV state" is not understood since in light of spec it appears that a number of PV states are being implied in this functional context (See Fig. 11A disclosure). For this reason, the claim is inconsistent with the disclosure, the applied prior art (see art rejections), and the way a person skilled in the art would understand the subject matter. see MPEP 2173.02(II).
7c. Claim 4 (lines 4-7) and claim 14 (lines 5-8) describe equation for optimal read threshold which is ambiguous, vague, and not readable; and fails definiteness requirement. See MPEP2173.02.
7d. Claim 2 (lines 1-4) recite “…PV state is determined with the equations…” and claim 12 (lines 3-5) recite “…calculate…PV state...with the equations…” and the “equations” are not fully described in claims (e.g., both sides of equation missing). Thus, the limitations is/are ambiguous, vague, and not readable; and fails definiteness requirement. See MPEP2173.02.
7e. Claims 1 (line 5) recite the limitation "reading pages of the data from the memory". There is insufficient antecedent basis for this limitation “the data” in the claim, as the claim does not previously state that the memory stores data in pages. It is suggested that antecedent limitations be modified to state that "memory stores data in a plurality of pages" and that "the data is read from a selected plurality of pages". Similarly, claim 11 (line 7) recite “…reading pages of data…” lacks clarity and it is suggested that antecedent limitations be modified to state that "memory stores data in a plurality of pages" and that "the data is read from a selected plurality of pages".
7f. Claim 11 (lines 17-18) recites “…parameters parameters…” which is ambiguous and vague.
See art rejection of independent claims for the interpretations of limitations in this rejection.
All dependent claims inclusive of claims 1-20 are rejected under this category.
Applicant is requested to check other claim, specification, disclosure informality. Requested to check language issues (e.g. antecedent issues, redundant limitation issues, grammar issues, spec congruence with con application etc.) for all claims and disclosure to expedite prosecution since informality scrutiny in this office action is not exhaustive and applicant’s co-operation is sought in this regard.
8a. Claims 1 and 11 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being incomplete for omitting essential elements, such omission amounting to a gap between the elements. Such omission is tantamount to omitting essential structural cooperative relationships of elements also. See MPEP § 2172.01. A claim which omits subject matter disclosed to be essential to the invention as described in the specification or in other statements of record may be rejected as failing to claim the subject matter that the inventor or a joint inventor regards as the invention. See In re Mayhew, 527 F.2d 1229, 188 USPQ 356 (CCPA 1976); In re Venezia, 530 F.2d 956, 189 USPQ 149 (CCPA 1976); and In re Collier, 397 F.2d 1003, 158 USPQ 266 (CCPA 1968). Such essential matter may include missing elements (circuitry components essential for function), steps or necessary structural cooperative relationships of elements described by the applicant(s) as necessary to practice the invention. For example, for In re Mayhew, the Court of Customs and Patent Appeals (CCPA) held that claims were not enabled under 35 U.S.C. § 112 because they omitted a cooling bath and its specific location, which were deemed essential elements based on the specification. The court found that the specification indicated these elements were critical for the invention to function as described, and their omission from the claims rendered them not supported by an enabling disclosure.
Omitted elements and omitted essential structural cooperative relationships of elements for claims 1, and 11 (in association with highlighted limitations) are described in bold:
Claim 1. A method for estimating parameters for reading data from a memory having a plurality of NAND program-voltage (PV) states (See claim 11 analysis)
controller functions (See claim 11 analysis)
using a deep neural network (DNN) to infer a soft read interval Δ and LLR values, wherein the DNN takes, as an input, parameters (μ.sub.1, σ.sub.1) and (μ.sub.2, σ.sub.2) corresponding to respective means and standard deviations of two adjacent PV states having a read valley in between (See claim 11 analysis)
Claim 11. A memory system, comprising: a storage having a plurality of NAND program-voltage (PV) states therein (Missing elements are description of page structures LSB, CSB, MSB and MLC/ TLC data structure. Overall arrangement of the apparatus and function is unclear and vague without these circuitry features and descriptions)
a controller in communication with the storage (Missing elements are description of controller to calculate the mean and standard deviation of NAND PV states)
use a deep neural network (DNN) to infer a soft read interval Δ and LLR values, wherein the DNN takes, as an input, parameters parameters (μ.sub.1, σ.sub.1) and (μ.sub.2, σ.sub.2) corresponding to respective means and standard deviations of two adjacent PV states having a read valley in between (Missing element is described in the specification which makes clear that optimal soft read thresholds and LLR values need to be used for LDPC soft decoding in order to achieve higher reliability of the NAND/SSD. See para [0070], para [0057], para [0035]. Therefore, the claims fail to further describe (missing element) that the values are used by the LDPC to ensure that the read data is decoded correctly. In order to overcome this, applicant must amend claims to include using these values that would provide some utility to the memory and/or computer system (i.e. such as being used by a LDPC to improve memory correction capabilities.) Without these descriptions mentioned, scope of claimed functional limitation is vague, unclear)
See art rejection of independent claims for the interpretations of limitations.
8b. All dependent claims inclusive of claims 1-20 are rejected under this category.
Claim Rejections - 35 USC § 103
9. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
10. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
11. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or non-obviousness.
12. Claims 1, and 11 is/are rejected under 35 U.S.C. 103 as being obvious over LU et al. (US 2020/0218596 A1), in view of Zhang et al. (US 2022/0231700 A1).
Regarding independent claim 1, LU and Zhang teach a method for estimating parameters for reading data from a memory having a plurality of NAND program-voltage (PV) states, comprising: determining respective counts of memory cell read patterns obtained by reading pages of the data from the memory with corresponding pre-determined read thresholds, wherein for a NAND PV state, two thresholds (RT1 and RT2) are obtained according to used page read thresholds; based on the respective counts of the memory cell read patterns, determining corresponding survival function values (SF1 and SF2); using the two read thresholds (RT1 and RT2) and the corresponding survival function values (SF1 and SF2) to determine a mean μ and a standard deviation σ of a NAND PV state; and using a deep neural network (DNN) to infer a soft read interval Δ and LLR values, wherein the DNN takes, as an input, parameters (μ.sub.1, σ.sub.1) and (μ.sub.2, σ.sub.2) corresponding to respective means and standard deviations of two adjacent PV states having a read valley in between.
(This claim is drafted as in method format, substantially identical to the functionality recited in claim 11, and is therefore rejected for the same reasons as claim 11).
Regarding independent claim 11, LU teaches a memory system (Fig. 1A: 100), comprising:
a storage (Fig. 1A: 150 non-volatile solid state memory array) having a plurality of NAND program-voltage (PV) states therein (Fig. 2 and para [0028]: state 0…state 3); and
a controller (Fig. 1B: 140B “error management unit”) in communication with the storage (Fig. 1A: 150) and
configured to determine respective counts of memory cell read patterns (Fig. 4: 1s and 0s. See Fig. 3: 302, Fig. 4 in context of para [0032]-para [0034]) obtained by reading pages of data (para [0032]: “target page”) from the memory with corresponding pre-determined read thresholds (Fig. 4: R0-R1-R2, para [0032], para [0034]: “predetermined voltage threshold level”),
wherein for a NAND PV state, two thresholds (RT1 and RT2) are obtained according to used page read thresholds (See Fig. 4: 1s and 0s. See para [0032] - para [0034]);
based on the respective counts of the memory cell read patterns, determine corresponding survival function values (SF1 and SF2) (Fig. 4 in context of para [0034]: “zones” within areas of 1s and 0s);
use the two read thresholds (RT1 and RT2) and the corresponding survival function values (SF1 and SF2) to determine a mean μ and a standard deviation σ of a NAND PV state (Fig. 3: 306 and Fig. 4 in context of para [0034]: states (e.g., 111, 011…) are returned using zones and distribution in Fig. 4).
LU teaches using Fig. 1B: 146 “statistical analysis” unit to further perform calculation for PV state read parameter, and LLR calculation (para [0034], para [0041]-para [0042]).
LU is silent with respect to using DNN for generating soft read interval Δ and LLR values.
Zhang teaches -
use a deep neural network (DNN) (Fig. 8: 820 DNN. Para [0019]) to infer a soft read interval Δ (Bin or zone separations, see Fig. 6-Fig. 11) and LLR values (Fig. 8, Fig. 9: 970, Fig. 11: LLR value for each Bin or zone), wherein the DNN takes, as an input, parameters parameters (μ.sub.1, σ.sub.1) and (μ.sub.2, σ.sub.2) corresponding to respective means and standard deviations of two adjacent PV states having a read valley in between (Fig. 6-Fig. 11 inputs and outputs are inclusive of this limitation).
LU and Zhang are in the same field of endeavor of nand flash memory system read operation, read error correction and they are in analogous field of art.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to combine the teachings of Zhang into the teachings of LU such that DNN calculations can be incorporated in LDPC decoding to increase efficiency of error correction method (Zhang para [0003])
Prior Art Not Relied Upon
The prior art made of record and not relied upon (MPEP § 707.05) is considered pertinent to applicant's disclosure: KIM et al. (US 2017/0097868 A1): Fig. 1-Fig. 9 disclosure applicable for all claims. JEON (US 2016/0266969 A1): Fig. 1-Fig. 8B disclosure applicable for all claims. KIM (US 2022/0165338 A1): Fig. 1-Fig. 15 disclosure applicable for all claims. Khakifirooz et al. (US 2021/0294698 A1): Fig. 1-Fig. 9 disclosure applicable for all claims. Khakifirooz teaches a system (Fig. 9: 140 system. See Fig. 1-Fig. 9 for illustrated components and functionality) comprising: a memory device (Fig. 1: 142); and a processing device (Fig. 1: 144 device controller) operatively coupled to the memory device (Fig. 1: 142) and configured to perform operations (Fig. 7: read operation and data transfer method) comprising: performing, based on a first strobe setting (Fig. 2 in context of para [0019]: using a first strobe of “3-strobe soft-read”. See e.g., Fig. 2: left strobe), a first batch of read operations on a cell of the memory device (Fig. 2: first soft bits) using a threshold (para [0019]: using Ri level) read voltage (see Fig. 2 in context of para [0019]: generate soft bits); determining, based on data read from the cell that is stored in a buffer associated with the memory device, a first likelihood value that the data read from the cell corresponds to original data written to the cell (para [0019]: indication for “low confidence” associated with first soft bits); performing, based on a second strobe setting (para [0019]: using a second strobe of “3-strobe soft-read”. See e.g., Fig. 2: right strobe), a second batch of read operations on the cell (Fig. 2: second soft bits) using the threshold read voltage (para [0019]: using Ri level), wherein the second batch of read operations is a subset of the first batch of read operations (soft read performed on same cell or set of cells); determining, based on binary outputs of the second batch of read operations, a second likelihood value that the data read from the cell corresponds to the original data written to the cell (para [0019]: indication for “low confidence” associated with second soft bits); determining an overall likelihood value (para [0019]: hard bits with “high confidence value”) that the data read from the cell corresponds to the original data written to the cell based on the first likelihood value and the second likelihood value (Fig. 2 in context of para [0019]).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MUSHFIQUE SIDDIQUE whose telephone number is (571)270-0424. The examiner can normally be reached 7:00 am-4:00 pm.
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/MUSHFIQUE SIDDIQUE/Primary Examiner, Art Unit 2825
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