DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgement is made that the instant application claims priority from JP 2024-028027, filed on 2/28/2024.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 6-8, 10, 19, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Sato et al. (US Patent No. 5,608,492, Sato hereinafter) in view of Miyata (US PGPub 2015/0222076) in view of Moshayedi et al. (US PGPub 2010/0205348, Moshayedi hereinafter).
Regarding claim 1, Sato discloses a controller comprising a processor, a volatile memory, a nonvolatile memory, and configured to control a laser device (Figs. 2, 3, 15, col. 4, lines 13-38, the illumination controller includes CPU 20, RAM 22, ROM 21),
the processor being configured to store a parameter of the laser device in the volatile memory when receiving power (Figs. 2, 3, 15, col. 4, lines 13-38, col. 18, lines 32-42, col. 19, lines 63-67, col. 20, lines 1-10, col. 21, lines 37-45, the CPU writes data to the RAM 22, including laser parameters). Sato does not appear to explicitly describe a capacitor and receiving power supply from outside the controller, when the power supply from outside is stopped, store, in the nonvolatile memory, the parameter stored in the volatile memory and information indicating a duration time of power supply from the capacitor while receiving the power supply from the capacitor.
Miyata discloses a processor (Figs. 1, 2, 7, 9, para. [0021], the control unit 10 comprises a central processing unit CPU), a volatile memory (Figs. 1, 2, 7, 9, para. [0021], control unit 10 comprises a random access memory RAM), a nonvolatile memory (Figs. 1, 2, 7, 9, paras. [0021], [0034]-[0035], control unit 10 comprises a read-only memory ROM and a nonvolatile storage unit 22), the processor being configured to store data in memory when receiving power supply from outside the controller (Figs. 1, 2, 7, 9, paras. [0021], [0034]-[0035], [0037]-[0038], [0047], data is stored in the storage unit 22, and power source unit 20 supplies power to the gas laser system).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included receiving power supply from outside the controller as taught by Miyata with the controller as taught by Sato since including receiving power supply from outside the controller is commonly used to provide a reliable power source to power different components of the laser system (Miyata, paras. [0021]-[0022]).
Sato as modified by Miyata does not appear to explicitly describe a capacitor and when the power supply from outside is stopped, store, in the nonvolatile memory, the parameter stored in the volatile memory and information indicating a duration time of power supply from the capacitor while receiving the power supply from the capacitor.
Moshayedi discloses a capacitor (Figs. 2, 9, para. [0018], capacitor backup supply module 200 and capacitor 210), and when the power supply from outside is stopped, store, in the nonvolatile memory, the parameter stored in the volatile memory and information indicating a duration time of power supply from the capacitor while receiving the power supply from the capacitor (Figs. 1-9, abstract, paras. [0016]-[0018], [0020], [0023], [0029]-[0030], [0039], [0043], [0061]-[0062], [0066]-[0067], [0071]-[0075], [0081]-[0085], when the primary power source no longer supplies power, data is moved from the volatile memory to the non-volatile memory while the controller is powered by capacitor, and the charger and monitor 220 charge the capacitor and determine the state of health of the capacitor to determine time the backup power can be supplied).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included a capacitor and when the power supply from outside is stopped, store, in the nonvolatile memory, the parameter stored in the volatile memory and information indicating a duration time of power supply from the capacitor while receiving the power supply from the capacitor as taught by Moshayedi in the controller as taught by Sato as modified by Miyata since a capacitor and when the power supply from outside is stopped, store, in the nonvolatile memory, the parameter stored in the volatile memory and information indicating a duration time of power supply from the capacitor while receiving the power supply from the capacitor is commonly used to provide an inexpensive backup power source that prevents a loss of data and that is reliable by providing state-of-health information (Moshayedi, paras. [0004], [0017]-[0018], [0039], [0067], [0071]).
Regarding claim 6, Sato as modified by Miyata in view of Moshayedi discloses wherein the parameter includes any one of a set value for operating the laser device and a measurement value acquired from a measurement instrument of the laser device (Sato, Figs. 2, 3, 15, col. 4, lines 13-38, col. 18, lines 32-42, col. 19, lines 63-67, col. 20, lines 1-10, col. 21, lines 37-45, the CPU writes data to the RAM 22, including laser parameters that include the charge voltage for the laser).
Regarding claim 7, Sato as modified by Miyata in view of Moshayedi discloses wherein the processor reads out the information indicating the duration time stored in the nonvolatile memory when the power supply from outside is resumed (Moshayedi, Figs. 1-9, abstract, paras. [0004]-[0006], [0016]-[0018], [0020], [0023], [0029]-[0030], [0039], [0043], [0061]-[0062], [0066]-[0067], [0071]-[0078], [0084]-[0085], the charger and monitor determines the state of health of the capacitor to determine time the backup power can be supplied, and controller 110 reports if the module can handle a power loss event when the primary power source is again available).
Regarding claim 8, Sato as modified by Miyata in view of Moshayedi discloses wherein the processor causes a display to display the information indicating the duration time (Moshayedi, Figs. 1-9, paras. [0066]-[0067], 0016]-[0018], [0020], [0023], [0029]-[0030], [0071]-[0078], [0081]-[0085], visual indicators display information regarding the state of health of the backup power supply).
Regarding claim 10, Sato as modified by Miyata in view of Moshayedi discloses wherein the processor determines deterioration of the capacitor based on the information indicating the duration time stored in the nonvolatile memory when the power supply from outside is resumed (Moshayedi, Figs. 1-9, abstract, paras. [0004]-[0006], [0016]-[0018], [0020], [0023], [0029]-[0030], [0039], [0043], [0061]-[0062], [0066]-[0067], [0071]-[0078], [0084]-[0085], the charger and monitor determines the state of health of the capacitor to determine time the backup power can be supplied, and controller 110 reports if the module can handle a power loss event when the primary power source is again available).
Regarding claim 11, Sato as modified by Miyata in view of Moshayedi discloses wherein the processor causes a display to display a determination result of the deterioration of the capacitor (Moshayedi, Figs. 1-9, paras. [0066]-[0067], 0016]-[0018], [0020], [0023], [0029]-[0030], [0071]-[0078], [0081]-[0085], visual indicators display information regarding the state of health of the backup power supply).
Regarding claim 19, Sato discloses a laser device (Figs. 2, 3, 15, col. 3, lines 56-67, col. 4, lines 13-38, excimer laser 1) comprising an oscillator configured to output laser light (Figs. 2, 3, 15, col. 3, lines 56-67, col. 4, lines 13-38, excimer laser 1 outputs laser light pulses), and a controller configured to control the oscillator (Figs. 2, 3, 15, col. 4, lines 13-38, the illumination controller controls the laser 1),
the controller including a processor (Figs. 2, 3, 15, col. 4, lines 13-38, the illumination controller includes CPU 20), a volatile memory (Figs. 2, 3, 15, col. 4, lines 13-38, RAM 22), a nonvolatile memory (Figs. 2, 3, 15, col. 4, lines 13-38, ROM 21),
the processor being configured to store a parameter of the laser device in the volatile memory when receiving power (Figs. 2, 3, 15, col. 4, lines 13-38, col. 18, lines 32-42, col. 19, lines 63-67, col. 20, lines 1-10, col. 21, lines 37-45, the CPU writes data to the RAM 22, including laser parameters). Sato does not appear to explicitly describe a capacitor, receiving power supply from outside the controller, and when the power supply from outside is stopped, store, in the nonvolatile memory, the parameter stored in the volatile memory and information indicating a duration time of power supply from the capacitor while receiving the power supply from the capacitor.
Miyata discloses a processor (Figs. 1, 2, 7, 9, para. [0021], the control unit 10 comprises a central processing unit CPU), a volatile memory (Figs. 1, 2, 7, 9, para. [0021], control unit 10 comprises a random access memory RAM), a nonvolatile memory (Figs. 1, 2, 7, 9, paras. [0021], [0034]-[0035], control unit 10 comprises a read-only memory ROM and a nonvolatile storage unit 22), the processor being configured to store data in memory when receiving power supply from outside the controller (Figs. 1, 2, 7, 9, paras. [0021], [0034]-[0035], [0037]-[0038], [0047], data is stored in the storage unit 22, and power source unit 20 supplies power to the gas laser system).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included receiving power supply from outside the controller as taught by Miyata with the controller of the laser device as taught by Sato since including receiving power supply from outside the controller is commonly used to provide a reliable power source to power different components of the laser system (Miyata, paras. [0021]-[0022]).
Sato as modified by Miyata does not appear to explicitly describe a capacitor and when the power supply from outside is stopped, store, in the nonvolatile memory, the parameter stored in the volatile memory and information indicating a duration time of power supply from the capacitor while receiving the power supply from the capacitor.
Moshayedi discloses a capacitor (Figs. 2, 9, para. [0018], capacitor backup supply module 200 and capacitor 210), and when the power supply from outside is stopped, store, in the nonvolatile memory, the parameter stored in the volatile memory and information indicating a duration time of power supply from the capacitor while receiving the power supply from the capacitor (Figs. 1-9, abstract, paras. [0016]-[0018], [0020], [0023], [0029]-[0030], [0039], [0043], [0061]-[0062], [0066]-[0067], [0071]-[0075], [0081]-[0085], when the primary power source no longer supplies power, data is moved from the volatile memory to the non-volatile memory while the controller is powered by capacitor, and the charger and monitor 220 charge the capacitor and determine the state of health of the capacitor to determine time the backup power can be supplied).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included a capacitor and when the power supply from outside is stopped, store, in the nonvolatile memory, the parameter stored in the volatile memory and information indicating a duration time of power supply from the capacitor while receiving the power supply from the capacitor as taught by Moshayedi in the controller in the laser device as taught by Sato as modified by Miyata since a capacitor and when the power supply from outside is stopped, store, in the nonvolatile memory, the parameter stored in the volatile memory and information indicating a duration time of power supply from the capacitor while receiving the power supply from the capacitor is commonly used to provide an inexpensive backup power source that prevents a loss of data and that is reliable by providing state-of-health information (Moshayedi, paras. [0004], [0017]-[0018], [0039], [0067], [0071]).
Regarding claim 20, Sato discloses an electronic device manufacturing method (Figs. 1-3, 15-17, abstract, col. 3, lines 50-67, col. 4, lines 1-11, col. 23, lines 30-65, a semiconductor device is manufactured), comprising:
generating laser light using a laser device (Figs. 2, 3, 15, col. 3, lines 56-67, col. 4, lines 13-38, excimer laser 1 outputs laser light pulses);
outputting the laser light to an exposure apparatus (Figs. 2, 3, 15, col. 3, lines 50-67, col. 4, lines 1-38, excimer laser 1 outputs the laser to the scanning exposure apparatus); and
exposing a photosensitive substrate to the laser light in the exposure apparatus to manufacture an electronic device (Figs. 1-3, 15-17, abstract, col. 3, lines 50-67, col. 4, lines 1-11, col. 23, lines 30-65, an image of pattern illuminated by the pulsed laser light is projected onto a wafer 14 to manufacture a semiconductor device),
the laser device includes an oscillator configured to output laser light (Figs. 2, 3, 15, col. 3, lines 56-67, col. 4, lines 13-38, excimer laser 1 outputs laser light pulses), and a controller configured to control the oscillator (Figs. 2, 3, 15, col. 4, lines 13-38, the illumination controller controls the laser 1),
the controller including a processor (Figs. 2, 3, 15, col. 4, lines 13-38, the illumination controller includes CPU 20), a volatile memory (Figs. 2, 3, 15, col. 4, lines 13-38, RAM 22), a nonvolatile memory (Figs. 2, 3, 15, col. 4, lines 13-38, ROM 21),
the processor being configured to store a parameter of the laser device in the volatile memory when receiving power (Figs. 2, 3, 15, col. 4, lines 13-38, col. 18, lines 32-42, col. 19, lines 63-67, col. 20, lines 1-10, col. 21, lines 37-45, the CPU writes data to the RAM 22, including laser parameters). Sato does not appear to explicitly describe a capacitor, receiving power supply from outside the controller, and when the power supply from outside is stopped, store, in the nonvolatile memory, the parameter stored in the volatile memory and information indicating a duration time of power supply from the capacitor while receiving the power supply from the capacitor.
Miyata discloses a processor (Figs. 1, 2, 7, 9, para. [0021], the control unit 10 comprises a central processing unit CPU), a volatile memory (Figs. 1, 2, 7, 9, para. [0021], control unit 10 comprises a random access memory RAM), a nonvolatile memory (Figs. 1, 2, 7, 9, paras. [0021], [0034]-[0035], control unit 10 comprises a read-only memory ROM and a nonvolatile storage unit 22), the processor being configured to store data in memory when receiving power supply from outside the controller (Figs. 1, 2, 7, 9, paras. [0021], [0034]-[0035], [0037]-[0038], [0047], data is stored in the storage unit 22, and power source unit 20 supplies power to the gas laser system).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included receiving power supply from outside the controller as taught by Miyata in the controller of the laser device in the method as taught by Sato since including receiving power supply from outside the controller is commonly used to provide a reliable power source to power different components of the laser system (Miyata, paras. [0021]-[0022]).
Sato as modified by Miyata does not appear to explicitly describe a capacitor and when the power supply from outside is stopped, store, in the nonvolatile memory, the parameter stored in the volatile memory and information indicating a duration time of power supply from the capacitor while receiving the power supply from the capacitor.
Moshayedi discloses a capacitor (Figs. 2, 9, para. [0018], capacitor backup supply module 200 and capacitor 210), and when the power supply from outside is stopped, store, in the nonvolatile memory, the parameter stored in the volatile memory and information indicating a duration time of power supply from the capacitor while receiving the power supply from the capacitor (Figs. 1-9, abstract, paras. [0016]-[0018], [0020], [0023], [0029]-[0030], [0039], [0043], [0061]-[0062], [0066]-[0067], [0071]-[0075], [0081]-[0085], when the primary power source no longer supplies power, data is moved from the volatile memory to the non-volatile memory while the controller is powered by capacitor, and the charger and monitor 220 charge the capacitor and determine the state of health of the capacitor to determine time the backup power can be supplied).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included a capacitor and when the power supply from outside is stopped, store, in the nonvolatile memory, the parameter stored in the volatile memory and information indicating a duration time of power supply from the capacitor while receiving the power supply from the capacitor as taught by Moshayedi in the controller in the laser device in the method as taught by Sato as modified by Miyata since a capacitor and when the power supply from outside is stopped, store, in the nonvolatile memory, the parameter stored in the volatile memory and information indicating a duration time of power supply from the capacitor while receiving the power supply from the capacitor is commonly used to provide an inexpensive backup power source that prevents a loss of data and that is reliable by providing state-of-health information (Moshayedi, paras. [0004], [0017]-[0018], [0039], [0067], [0071]).
Claims 2, 9, and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Sato as modified by Miyata in view of Moshayedi as applied to claims 1, 7, and 10 above, and further in view of Machida (US PGPub 2017/0199686).
Regarding claim 2, Sato as modified by Miyata in view of Moshayedi does not appear to explicitly describe wherein the processor stores the information indicating the duration time in the nonvolatile memory after storing the parameter in the nonvolatile memory is completed.
Machida discloses wherein the processor stores the remaining information in the nonvolatile memory after storing the high-priority data in the nonvolatile memory is completed (Figs. 1, 8, 11-12, paras. [0062], [0064]-[0066], [0084]-[0088], [0092]-[0096], the front-end controller 111 writes the high-priority data into the saved storage area prior to saving the remainder of the data until the power supply stops).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included wherein the processor stores the remaining information indicating in the nonvolatile memory after storing the high-priority data in the nonvolatile memory is completed as taught by Machida with the information indicating the duration time and the parameter in the controller as taught by Sato as modified by Miyata in view of Moshayedi since including wherein the processor stores the information indicating the duration time as the remaining information in the nonvolatile memory after storing the parameter as the high-priority data in the nonvolatile memory is completed is commonly used to reliably prevent the loss of high-priority data (Machida, para. [0065]).
Regarding claim 9, although Sato as modified by Miyata in view of Moshayedi discloses the processor stores information indicating the duration time (Moshayedi, Figs. 1-9, abstract, paras. [0004]-[0006], [0016]-[0018], [0020], [0023], [0029]-[0030], [0039], [0043], [0061]-[0062], [0066]-[0067], [0071]-[0078], [0084]-[0085], the charger and monitor determines the state of health of the capacitor to determine time the backup power can be supplied), Sato as modified by Miyata in view of Moshayedi does not appear to explicitly describe storing the information as log data.
Machida discloses wherein the processor stores information as log data (Figs. 1, 8, 11-12, para. [0096], data is written to a transaction log to indicate processing history).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included the processor stores information as log data as taught by Machida for the information indicating duration time in the controller as taught by Sato as modified by Miyata in view of Moshayedi since including the processor stores the information indicating the duration time as log data is commonly used to reliably store history for when main power is restored (Machida, para. [0096]).
Regarding claim 12, although Sato as modified by Miyata in view of Moshayedi discloses the processor stores a determination result of the deterioration of the capacitor (Moshayedi, Figs. 1-9, abstract, paras. [0004]-[0006], [0016]-[0018], [0020], [0023], [0029]-[0030], [0039], [0043], [0061]-[0062], [0066]-[0067], [0071]-[0078], [0084]-[0085], the charger and monitor determines the state of health of the capacitor to determine time the backup power can be supplied, and controller 110 reports if the module can handle a power loss event when the primary power source is again available), Sato as modified by Miyata in view of Moshayedi does not appear to explicitly describe storing the data as log data.
Machida discloses wherein the processor stores information as log data (Figs. 1, 8, 11-12, para. [0096], data is written to a transaction log to indicate processing history).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included the processor stores information as log data as taught by Machida for the determination result of the deterioration of the capacitor in the controller as taught by Sato as modified by Miyata in view of Moshayedi since including the processor stores a determination result of the deterioration of the capacitor as log data is commonly used to reliably store history for when main power is restored (Machida, para. [0096]).
Claims 3-5, 8, and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Sato as modified by Miyata in view of Moshayedi as applied to claims 1, 7, 10 above, and further in view of Gladstein et al. (US Patent No. 5,341,503, Gladstein hereinafter).
Regarding claim 3, although Sato as modified by Miyata in view of Moshayedi discloses storing information indicating the duration time in the nonvolatile memory until the power supply from the capacitor necessary for operation of the processor is stopped (Moshayedi, Figs. 1-9, abstract, paras. [0016]-[0018], [0020], [0023], [0029]-[0030], [0039], [0043], [0061]-[0062], [0066]-[0067], [0071]-[0075], [0081]-[0085], when the primary power source no longer supplies power, data is moved from the volatile memory to the non-volatile memory while the controller is powered by capacitor, and the charger and monitor 220 charge the capacitor and determine the state of health of the capacitor to determine time the backup power can be supplied), Sato as modified by Miyata in view of Moshayedi does not appear to explicitly describe wherein the processor repeats operation of storing the information indicating the duration time in the nonvolatile memory.
Gladstein discloses wherein the processor repeats operation of storing the information indicating the duration time in the nonvolatile memory until the power supply from the battery necessary for operation of the processor is stopped (Figs. 1-5, col. 2, lines 33-68, col. 6, lines 7-30, col. 9. lines 48-68, col. 10, lines 50-68, col. 11, lines 43-68, col. 13, lines 65-68, col. 14, lines 1-15, lines 37-68, col. 15, lines 1-32, col. 16, lines 47-57, the service processor 24 periodically obtains and stores in non-volatile memory the percent of battery charge remaining).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included wherein the processor repeats operation of storing the information indicating the duration time in the nonvolatile memory until the power supply from the battery necessary for operation of the processor is stopped as taught by Gladstein in the controller as taught by Sato as modified by Miyata in view of Moshayedi since including wherein the processor repeats operation of storing the information indicating the duration time in the nonvolatile memory until the power supply from the capacitor necessary for operation of the processor is stopped is commonly used to accurately determine the energy remaining for an auxiliary power source to prevent loss of data (Gladstein, col. 1, lines 6-15, col. 2, lines 33-45).
Regarding claim 4, although Sato as modified by Miyata in view of Moshayedi discloses storing information indicating the duration time in the nonvolatile memory (Moshayedi, Figs. 1-9, abstract, paras. [0016]-[0018], [0020], [0023], [0029]-[0030], [0039], [0043], [0061]-[0062], [0066]-[0067], [0071]-[0075], [0081]-[0085], when the primary power source no longer supplies power, data is moved from the volatile memory to the non-volatile memory while the controller is powered by capacitor, and the charger and monitor 220 charge the capacitor and determine the state of health of the capacitor to determine time the backup power can be supplied), Sato as modified by Miyata in view of Moshayedi does not appear to explicitly describe wherein the processor repeats operation of sequentially updating the information.
Gladstein discloses wherein the processor repeats operation of sequentially updating the information indicating the duration time stored in the nonvolatile memory (Figs. 1-5, col. 2, lines 33-68, col. 6, lines 7-30, col. 9. lines 48-68, col. 10, lines 50-68, col. 11, lines 43-68, col. 13, lines 65-68, col. 14, lines 1-15, lines 37-68, col. 15, lines 1-32, col. 16, lines 47-57, the service processor 24 periodically obtains and stores in non-volatile memory the percent of battery charge remaining).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included wherein the processor repeats operation of sequentially updating the information as taught by Gladstein in the controller as taught by Sato as modified by Miyata in view of Moshayedi since including wherein the processor repeats operation of sequentially updating the information indicating the duration time stored in the nonvolatile memory is commonly used to accurately determine the energy remaining for an auxiliary power source to prevent loss of data (Gladstein, col. 1, lines 6-15, col. 2, lines 33-45).
Regarding claim 5, Sato as modified by Miyata in view of Moshayedi in view of Gladstein discloses wherein the processor updates the information indicating the duration time at every fixed time (Gladstein, Figs. 1-5, col. 2, lines 33-68, col. 6, lines 7-30, col. 9. lines 48-68, col. 10, lines 50-68, col. 11, lines 43-68, col. 13, lines 65-68, col. 14, lines 1-15, lines 37-68, col. 15, lines 1-32, col. 16, lines 47-57, the reports of voltage and load are obtained periodically, for example every quarter second).
Regarding claim 8, in a further interpretation, Sato as modified by Miyata in view of Moshayedi does not appear to explicitly describe wherein the processor causes a display to display the information indicating the duration time.
Gladstein discloses wherein the processor causes a display to display the information indicating the duration time (Figs. 1-7, col. 3, lines 16-26, col. 4, lines 49-68, col. 8, lines 40-46, a display displays the battery information to a user).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included wherein the processor causes a display to display the information indicating the duration time as taught by Gladstein in the controller as taught by Sato as modified by Miyata in view of Moshayedi since including wherein the processor causes a display to display the information indicating the duration time is commonly used to permit a user to quickly ascertain the amount of remaining time at the current rate of power consumption (Gladstein, col. 3, lines 1-26).
Regarding claim 11, in a further interpretation, although Sato as modified by Miyata in view of Moshayedi discloses determining deterioration of the capacitor (Moshayedi, Figs. 1-9, abstract, paras. [0004]-[0006], [0016]-[0018], [0020], [0023], [0029]-[0030], [0039], [0043], [0061]-[0062], [0066]-[0067], [0071]-[0078], [0084]-[0085], the charger and monitor determines the state of health of the capacitor to determine time the backup power can be supplied, and controller 110 reports if the module can handle a power loss event when the primary power source is again available), Sato as modified by Miyata in view of Moshayedi does not appear to explicitly describe wherein the processor causes a display to display a determination result of the deterioration of the capacitor.
Gladstein discloses wherein the processor causes a display to display a determination result of the deterioration of the battery (Figs. 1-7, col. 3, lines 16-26, col. 4, lines 49-68, col. 8, lines 40-46, a display displays the battery information to a user).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included wherein the processor causes a display to display a determination result of the deterioration of the battery as taught by Gladstein in the controller as taught by Sato as modified by Miyata in view of Moshayedi since including wherein the processor causes a display to display a determination result of the deterioration of the capacitor is commonly used to permit a user to quickly ascertain the amount of remaining time at the current rate of power consumption (Gladstein, col. 3, lines 1-26).
Claims 13, 14, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Sato as modified by Miyata in view of Moshayedi applied to claim 1 above, and further in view of Takahashi et al. (US PGPub 2014/0184165, Takahashi hereinafter).
Regarding claim 13, Sato as modified by Miyata in view of Moshayedi does not appear to explicitly describe wherein the processor repeats operation of sequentially storing data related to the information indicating the duration time in a different region of the nonvolatile memory.
Takahashi discloses wherein the processor repeats operation of sequentially storing data related to the information indicating the duration time in a different region of the nonvolatile memory (Figs. 1, 3-5, paras. [0068]-[0070], [0095]-[0097], [0102]-[0109], [0154], the battery data is stored in a different region of memory 106 over repeated measurements).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included wherein the processor repeats operation of sequentially storing data related to the information indicating the duration time in a different region of the nonvolatile memory as taught by Takahashi in the controller as taught by Sato as modified by Miyata in view of Moshayedi since including the processor repeats operation of sequentially storing data related to the information indicating the duration time in a different region of the nonvolatile memory is commonly used to provide easy analysis for the operation of a power storage device (Takahashi, paras. [0007]-[0009], [0018], [0023]-[0024]).
Regarding claim 14, Sato as modified by Miyata in view of Moshayedi in view of Takahashi discloses wherein the process stores the data at every fixed time (Takahashi, Fig. 1, 3-5, paras. [0068]-[0070], [0095]-[0097], [0102]-[0109], [0142]-[0149], [0154], the battery data is stored in a different region of memory 106 over repeated measurements).
Regarding claim 18, Sato as modified by Miyata in view of Moshayedi does not appear to explicitly describe wherein the processor repeats operation of sequentially storing same data in a different region of the nonvolatile memory.
Takahashi discloses wherein the processor repeats operation of sequentially storing same data in a different region of the nonvolatile memory (Figs. 1, 3-5, paras. [0068]-[0070], [0095]-[0097], [0102]-[0109], [0154], the battery data is stored in a different region of memory 106 over repeated measurements).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included wherein the processor repeats operation of sequentially storing same data in a different region of the nonvolatile memory as taught by Takahashi in the controller as taught by Sato as modified by Miyata in view of Moshayedi since including wherein the processor repeats operation of sequentially storing same data in a different region of the nonvolatile memory is commonly used to provide easy analysis for the operation of a power storage device (Takahashi, paras. [0007]-[0009], [0018], [0023]-[0024]).
Allowable Subject Matter
Claims 15-17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 15, the prior art of record, either alone or in combination, fails to teach or render obvious wherein the processor resets all regions of at least one free sector included in the nonvolatile memory being different from a sector in which the parameter is stored, and then stores the data in the free sector. These limitations in combination with all of the other limitations of the parent claims would render the claim non-obvious over the prior art of record if rewritten.
Regarding claim 16, the prior art of record, either alone or in combination, fails to teach or render obvious wherein the processor acquires the duration time based on a number of regions in which the data is stored when the power supply from outside is resumed. These limitations in combination with all of the other limitations of the parent claims would render the claim non-obvious over the prior art of record if rewritten.
Regarding claim 17, the prior art of record, either alone or in combination, fails to teach or render obvious wherein the processor stores the data at every fixed time, and when the power supply from outside is resumed, acquires the duration time based on a number of regions in which the data is stored and a length of the fixed time. These limitations in combination with all of the other limitations of the parent claims would render the claim non-obvious over the prior art of record if rewritten.
Sato discloses a controller comprising a processor, a volatile memory, a nonvolatile memory, and configured to control a laser device (Figs. 2, 3, 15, col. 4, lines 13-38, the illumination controller includes CPU 20, RAM 22, ROM 21), the processor being configured to store a parameter of the laser device in the volatile memory when receiving power (Figs. 2, 3, 15, col. 4, lines 13-38, col. 18, lines 32-42, col. 19, lines 63-67, col. 20, lines 1-10, col. 21, lines 37-45, the CPU writes data to the RAM 22, including laser parameters). Sato does not describe or suggest wherein the processor resets all regions of at least one free sector included in the nonvolatile memory being different from a sector in which the parameter is stored, and then stores the data in the free sector, wherein the processor acquires the duration time based on a number of regions in which the data is stored when the power supply from outside is resumed, or wherein the processor stores the data at every fixed time, and when the power supply from outside is resumed, acquires the duration time based on a number of regions in which the data is stored and a length of the fixed time.
Miyata discloses a processor (Figs. 1, 2, 7, 9, para. [0021], the control unit 10 comprises a central processing unit CPU), a volatile memory (Figs. 1, 2, 7, 9, para. [0021], control unit 10 comprises a random access memory RAM), a nonvolatile memory (Figs. 1, 2, 7, 9, paras. [0021], [0034]-[0035], control unit 10 comprises a read-only memory ROM and a nonvolatile storage unit 22), the processor being configured to store data in memory when receiving power supply from outside the controller (Figs. 1, 2, 7, 9, paras. [0021], [0034]-[0035], [0037]-[0038], [0047], data is stored in the storage unit 22, and power source unit 20 supplies power to the gas laser system). Miyata fails to describe or render obvious wherein the processor resets all regions of at least one free sector included in the nonvolatile memory being different from a sector in which the parameter is stored, and then stores the data in the free sector, wherein the processor acquires the duration time based on a number of regions in which the data is stored when the power supply from outside is resumed, or wherein the processor stores the data at every fixed time, and when the power supply from outside is resumed, acquires the duration time based on a number of regions in which the data is stored and a length of the fixed time.
Moshayedi discloses a capacitor (Figs. 2, 9, para. [0018], capacitor backup supply module 200 and capacitor 210), and when the power supply from outside is stopped, store, in the nonvolatile memory, the parameter stored in the volatile memory and information indicating a duration time of power supply from the capacitor while receiving the power supply from the capacitor (Figs. 1-9, abstract, paras. [0016]-[0018], [0020], [0023], [0029]-[0030], [0039], [0043], [0061]-[0062], [0066]-[0067], [0071]-[0075], [0081]-[0085], when the primary power source no longer supplies power, data is moved from the volatile memory to the non-volatile memory while the controller is powered by capacitor, and the charger and monitor 220 charge the capacitor and determine the state of health of the capacitor to determine time the backup power can be supplied). Moshayedi fails to describe or render obvious wherein the processor resets all regions of at least one free sector included in the nonvolatile memory being different from a sector in which the parameter is stored, and then stores the data in the free sector, wherein the processor acquires the duration time based on a number of regions in which the data is stored when the power supply from outside is resumed, or wherein the processor stores the data at every fixed time, and when the power supply from outside is resumed, acquires the duration time based on a number of regions in which the data is stored and a length of the fixed time.
Takahashi discloses wherein the processor repeats operation of sequentially storing data related to the information indicating the duration time in a different region of the nonvolatile memory (Figs. 1, 3-5, paras. [0068]-[0070], [0095]-[0097], [0102]-[0109], [0154], the battery data is stored in a different region of memory 106 over repeated measurements), but Takahashi does not describe or suggest wherein the processor resets all regions of at least one free sector included in the nonvolatile memory being different from a sector in which the parameter is stored, and then stores the data in the free sector, wherein the processor acquires the duration time based on a number of regions in which the data is stored when the power supply from outside is resumed, or wherein the processor stores the data at every fixed time, and when the power supply from outside is resumed, acquires the duration time based on a number of regions in which the data is stored and a length of the fixed time.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Suzuki (JP2015-029086) discloses a laser apparatus with a capacitor for power storage and discloses monitoring the accumulated charge amount.
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/CHRISTINA A RIDDLE/Primary Examiner, Art Unit 2882
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