Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of claim(s) to be treated in this office action:
a. Independent: 1, 8 and 15
b. Pending: 1-20
Per MPEP 2111 and 2111.01, the claims are given their broadest reasonable interpretation and the words of the claims are given their plain meaning consistent with the specification without importing claim limitations from the specification.
Information Disclosure Statement
The information disclosure statement (IDS) is submitted on 1/29/2025. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. US 12243577. Although the claims at issue are not identical, they are not patentably distinct from each other because when we compare device, method or non-transitory computer-readable storage medium claim set of Instant Application with corresponding claim set of Reference Application, we find that they recite same claim limitations drafted in a slightly different language and distributed over the entire claim set.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 6 recites the limitation "the second read voltage" in line:1. There is insufficient antecedent basis for this limitation in the claim.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 8 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Graniello et al. (US 10031699).
Regarding independent claim 1, Graniello discloses a system (Figs. 2-6) comprising:
a memory device (memory module 260; Fig. 2);
a processing device, operatively coupled to the memory device (Fig. 2 shows processor 270 and memory controller 205 connected to memory module 260), the processing device configured to perform operations, comprising:
receiving a plurality of codewords (Fig. 3B and (40) describes that memory controller 305 receives read request/memory command. (56) describes that memory controller 305 receives write request. These are coded commands);
selecting a first read voltage associated with the one or more codewords (Fig. 3B and (40)), wherein the first read voltage is based on a time elapsed since a last write operation with respect to a management unit comprising the one or more codewords (Fig. 3B and (40) describes that memory controller 305 performs a lookup of the write timestamp tracker 330 for the memory address of the requested data. If the memory address is not found in the write timestamp tracker 330, in other words, the lookup returns a miss, then the memory address is not a prioritized memory address, and the memory controller 305 generates read commands for the data using the standard read voltage. If, on the other hand, the memory address is found (i.e., the lookup returns a hit), then the memory address is a prioritized memory address, and the TOLW (time of last write) from the write timestamp tracker 330 is sent to the time-to-voltage converter 340, along with the read time for the read operation from the memory controller 305. Then computes a delta time from the TOLW and the read time, or in other words, the duration from the TOLW to the read time, and a read voltage (Vr) is calculated); and
applying the first read voltage to a set of memory cells storing the one or more codewords ((40) describes that Vr is sent to the memory controller 305, a read command is generated to read from the prioritized memory address at the appropriate Vr, and the read command is sent to the NVM 350 to retrieve the data).
Independent claim 8 recites the same limitations of independent device claim 1, but drafted in method format and henceforth rejected the same way as above by Graniello.
Regarding independent claim 15, Graniello discloses ([0079] describes implementation of the same operations in a computer-readable storage device having stored thereon instructions that when executed by one or more processors perform the methods. The processor may include, for example, a processing unit and/or programmable circuitry. The storage device may include a machine readable storage device including any type of tangible, non-transitory storage device).
Claims 2-7, 9-14 and 16-20 are rejected under 35 U.S.C. 103 as being unpatentable over Graniello et al. (US 10031699) in view of Hiller et al. (US 20190102320).
Regarding claim 2, Graniello discloses all the elements of claim 1 as above and through Hiller further responsive to applying the first read voltage to the set of memory cells, performing an error correction operation on the one or more codewords ([0027] describes performing error correction operations).
It would have been obvious to one of ordinary skill in the art before the earliest effective filing date to apply the teachings of Hiller to modified Graniello in order to provide with time tracking mechanism using patrol scrub. An apparatus, method and/or system are configured to utilize a patrol scrub to periodically update a state of a sub-block. The state may be updated if the state is less than the threshold and the difference between a current timer index and the stored timestamp is nonzero as taught by Hiller ([0024]).
Regarding claim 3, Graniello discloses all the elements of claim 1 as above and through Hiller further responsive to determining that a number of recovery operations performed with respect to the one or more codewords is below a threshold number, selecting a second read voltage exceeding the first read voltage; and applying the second read voltage to the set of memory cells (Fig. 5 and [0071] describes that decision box 516 compares a threshold number with a detected number and uses two different voltages based on the comparison to perform read operation).
It would have been obvious to one of ordinary skill in the art before the earliest effective filing date to apply the teachings of Hiller to modified Graniello in order to provide with time tracking mechanism using patrol scrub. An apparatus, method and/or system are configured to utilize a patrol scrub to periodically update a state of a sub-block. The state may be updated if the state is less than the threshold and the difference between a current timer index and the stored timestamp is nonzero as taught by Hiller ([0024]).
Regarding claim 4, Graniello discloses all the elements of claim 1 as above and through Hiller further responsive to determining that a number of recovery operations performed with respect to the one or more codewords is equal or exceeds a threshold number, determining a respective error status for each codeword of the one or more codewords (Fig. 3 and [0064] step 308 along with Fig. 4 and [0067] step 408 describes that respective state of one or more other sub-blocks being updated, by comparing respective state with a threshold).
It would have been obvious to one of ordinary skill in the art before the earliest effective filing date to apply the teachings of Hiller to modified Graniello in order to provide with time tracking mechanism using patrol scrub. An apparatus, method and/or system are configured to utilize a patrol scrub to periodically update a state of a sub-block. The state may be updated if the state is less than the threshold and the difference between a current timer index and the stored timestamp is nonzero as taught by Hiller ([0024]).
Regarding claim 5, Graniello discloses all the elements of claim 1 as above and through Hiller further determining that the one or more codewords are corrupt further comprises: detecting one or more errors returned by an error correction operation performed with respect to the one or more codewords (Fig. 1 and [0027], [0036] describes patrol scrub circuitry 126 detects and corrects soft errors that may be present in memory controller memory 106).
It would have been obvious to one of ordinary skill in the art before the earliest effective filing date to apply the teachings of Hiller to modified Graniello in order to provide with time tracking mechanism using patrol scrub. An apparatus, method and/or system are configured to utilize a patrol scrub to periodically update a state of a sub-block. The state may be updated if the state is less than the threshold and the difference between a current timer index and the stored timestamp is nonzero as taught by Hiller ([0024]).
Regarding claim 6, Graniello discloses all the elements of claim 1 as above and through Hiller further the first read voltage exceeds the second read voltage that was utilized for reading the one or more codewords in a previous read operation (Fig. 5 shows two different voltages VDM1 and VDM2. POSITA will do minimum experimentations between these two voltage levels to come up with the optimal solution).
It would have been obvious to one of ordinary skill in the art before the earliest effective filing date to apply the teachings of Hiller to modified Graniello in order to provide with time tracking mechanism using patrol scrub. An apparatus, method and/or system are configured to utilize a patrol scrub to periodically update a state of a sub-block. The state may be updated if the state is less than the threshold and the difference between a current timer index and the stored timestamp is nonzero as taught by Hiller ([0024]).
Regarding claim 7, Graniello discloses all the elements of claim 1 as above and through Hiller further responsive to determining that the first read voltage is below a maximum read voltage, selecting a second read voltage exceeding the first read voltage (Fig. 5 shows two different voltages VDM1 and VDM2. POSITA will do minimum experimentations between these two voltage levels to come up with the optimal solution); and
applying the second read voltage to the set of memory cells (Fig. 5 at step 510 shows reading target sub-block with VDM1/VDM2 voltages).
It would have been obvious to one of ordinary skill in the art before the earliest effective filing date to apply the teachings of Hiller to modified Graniello in order to provide with time tracking mechanism using patrol scrub. An apparatus, method and/or system are configured to utilize a patrol scrub to periodically update a state of a sub-block. The state may be updated if the state is less than the threshold and the difference between a current timer index and the stored timestamp is nonzero as taught by Hiller ([0024]).
Claim 9-14 recite the same limitations of device claims 2-7, but drafted in method format and henceforth rejected the same way as above by Graniello and Hiller.
Claim 16-20 recite the same limitations of device claims 2-7, but drafted differently and henceforth rejected the same way as above by Graniello and Hiller.
Conclusion
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/SULTANA BEGUM/Primary Examiner, Art Unit 2824 8/18/2026
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