Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This Office Action is responsive to the U.S. Patent Application Ser. No 19/019,509 filed 01/14/2025 to 07/22/2025.
Gerneral Remarks
2. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
When responding to this office action, applicants are advised to provide the examiner with line numbers and page numbers in the application and/or references cited to assist the examiner in locating appropriate paragraphs.
Per MPEP 2111 and 2111.01, the claims are given their broadest reasonable interpretation and the words of the claims are given their plain meaning consistent with the specification without importing claim limitations from the specification.
Applicants seeking an interview with the examiner, including WebEx Video Conferencing, are encouraged to fill out the online Automated Interview Request (AIR) form (http://www.uspto.gov/patent/uspto-automated-interview-request-air-form.html). See MPEP §502.03, §713.01(II) and Interview Practice for additional details.
Applicant's cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Status of claim to be treated in this office action:
Independent: 1.
b. Claims 1-5 are pending on the application.
Drawings
3. The drawings were received on 01/14/2025. These drawings are review and accepted by examiner.
Priority
4. Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Information Disclosure Statement
5. Acknowledgment is made of applicant’s Information Disclosure Statement
(IDS) Form PTO-1449; filed 07/22/2025. The information disclosed therein was considered.
Acknowledgment is made of applicant’s Information Disclosure Statement
(IDS) Form PTO-1449; filed 01/14/2025. The information disclosed therein was considered.
Specification
6. The disclosure is objected to because of the following informalities:
In the first paragraph of the specification, the status of the parent application No. 18/515.273 and 17/348,776 should be updated; namely, it has matured into U.S. Patent No. 12,232,425 and 11,864,468; respectively. Appropriate correction is required.
7. Applicant is reminded of the proper language and format for an abstract of the disclosure.
The abstract should be in narrative form and generally limited to a single paragraph on a separate sheet within the range of 50 to 150 words. It is important that the abstract not exceed 150 words in length since the space provided for the abstract on the computer tape used by the printer is limited. The form and legal phraseology often used in patent claims, such as "means" and "said," should be avoided. The abstract should describe the disclosure sufficiently to assist readers in deciding whether there is a need for consulting the full patent text for details.
The language should be clear and concise and should not repeat information given in the title. It should avoid using phrases which can be implied, such as, "The disclosure concerns," "The disclosure defined by this invention," "The disclosure describes," etc.
The abstract of the disclosure is objected to because it uses the phrase “OF DISCLOSURE” in page 11, line 1, which are implied. Correction is required. See MPEP § 608.01(b).
Double Patenting
8. The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the claims at issue are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the reference application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The USPTO internet Web site contains terminal disclaimer forms which may be used. Please visit http://www.uspto.gov/forms/. The filing date of the application will determine what form should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to http://www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp.
9. Claims 1-5 of the instant application is rejected on the ground of nonstatutory obviousness-type double patenting as being unpatentable over claim 1-5 of U.S. Patent No. 12,232,425 in view of Hsu et al (Pub. No.: 2018/0374895 A1).
All of the limitation of pending claim 1 can be found in conflicting claim 1 of US patent 12,232,425 with the exception of the additional limitation of “a metal interconnection on the logic region, wherein a top surface of the metal interconnection is higher than a top surface of the first MTJ.”
Hsu et al discloses a memory mram device (see Figure 24) including mram cell region 100A and a logic region 100B includes the first metal 124A is greater than the second metal 124B, a bottom surface of the second top layer 152 is higher than a top surface of the first stop layer 151 in mram device. (see paragraph 0028, comparing the mram cell reigon 100A….for example, a single dual….elevation level.). It would have been obvious to include the mram region and the logic region includes a metal disclosed by Hsu et al in the mram device, as instantly claimed for enable prevent the short circuit between the metal via and the MTJ.
Claims 2-5 are therefore rejected under Patent in view of Hsu et al for the same as claims 2-5.
Application: 19/019,509.
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Patent No.: US 12,232,425.
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Hsu et al (US. 2018/0374895 A1).
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Hsu et al (US. 2018/0374895 A1).
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10. Claims 1-5 of the instant application is rejected on the ground of nonstatutory obviousness-type double patenting as being unpatentable over claim 1-9 of U.S. Patent No. 11,864,468 in view of Hsu et al (Pub. No.: 2018/0374895 A1).
All of the limitation of pending claim 1 can be found in conflicting claims 1 and 5 of US patent 11,864,468 with the exception of the additional limitation of “a metal interconnection on the logic region, wherein a top surface of the metal interconnection is higher than a top surface of the first MTJ.”
Hsu et al discloses a memory mram device (see Figure 24) including mram cell region 100A and a logic region 100B includes the first metal 124A is greater than the second metal 124B, a bottom surface of the second top layer 152 is higher than a top surface of the first stop layer 151 in mram device. (see paragraph 0028, comparing the mram cell reigon 100A….for example, a single dual….elevation level.). It would have been obvious to include the mram region and the logic region includes a metal disclosed by Hsu et al in the mram device, as instantly claimed for enable prevent the short circuit between the metal via and the MTJ.
Claims 2-5 are therefore rejected under Patent in view of Hsu et al for the same as claims 2-4 and 6-9.
Application: 19/019,509.
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Patent No.: US 11,864,468.
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Hsu et al (US. 2018/0374895 A1).
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Hsu et al (US. 2018/0374895 A1).
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Allowable Subject Matter
11. Claims 1-5 are presently rejected under obviousness double patenting, but would be allowable provided that a terminal disclaimer is filed.
Conclusion
Examiner's note: Examiner has cited particular columns and line numbers in the references as applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner.
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Li et al (US. 2019/0206928 A1) discloses density control dummy fill strategy for near mram periphery and far outside mram logic region for embedded mram technology and method for producing the same.
Chuang et al (US. 2023/0061985 A1) discloses magnetic random access memory device and formation method thereof.
When responding to the office action, Applicant are advised to provide the examiner with line numbers and page numbers in the application and/or references cited to assist the examiner to located the appropriate paragraphs.
A shortened statutory period for response to this action is set to expire 3 (three) months and 0 (zero) day from the data of this letter. Failure to respond within the period for response will cause the application to become abandoned (see MPEP 710.02 (b)).
Any inquiry concerning this communication or earlier communications from the Examiner should be directed to PHO M LUU whose telephone number is
571.272.1876. The Examiner can normally be reached on M-F 8:00AM – 5:00PM.
If attempts to reach the Examiner by telephone are unsuccessful, the Examiner’s Supervisor, Richard Elms, can be reached on 571.272.1869. The official fax number for the organization where this application or proceeding is assigned is 571.273.8300 for all official communications.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see
http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free).
/Pho M Luu/
Primary Examiner, Art Unit 2824
571-272-1876
Miner.luu@uspto.gov