DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
2. The information disclosure statement (IDS) submitted on January 14, 2025 has been fully considered by the examiner.
Specification
3. The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: “Storage Device and Operating Method Using Select Transistor Behavior to Determine Read Reclaim.”
Claim Objections
4. Claim 5 is objected to because of the following informalities: Line 2 contains an apparent typographical error that may be corrected to recite “the number of the degraded drain select transistors.” Appropriate correction is required.
Claim Rejections - 35 USC § 112
5. The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
6. Claims 9-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 9 recites the limitation “a plurality of memory cells” in line 4, which is indefinite. For the purpose of this action, “a plurality of memory cells” shall be interpreted as “[[a]] the plurality of memory cells,” which finds antecedent basis in claim 1, lines 2-3. Claims 10-13 depend on claim 9.
Claim 13 recites the limitation “a memory block” in line 2, which is indefinite. For the purpose of this action, “a memory block” shall be interpreted as “[[a]] the memory block,” which finds antecedent basis in claim 1, line 2.
Claim 13 recites the limitation “a remaining read count of a memory block” in line 2, which is indefinite. For the purpose of this action, “a remaining read count of a memory block” shall be interpreted as “[[a]] the remaining read count of [[a]] the memory block,” which finds antecedent basis in claim 1, line 13.
Claim 14 recites the limitation “the remaining read count” in line 17. There is insufficient antecedent basis for this limitation in the claim. For the purpose of this action, “the remaining read count” shall be interpreted as “[[the]] a remaining read count.” Claims 15-20 depend on claim 14.
Claim 16 recites the limitation “a result obtained by comparing the remaining read count” in lines 4-5, which is indefinite. For the purpose of this action, “a result obtained by comparing the remaining read count” shall be interpreted as “[[a]] the result obtained by comparing the remaining read count,” which finds antecedent basis in claim 14, lines 16-17. Claim 17 depends on claim 16.
Claim 19 recites the limitation “the cell count information” in line 5. There is insufficient antecedent basis for this limitation in the claim. For the purpose of this action, “the cell count information” shall be interpreted as “[[the]] cell count information.” Claim 20 depends on claim 19.
Claim Rejections - 35 USC § 103
7. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
8. Claims 1-5 are rejected under 35 U.S.C. 103 as being unpatentable over Lee, et al (US 20180067697 A1), hereinafter Lee, in view of Nam, et al (US 20180150261 A1), hereinafter Nam.
Regarding independent claim 1, Lee teaches a memory device comprising:
a memory block (FIG. 5, BLKa) including a plurality of select transistors (FIG. 5, GST, SST) and a plurality of memory cells (FIG. 5, MC), the plurality of select transistors connected to a plurality of select lines (FIG. 5, GSL, SSL) and the plurality of memory cells connected to a plurality of word lines (FIG. 5, WL1..WL8);
a cell counter configured to count a number of degraded select transistors, from the plurality of select transistors, which exceed a normal threshold voltage distribution (FIGS. 10-12 and ¶[0121], [0125] teach decisions based on the number of selection transistors outside range RNG, and so the device must be capable of counting said transistors), based on a cell current of the plurality of select transistors, and generate cell count information including the number of the degraded select transistors (¶[0080] teaches “A change in a threshold voltage due to the disturbance or retention deterioration may be monitored by comparing the number of turned-on on-cells with a threshold value during the first operation. A change in a threshold voltage due to the disturbance or retention deterioration may be monitored by comparing the number of turned-off off-cells with the threshold value during the second operation.” See FIGS. 6 and 10.); and
Lee does not teach a health information manager configured to generate read reclaim information indicating whether the memory block is a read reclaim target according to a remaining read count of the memory block and a result obtained by comparing the remaining read count with a plurality of threshold read counts, based on the cell count information (Lee teaches disturbance and retention deterioration occur ¶[0115], such disturbance may require a reclaim operation ¶[0100], and maintaining a read count ¶[0090], but does not appear to teach the read count is used to determine when a reclaim operation is initiated).
Nam teaches a health information manager configured to generate read reclaim information indicating whether the memory block is a read reclaim target according to a remaining read count of the memory block and a result obtained by comparing the remaining read count with a plurality of threshold read counts, based on the cell count information (FIG. 6B and ¶[0081] teach “if the read count exceeds a read threshold N1 (Operation S640), a reclaim operation is performed on the corresponding block (Operation S650)”; while “remaining” read count is not explicitly discussed, FIG. 7B illustrates in Case ‘A’, for example, the “remaining” read count for STR#2 is zero when the read count equals threshold N1=100 (see ¶[0087]), and in case ‘B’, the “remaining” read count is 50. Because remaining read count may be derived from read count, the two quantities carry the same information.).
It would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Nam into the method of Lee to include determining when a reclaim operation should be performed based on read count. The ordinary artisan would have been motivated to modify Lee in the above manner for the purpose of using read count as an estimate of cell deterioration due to FN stress (Nam ¶[0078, 0080]).
Regarding claim 2, Lee as modified by Nam teaches the limitations of claim 1.
Lee further teaches the plurality of select transistors include a plurality of drain
select transistors (FIG. 5, SSTs coupled to SSL1..SSL4) and a plurality of source select transistors (FIG. 5, GSTs coupled to GSL1..GSL4),
wherein the plurality of drain select transistors are connected to a plurality of drain select lines among the plurality of select lines (FIG. 5, SSL1..SSL4), and
wherein the plurality of source select transistors are connected to a source select line among the plurality of select lines (FIG. 5, GSL1..GSL4).
Regarding claim 3, Lee as modified by Nam teaches the limitations of claim 2.
Lee further teaches the cell counter counts a number of degraded drain select transistors which exceed the normal threshold voltage distribution, based on a cell current of the plurality of drain select transistors, and counts a number of degraded source select transistors which exceed the normal threshold voltage distribution (FIG. 12, S440; ¶[0125]; ¶[0114] teaches selection transistors “may include the string selection transistors…and the ground selection transistors”), based on a cell current of the plurality of source select transistors (¶[0080] teaches “A change in a threshold voltage due to the disturbance or retention deterioration may be monitored by comparing the number of turned-on on-cells with a threshold value during the first operation. A change in a threshold voltage due to the disturbance or retention deterioration may be monitored by comparing the number of turned-off off-cells with the threshold value during the second operation.” See FIGS. 6 and 10. FIG. 10 illustrates the difference in turned-on cells (and therefore cell current) with no disturb (G1) vs. with disturb (G2) – see ¶[0115]).
Regarding claim 4, Lee as modified by Nam teaches the limitations of claim 3.
Lee further teaches the cell counter counts a number of degraded drain select transistors corresponding to a selected drain select line among the plurality of drain select lines (FIG. 12, S440; ¶[0125]; ¶[0114] teaches selection transistors “may include the string selection transistors”), based on a cell current of drain select transistors connected to the selected drain select line (¶[0080] teaches “A change in a threshold voltage due to the disturbance or retention deterioration may be monitored by comparing the number of turned-on on-cells with a threshold value during the first operation. A change in a threshold voltage due to the disturbance or retention deterioration may be monitored by comparing the number of turned-off off-cells with the threshold value during the second operation.” See FIGS. 6 and 10.),
and generates the cell count information, based on a result obtained by summing the number of degraded drain select transistors respectively corresponding to the plurality of drain select lines (FIG. 12, S450 uses the sum produced by S440).
Regarding claim 5, Lee as modified by Nam teaches the limitations of claim 4.
Lee further teaches the cell count information includes at least one of the number of the degraded drain select transistor and the number of the degraded source select transistors (FIG. 12, S440; ¶[0125]; ¶[0114] teaches selection transistors “may include the string selection transistors…and the ground selection transistors”).
9. Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Lee, et al (US 20180067697 A1), hereinafter Lee, in view of Nam, et al (US 20180150261 A1), hereinafter Nam, and further in view of You (US 20210265004 A1).
Regarding claim 6, Lee as modified by Nam teaches the limitations of claim 1.
Lee does not teach the health information manager generates read reclaim information indicating that the memory block is one of a foreground read reclaim target, a background read reclaim target, and an after health monitoring target according to a result obtained by comparing the remaining read count with the plurality of threshold read counts.
You teaches the health information manager generates read reclaim information indicating that the memory block is one of a foreground read reclaim target, a background read reclaim target, and an after health monitoring target according to a result obtained by comparing the remaining read count with the plurality of threshold read counts (FIG. 8, S803-809, referencing status codes of FIG. 6 based on read count/threshold comparisons; ¶[0139-0143]).
It would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of You into the method of Lee to include using read count to determine if a reclaim operation should be performed as a foreground or background task. The ordinary artisan would have been motivated to modify Lee in the above manner for the purpose of using a foreground operation in a high priority condition (You ¶[0139]).
10. Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Lee, et al (US 20180067697 A1), hereinafter Lee, in view of Nam, et al (US 20180150261 A1), hereinafter Nam, further in view of Kim (US 20160148695 A1), and further in view of You (US 20210265004 A1).
Regarding claim 9, Lee as modified by Nam teaches the limitations of claim 1.
Lee does not teach the cell counter calculates a program ratio of the memory block, based on a cell current of a read operation performed by applying a reference read voltage for reading a program cell among a plurality of memory cells to a word line from the plurality of word lines.
Kim teaches a memory cell counting circuit for determining a ratio of programmed memory cells (¶[0011] teaches “memory cell counting operations for reading out a number of programmed memory cells or a number of unprogrammed memory cells via the memory cell counting circuit” and “comparing a number or ratio of programmed memory cells or a number or ratio of unprogrammed memory cells”).
Kim does not teach the ratio of programmed memory cells is determined based on a cell current of a read operation performed by applying a reference read voltage for reading a program cell among a plurality of memory cells to a word line from the plurality of word lines.
You teaches a cell counter sensing a cell current of a read operation by applying a reference read voltage for reading a program cell among a plurality of memory cells to a word line from the plurality of word lines (FIG. 13; ¶[0179] teaches “When the target block TARGET_BLK is the open block, the cell counter 1130 may read MSB data from an erase page Page i+2 most adjacent to a program page Page i+1 among the plurality of pages by using the first read voltage. The cell counter 1130 may sense a current flowing through the page buffer in a read operation on the MSB data.” Referencing FIG. 14, ¶[0182] further teaches “The cell counter 1400 may sense a current Icell flowing through the page buffer in a read operation using the first read voltage.”).
Therefore, Kim as modified by You teaches the cell counter calculates a program ratio of the memory block (Kim), based on a cell current of a read operation performed by applying a reference read voltage for reading a program cell among a plurality of memory cells to a word line from the plurality of word lines (You).
It would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Kim into the method of Lee to include calculating a ratio of programmed memory cells using a memory cell counting circuit. The ordinary artisan would have been motivated to modify Lee in the above manner for the purpose of detecting abnormally slow memory cells or abnormally fast memory cells in a program operation (Kim ¶[0011]).
It would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of You into the method of Lee to include a cell counter implemented by using a current sensing circuit. The ordinary artisan would have been motivated to modify Lee in the above manner for the purpose of calculating in the analog domain a memory cell count based on the result obtained by comparing a sensed current with a reference current (You ¶[0184]).
11. Claims 14, 16, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Seo, et al (US 20230215501 A1), hereinafter Seo, in view of Kang, et al (US 20240046993 A1), hereinafter Kang, further in view of You (US 20210265004 A1), and further in view of Nam, et al (US 20180150261 A1), hereinafter Nam.
Regarding independent claim 14, Seo teaches a storage device comprising:
a memory device (FIG. 1, 100) including a memory block (FIG. 2, BLK) including a plurality of select transistors (FIG. 2, e.g., SSTu, SSTd, GST) connected to a plurality of select lines (FIG. 2, e.g., SSL1u, SSL1d, GSL1) and a plurality of memory cells (FIG. 2, MC1..MC8) connected to a plurality of word lines (FIG. 2, WL1..WL8); and
a memory controller (FIG. 14, 1200) configured to provide the memory device with a health monitoring command for checking degraded select transistors (¶[0119] teaches “memory controller 1200 may send a command for cell-counting to the memory device 1100. The memory device 1100 may perform the cell-counting operation on the ground selection transistors in response to the received command.”) which exceed a normal threshold voltage distribution among the plurality of select transistors (¶[0120] teaches “the memory controller 1200 may determine whether the cell-counting result (e.g., the off cell count) is greater than a reference value. For example, that the cell-counting result (e.g., the off cell count) is greater than the reference value may mean that the ground selection transistors GST are degraded.”).
Seo does not teach receive, from the memory device, read reclaim information indicating whether the memory block is a read reclaim target, and control the memory device to perform a read reclaim operation on the memory block, based on the read reclaim information.
Kang teaches receive, from the memory device, read reclaim information indicating whether the memory block is a read reclaim target, and control the memory device to perform a read reclaim operation on the memory block, based on the read reclaim information (¶[0039] teaches “the command manager 111 of the storage controller 110 may provide the non-volatile memory device 120 with the command indicating the read reclaim determination. The non-volatile memory device 120 may be configured to determine whether the read reclaim is required. The command manager 111 may receive a determination result from the non-volatile memory device 120. The command manager 111 may issue the read reclaim command based on the determination result.”).
Seo further teaches wherein the memory device counts a number of the degraded select transistors of the plurality of select transistors in response to the health monitoring command (¶[0119] teaches “memory controller 1200 may send a command for cell-counting to the memory device 1100. The memory device 1100 may perform the cell-counting operation on the ground selection transistors in response to the received command.” ¶[0120] teaches “the memory controller 1200 may determine whether the cell-counting result (e.g., the off cell count) is greater than a reference value. For example, that the cell-counting result (e.g., the off cell count) is greater than the reference value may mean that the ground selection transistors GST are degraded.”).
While Seo teaches an “off cell count” in ¶[0120], which impacts cell current, Seo does not explicitly teach the count is based on a cell current.
You teaches a cell counter is implemented using a current sensing circuit (¶[0181-0182]).
Seo does not teach calculates a remaining read count of the memory block, based on the number of the degraded select transistors, and generates the read reclaim information according to a result obtained by comparing the remaining read count with a plurality of threshold read counts.
Nam teaches calculates a remaining read count of the memory block, based on the number of the degraded select transistors, and generates the read reclaim information according to a result obtained by comparing the remaining read count with a plurality of threshold read counts (FIG. 6B and ¶[0081] teach “if the read count exceeds a read threshold N1 (Operation S640), a reclaim operation is performed on the corresponding block (Operation S650)”; while “remaining” read count is not explicitly discussed, FIG. 7B illustrates in Case ‘A’, for example, the “remaining” read count for STR#2 is zero when the read count equals threshold N1=100 (see ¶[0087]), and in case ‘B’, the “remaining” read count is 50. Because remaining read count may be derived from read count, the two quantities carry the same information.).
It would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Kang into the method of Seo to include receive a determination result from a non-volatile memory device. The ordinary artisan would have been motivated to modify Seo in the above manner for the purpose of issuing the read reclaim command based on the determination result and supporting an on-chip operation of the read reclaim determination (Kang ¶[0039]).
It would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of You into the method of Seo to include a cell counter implemented by using a current sensing circuit. The ordinary artisan would have been motivated to modify Seo in the above manner for the purpose of calculating in the analog domain a memory cell count based on the result obtained by comparing a sensed current with a reference current (You ¶[0184]).
It would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Nam into the method of Seo to include determining when a reclaim operation should be performed based on read count. The ordinary artisan would have been motivated to modify Seo in the above manner for the purpose of using read count as an estimate of cell deterioration due to FN stress (Nam ¶[0078, 0080]).
Regarding claim 16, Seo as modified by Kang, You, and Nam teaches the limitations of claim 14.
You further teaches the read reclaim information indicates that the memory block is one of a foreground read reclaim target, a background read reclaim target, and an after health monitoring target according to a result obtained by comparing the remaining read count with the plurality of threshold read counts (FIG. 8, S803-809, referencing status codes of FIG. 6 based on read count/threshold comparisons; ¶[0139-0143]).
Regarding claim 18, Seo as modified by Kang, You, and Nam teaches the limitations of claim 14.
Seo further teaches the plurality of select transistors include a plurality of drain select transistors (FIG. 2, SSTu, SSTd) connected to a plurality of drain select lines (FIG. 2, SSL1u, SSL1d) among the plurality of select lines and a plurality of source select transistors (FIG. 2, GST coupled to GSL1, GST coupled to GSL2) connected to a source select line among the plurality of select lines (FIG. 2, GSL1, GSL2).
12. Claims 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Seo, et al (US 20230215501 A1), hereinafter Seo, in view of Kang, et al (US 20240046993 A1), hereinafter Kang, further in view of You (US 20210265004 A1), further in view of Nam, et al (US 20180150261 A1), hereinafter Nam, and further in view of Lee, et al (US 20180067697 A1), hereinafter Lee.
Regarding claim 19, Seo as modified by Kang, You, and Nam teaches the limitations of claim 18.
Seo does not teach the memory device counts a number of degraded drain select transistors corresponding to a selected drain select line among the plurality of drain select lines, based on a cell current of drain select transistors connected to the selected drain select line, and generates the cell count information, based on a result obtained by summing numbers of degraded drain select transistors respectively corresponding to the plurality of drain select lines.
Lee teaches the memory device counts a number of degraded drain select transistors corresponding to a selected drain select line among the plurality of drain select lines (FIG. 12, S440; ¶[0125]; ¶[0114] teaches selection transistors “may include the string selection transistors”), based on a cell current of drain select transistors connected to the selected drain select line (¶[0080] teaches “A change in a threshold voltage due to the disturbance or retention deterioration may be monitored by comparing the number of turned-on on-cells with a threshold value during the first operation. A change in a threshold voltage due to the disturbance or retention deterioration may be monitored by comparing the number of turned-off off-cells with the threshold value during the second operation.” See FIGS. 6 and 10.), and generates the cell count information, based on a result obtained by summing numbers of degraded drain select transistors respectively corresponding to the plurality of drain select lines (FIG. 12, S450 uses the sum produced by S440).
It would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Lee into the method of Seo to include counting a number of degraded drain select transistors. The ordinary artisan would have been motivated to modify Seo in the above manner for the purpose of determining if a reprogram operation should be scheduled (Lee ¶[0136]; FIG. 12, S450, S460).
Regarding claim 20, Seo as modified by Kang, You, Nam, and Lee teaches the limitations of claim 19.
Lee further teaches the health monitoring command instructs the memory device to count at least one of the number of the degraded drain select transistors and the number of the degraded source select transistors (FIG. 12, S440; ¶[0125]; ¶[0114] teaches selection transistors “may include the string selection transistors…and the ground selection transistors”).
13. Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Seo, et al (US 20230215501 A1), hereinafter Seo, in view of Kang, et al (US 20240046993 A1), hereinafter Kang, further in view of You (US 20210265004 A1), further in view of Nam, et al (US 20180150261 A1), hereinafter Nam, and further in view of You (US 20200233770 A1), hereinafter You ‘770.
Regarding claim 15, Seo as modified by Kang, You, and Nam teaches the limitations of claim 14.
Nam further teaches the memory device stores the read reclaim information in a status register (¶[0103] teaches “memory controller 110 may select the largest value from among the read counts of the first and third strings STR#1 and STR#3 of the second block BLK#2 and store the selected largest value in a register,” which occurs in response to a Read command (FIG. 9B)).
Seo further teaches reclaim information is calculated in response to the health monitoring command (¶[0119] teaches “memory controller 1200 may send a command for cell-counting to the memory device 1100. The memory device 1100 may perform the cell-counting operation on the ground selection transistors in response to the received command.” ¶[0120] teaches “the memory controller 1200 may determine whether the cell-counting result (e.g., the off cell count) is greater than a reference value.).
Kang further teaches providing the read reclaim information to the memory controller in response to a health monitoring information request command received from the memory controller (¶[0039] teaches “the command manager 111 of the storage controller 110 may provide the non-volatile memory device 120 with the command indicating the read reclaim determination. The non-volatile memory device 120 may be configured to determine whether the read reclaim is required. The command manager 111 may receive a determination result from the non-volatile memory device 120.).
You further teaches wherein the health monitoring command includes a set feature command (¶[0075] teaches “each threshold count Th may be changed from its factory set default value depending on a setting command”).
Seo does not teach wherein the health monitoring information request command includes a get feature command.
You ‘770 teaches a get feature command (¶[0147] teaches “parameter information stored in the ith CAM memory block CMBi may be output when a get feature command is received from the memory controller”).
It would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of You ‘770 into the method of Seo to include a get feature command. The ordinary artisan would have been motivated to modify Seo in the above manner for the purpose of a memory controller controlling the storage device on the basis of received parameter information (You ‘770 ¶[0147]).
Allowable Subject Matter
14. Claims 7-8 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 10-13 and 17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
15. The following is a statement of reasons for the indication of allowable subject matter.
Regarding claim 7, the prior art made of record and considered pertinent to the applicant’s disclosure does not teach the claimed limitation of the memory block is the foreground read reclaim target when the remaining read count is smaller than a first threshold read count among the plurality of threshold read counts, is the background read reclaim target when the remaining read count is greater than or equal to the first threshold read count and is smaller than a second threshold read count among the plurality of threshold read counts, and is the after health monitoring target when the remaining read count is greater than or equal to the second threshold read count and is smaller than a third threshold read count among the plurality of threshold read counts. Claim 8 depends on claim 7.
Regarding claim 10, the prior art made of record and considered pertinent to the applicant’s disclosure does not teach the claimed limitation of the health information manager calculates the remaining read count, based on a difference value between a value obtained by multiplying the number of the degraded select transistors and the program ratio and a threshold read count corresponding to the program ratio. Claims 11-13 depend on claim 10.
Regarding claim 17, the prior art made of record and considered pertinent to the applicant’s disclosure does not teach the claimed limitation of the memory controller provides the health monitoring command to the memory device when a read count of the memory block exceeds a health check read count, and provides the health monitoring command to the memory device after the read count of the memory block further increases by an after read count.
Conclusion
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/B.S.C./Examiner, Art Unit 2827
/AMIR ZARABIAN/Supervisory Patent Examiner, Art Unit 2827
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