DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims.
Therefore, the feature(s) “the controller adjusts a frequency of the display clock signal to correspond to the data signal” must be shown or the feature(s) canceled from the claim(s).
The feature(s) “the controller adjusts the frequency of the display clock signal according to grayscale value of the data signal” must be shown or the feature(s) canceled from the claim(s).
The feature(s) “counter… to drive a plurality of light-emitting components” must be shown or the feature(s) canceled from the claim(s). Although a counter is shown, no light-emitting components are shown, and no driving is shown.
The feature(s) “the grayscale values of the first display clock signal, the second display clock signal and the third display clock signal” must be shown or the feature(s) canceled from the claim(s).
The feature(s) “the controller generates an enable signal to the at least one driver, and the at least one driver begins to receive the data signal and the display clock signal according to the enable signal” must be shown or the feature(s) canceled from the claim(s).
The feature(s) “first driver generates another enable signal to the second driver after the first driver receives the enable signal” must be shown or the feature(s) canceled from the claim(s).
No new matter should be entered.
The drawings are objected to because:
Figure 1 should be designated by a legend such as --Prior Art-- because only that which is old is illustrated. See MPEP § 608.02(g).
In Fig. 1, it is unclear what quantity is plotted on each axis.
Separate figures are not separately labeled. See Fig. 1, for example. The Examiner suggests Fig. 1A and Fig. 1B, for example.
Views are not “grouped together and arranged on the sheet(s) without wasting space” as required by 37 CFR 1.84(h).
Fewer than all numbers, letters, and reference characters measure at least 1/8 inch in height as required by 37 CFR 1.84(p)(3).
The meaning of an arrow at the bottom of Fig. 3 is unclear, contrary to 37 CFR 1.84(r) which recites “Arrows may be used at the ends of the lines, provided that their meaning is clear”.
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(4) because reference characters 1 through 7 have been used to designate different features in different drawings. Compare the appearance of 1 through 7 in Figs. 4 and 5, for example.
The meaning of reference characters 1 through 15 is unclear in Fig. 5.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification
The disclosure is objected to because of the following informalities:
The SPEC recites “counter 124” on page 8. This is inconsistent with the appearance of Comparator 124 in Fig. 3.
The SPEC recites “the controller 110 sets the display clock signal PWMCK to 0, 1, 6, 15, 26, 37, 50, 63 respectively” on page 6. What units?
The SPEC recites “As shown in Fig. 4, the controller 110 adjusts the frequency of the display clock signal PWMCK, according to the aforementioned grayscale values of the data signal Din from 0 to 7” on page 6. This is inconsistent with the appearance of Fig. 4, wherein identical frequencies appear for portions of PWMCK labeled 4, 5, and six, seven.
The SPEC recites “PWMCLK_REF is a PWM signal with high and low levels set at 1 unit, Compared to the reference display clock signal PWMCLK_REF” on page 6. Based upon the capital letter after a comma, it is unclear whether a new sentence has begun or not. The Examiner suggests a period. Furthermore, the disclosure “PWMCLK_REF is a PWM signal” is inconsistent with the appearance of Fig. 4, which clearly shows PWMCLK_REF signal as a clock of fixed pulse width.
The SPEC recites “the high level of the display clock signal PWMCK corresponding to a grayscale value of 0 is 0 units”. This is misdescriptive of Fig. 4, wherein grayscale 0 is nowhere labeled.
The SPEC recites “the high level of PWM signal number 1 corresponding a grayscale value of 1 is 1 unit, and the high level of PWM signal number 2 corresponding to a grayscale value of 2 is 5 units” on page 6. This is inconsistent with the appearance of Fig. 4, which shows identical levels in a vertical direction for 1 and 2.
The SPEC recites “the high level of PWM signal number 3 corresponding to a grayscale value of 3 is 9 units, the unit difference in the high and low levels of each numbered PWM signal corresponds to the difference from the previous PWM signal” on page 6. This is inconsistent with the appearance of Fig. 4, wherein there is no difference between a high level of 3 and a high level of 2, and there is no difference between a low level of 3 and a low level of 2.
The SPEC recites “the high level of PWM signal number 4 corresponding to a grayscale value of 4 is … 11 units… The high level of PWM signal number 7 corresponding to a grayscale value of 7 is 13 units” on page 6. This is inconsistent with the appearance of Fig. 4, wherein a high level of 7 is identical to high levels of 1, 2, 3, 4, 5, and 6.
The SPEC recites “activating clock signals PWMCLKON_1, PWMCLKON_2, and PWMCLKON_3 respectively correspond to the activation times of PWM signals numbered 1, 2, and 3 in the display clock signal PWMCLK” on page 7. This is inconsistent with the appearance of Fig. 4, wherein a high level of PWMCLKON_2 begins prior to activation of 2 in PWMCLK, and wherein a high level of PWMCLKON_3 begins prior to activation of 3 in PWMCLK. Furthermore, the meaning of “activation” is unclear. Although the specification suggests encoding of grayscale data into a clock, encoded grayscale data never seem to be read, decoded, or otherwise used by any portion of the disclosed structure. Independent claim 1 requires “a data signal”, which means that the clock fails to function as any sort of resource-saving data signal substitute. In this context, it is unclear what it would mean for a grayscale to be activated with respect to a clock.
The SPEC recites “The controller 110 sets the display clock signal PWMCK as 0, 1, 6, 15, 26, 38, 50, 63 corresponding to the grayscale values of the third data signal from 0 to 7 as 0, 2, 6, 15, 27, 39, 51, 63, respectively” on page 8. The presence of two different sets of settings makes this disclosure ambiguous about which set of settings is to be actually set.
The SPEC recites “the before and after filled values” on page 8. The meaning of this disclosure is unclear.
The SPEC recites “the amplitude levels of the adjusted display clock signal PWMCK are a sorted sequence of 0 units, 1 unit, 1 unit, 4 units, 9 units, 1 unit, 2 units, 8 units, 1 unit, 9 units, 2 units, 1 unit, 11 units, 2 units, 12 units, 1 unit, as the display clock signal PWMCK shown in the Fig. 5” on page 8. This is inconsistent with the uniform amplitude appearing throughout PWMCK in Fig. 5.
The SPEC recites “The frequencies of the adjusted first display clock signal PWMCK_R, the adjusted second PWMCK_G, and the adjusted third display clock signal PWMCK_B are as shown in FIG. 6” on pages 9-10. This is inconsistent with the appearance of Fig. 6, wherein identical frequencies appear for each instance of 4, 5, 6, 7.
Two periods appear after one sentence on page 10.
The SPEC recites “our country’s patent law” on page 10 but fails to specify which country. Furthermore, the plural recitation “our” is inconsistent with the existence of one and only one named inventor. The Examiner encourages Applicant to verify and correct the inventorship. A request to correct inventorship under 37 CFR 1.48(a) must be accompanied by an application data sheet in accordance with 37 CFR 1.76 that identifies each inventor by his or her legal name and by the processing fee required under 37 CFR 1.17(i).
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-11 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Independent claim 1 recites “controller… generating… a display clock signal; and … driver… receiving … the display clock signal, wherein the controller adjusts a frequency of the display clock signal”. It is unclear whether “the display clock signal” received by a driver is a display clock signal prior to adjustment or a display clock signal after adjustment.
Claim 2 recites “adjusts the frequency of the display clock signal according to grayscale value of the data signal” in lines 1-2. The limitation “according to” is vague and indefinite. The “according to” relationship between frequency and grayscale value is not defined by the claim, nor is such a relationship known in the art.
Claim 4 recites “the at least one driver comprises a counter, receiving the display clock signal to drive”. It is unclear whether a counter receives or a driver receives. It is unclear whether a counter drives or whether a driver drives.
Claim 5 recites “the grayscale values of the first display clock signal, the second display clock signal and the third display clock signal.” It is unclear in what sense any clock signal could possibly be interpreted as having any grayscale value, grayscale being a feature of an image signal, rather than a feature of a clock signal.
Claim 5 recites “the controller generates the first display clock signal, the second display clock signal and the third display clock signal according to the grayscale values of the first display clock signal, the second display clock signal and the third display clock signal.” This is circular. It is unclear in what sense a controller could possibly generate clock signals “according to” properties of the very same not-yet-generated clock signals. Not yet existing, clock signals could not possibly serve as a basis for generating themselves “according to” themselves.
Claim 8 recites “the controller generates an enable signal to the at least one driver, and the at least one driver begins to receive the data signal and the display clock signal according to the enable signal.” This is misdescriptive of Applicant’s disclosed structure, which is devoid of any signal satisfying all features of this description.
Claim 9 recites “the first driver generates another enable signal to the second driver after the first driver receives the enable signal.” This is misdescriptive of Applicant’s disclosed structure, in which a first driver generates no such another enable signal at any time.
Claim 10 recites “driver receives the data signal according to the data clock signal” in lines 2-3. This is misdescriptive of the appearance of data clock signals PWMCLKON_2 and PWMCLKON_3 in Fig. 4, wherein PWMCLKON_2 is already high prior to a time of receiving data signal with grayscale value 2 and PWMCLKON_3 is already high prior to a time of receiving data signal with grayscale value 3.
Other pending claims are rejected by virtue of dependency from at least one indefinite claim.
Regarding claims 5-6 and 8-11: In the absence of a reasonably definite interpretation of a claim, it is improper to rely on speculative assumptions regarding the meaning of a claim and then base a rejection under 35 U.S.C. 103 on these assumptions (In re Steele, 305 F.2d 859,134 USPQ 292 (CCPA 1962)). See MPEP 2143.03.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al (US 20210125543 A1) in view of Li et al (US 20220293028 A1).
As recited in independent claim 1, Kim et al shows a driving structure 1000 for a display panel 100, comprising: a controller 600, generating (“timing controller 600 may rearrange the input image data IRGB and may provide the rearranged data” [0067]; “timing controller 600 may generate … a clock signal CLK” [0067]) a data signal (“rearranged image data RGB” [0073]) and a display clock signal CLK; and at least one driver 500, receiving (“timing controller 600 may rearrange the input image data IRGB and may provide the rearranged data to the data driver 500” [0067]) the data signal RGB and the display clock signal CLK, wherein a frequency (“at the same frequency” [0074]) of the display clock signal (CLK, wherein CLK controls gating scan signals as described in [0070]-[0071], wherein “data signals supplied through the data lines D may be synchronized with the scan signals” [0074]) corresponds to (“supply data signals to the data lines D during one frame period in accordance with the image refresh rate” [0074]) the data signal (“data signals supplied through the data lines D” [0074]).
As recited in independent claim 1, Kim et al is silent regarding whether the driver is disposed on the display panel, and the controller disposed on the display panel adjusts a display clock signal.
As recited in independent claim 1, Li et al shows that controller 110 adjusts (“timing controller 110 can make the display panel 120 operated under the variable refresh rate… when the display refresh rate of the display panel 120 is changed from a higher first frequency to a lower second frequency, a vertical blanking time is increased and the displayed brightness is reduced. In response thereto, the timing controller 110 may adjust the gate scanning control signals CLK1~CLKN to generate a plurality of adjusted gate scanning control signals” [0024]) a display clock signal (any one of CLK1~CLKN, for example).
Moreover, the Examiner finds that a controller adjusting a display clock signal was predictable before the effective filing date.
It would have been obvious to one of ordinary skill in the art prior to the effective filing date to use a controller to adjust a display clock signal. The rationale is as follows: one of ordinary skill in the art would have had reason to adapt a display clock signal to changes as a reaction to frequency changes in a data signal to be displayed so as to avoid noticeable flicker caused by brightness changes as taught by Li et al (“timing controller 110 can make the display panel 120 operated under the variable refresh rate… when the display refresh rate of the display panel 120 is changed from a higher first frequency to a lower second frequency, a vertical blanking time is increased and the displayed brightness is reduced. In response thereto, the timing controller 110 may adjust the gate scanning control signals CLK1~CLKN to generate a plurality of adjusted gate scanning control signals” [0024]).
Regarding the limitations “disposed on the display panel”: There is no invention in relocating known parts, when the functioning of the apparatus is not changed by the relocation. In re Japikse, 181 F.2d 1019, 86 USPQ 70 (CCPA 1950). In this case, Applicant has provided no evidence of unexpected results due to the recited locations of controller nor driver.
Official notice is taken of the fact that a display panel was a known location for controllers and drivers prior to the effective filing date.
Moreover, the Examiner finds that controllers and drivers on a display panel were predictable before the effective filing date.
It would have been obvious to one of ordinary skill in the art prior to the effective filing date to arrive at the recited location in the absence of criticality. The rationale is as follows: one of ordinary skill in the art would have had reason to reduce assembly steps by fabricating controllers and drivers on a panel as was known in the art.
Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al (US 20210125543 A1) in view of Li et al (US 20220293028 A1) as applied above, and further in view of Ostlund (US 20080309652 A1).
Kim et al show a driving structure as described above.
As recited in claim 7, Kim et al are silent regarding whether the controller comprises a display clock signal generator, the display clock signal generator generates the display clock signal according to the content of the data signal.
As recited in claim 7, Li et al show that a controller 110 comprises a display clock signal generator 111, the display clock signal generator 111 generates a display clock signal CK1~CKN.
Moreover, the Examiner finds that a display clock signal generator generating a display clock signal was predictable before the effective filing date.
It would have been obvious to one of ordinary skill in the art prior to the effective filing date to generate a display clock signal with a display clock signal generator of a controller of Kim et al as taught by Li et al. The rationale is as follows: one of ordinary skill in the art would have had reason to control gate scanning as taught by Li et al (“timing control device 110 includes to a control circuit 111. The control circuit 111 is coupled to a display panel 120. The control circuit 111is configured to generate a plurality of gate scanning control signals CLK1~CLKN … and transports the gate scanning control signals CLK1~CLKN and the data transmission control signal TP to the display panel 120 for driving the display panel 120” [0022]).
As recited in claim 7, Ostlund teaches clocking a display scan according to (“adaptive refresh rate controller 320 may calculate a refresh rate based on image data 310. … adaptive refresh rate controller 320 may determine that image data 310 includes a video format of 30 fps, and display 130 may have a variable refresh rate between 50-100 Hertz (Hz). Adaptive refresh rate controller 320 may calculate a refresh rate of 90 Hz, since 90 is an integer multiple of 30 (i.e., 3.times.30). In such implementation, adaptive refresh rate controller 320 may adaptively control the refresh rate of display 130 by providing this refresh rate to display controller 330” [0045]; “if device 100 operates in a playback mode for displaying stored image data 310 (e.g., a video), adaptive refresh rate controller 320 may calculate a corresponding refresh rate. If display 130 displays semi-static information, such as time and date information, adaptive refresh rate controller 320 may calculate a corresponding refresh rate” [0047]; “As illustrated in FIG. 6a, the user may be taking a video of his/her mother gardening in the backyard. Image data 310 (i.e., the video) may include a frame rate of 24 fps. Display 130 may include a refresh rate interval of 50-80 Hertz (Hz.). In one implementation, for example, adaptive refresh rate controller 320 may calculate a refresh rate based on the formatted image data 310. For example, adaptive refresh rate controller 320 may calculate a multiple factor of the 24 fps that falls within the refresh rate interval of display 130. Thus, for example, display 130 may operate at a refresh rate of 72 Hz, which is a multiple integer of 24 fps (i.e., 3.times.24=72)” [0061]; “As illustrated in FIG. 6b, if the user finishes watching the video of his/her mother gardening in the backyard, display 130 may display semi-static information, such as the date, the time, battery information 610, and strength of wireless connection to a network 620. In one implementation, for example, adaptive refresh rate controller 320 may calculate a refresh rate based on image data 310 (i.e., the semi-static information). For example, adaptive refresh rate controller 320 may scan image data 310 and calculate a refresh rate based on the formatted image data 310. Adaptive refresh rate controller 320 may determine that a minimal refresh rate value would be sufficient since image data 310 is semi-static. Thus, display 130 may operate at the minimal refresh rate (e.g., at a refresh rate of 50 Hz)” [0062]) the content (“mother gardening in the backyard” [0061]; “the date, the time, battery information 610, and strength of wireless connection to a network 620” [0062]) of the data signal (“image data 310” [0045]).
Moreover, the Examiner finds that clocking a display scan according to content of a data signal was predictable before the effective filing date.
It would have been obvious to one of ordinary skill in the art prior to the effective filing date to clock a display scan according to content of Kim et al’s data signal as taught by Ostlund. The rationale is as follows: one of ordinary skill in the art would have had reason to adaptively control the refresh rate in order to prolong battery life by using a minimal sufficient refresh rate for semi-static content as taught by Ostlund (“adaptive refresh rate controller 320 may calculate a refresh rate based on power considerations” [0049]; “Adaptive refresh rate controller 320 may determine that a minimal refresh rate value would be sufficient since image data 310 is semi-static. Thus, display 130 may operate at the minimal refresh rate” [0062]) and to reduce flicker by clocking a scan as a multiple integer of a frame rate of image data as taught by Ostlund (“determining a refresh rate may include calculating a multiple integer corresponding to an image format of the image” [0014]).
Allowable Subject Matter
Claims 2-4 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
Reasons for the indication of allowable subject matter will be stated after the claims become clear and definite.
Conclusion
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Any inquiry concerning this communication or earlier communications from the examiner should be directed to Julie Anne Watko whose telephone number is (571)272-7597. The examiner can normally be reached Monday-Tuesday 9AM-5PM, Wednesday 10:30AM-5PM, Thursday-Friday 9AM-5PM, and occasional Saturdays.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ke Xiao can be reached at 571-272-7776. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
JULIE ANNE WATKO
Primary Examiner
Art Unit 2627
/Julie Anne Watko/Primary Examiner, Art Unit 2627
11/08/2025