DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after allowance or after an Office action under Ex Parte Quayle, 25 USPQ 74, 453 O.G. 213 (Comm'r Pat. 1935). Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, prosecution in this application has been reopened pursuant to 37 CFR 1.114. Applicant's submission filed on 01/20/2026 has been entered.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-2 and 4-6 are rejected under 35 U.S.C. 103 as being unpatentable over Miyake et al. (US 2015/0171156) in view of Nishitoba et al. (US 2005/0174307) both cited in the IDS dated 01/15/2025.
Regarding claim 1, Miyake teaches a semiconductor device (see abstract and ¶12) comprising a pixel (a pixel 10, see abstract, Fig 3B, ¶98-¶99),
first to six transistors (six transistors 15t, 11, 12t, 16t, 19t, 17t, see ¶98-¶99, and Fig 3B);
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a display element (a light emitting element 14, ¶94), one of a source and a drain of the first transistor (the drain of the transistor 15t, see ¶61) is electrically connected to a gate of the second transistor (the gate of the transistor 11 see ¶61), and one of a source and a drain of the third transistor (the source of the transistor 12t see ¶61), one of a source and a drain of the second transistor (the drain of the transistor 11 see ¶61) is electrically connected to the other of the source and the drain of the third transistor (the drain of the transistor 12t see ¶61), one of a source and a drain of the fifth transistor (the source of the transistor 19t, see ¶61), and one of a source and a drain of the sixth transistor (the source of the transistor 17t, see ¶61), a back gate of the second transistor is electrically connected to one of a source and a drain of the fourth transistor (a second gate of the transistor 11 is electrically connected to the source of the fourth transistor 16t, see ¶72 and ¶191), the other of the source and the drain of the fifth transistor is electrically connected to the display element (the drain of the fifth transistor 19t is electrically connected to the light emitting element 14).
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Miyake fails to teach a gate of the fifth transistor is electrically connected to one electrode of the seventh transistor.
Figure 19 of Nishitoba teaches a gate of the fifth transistor 28 is electrically connected to one electrode of the seventh transistor 26. (See ¶106-¶107).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention (AIA ), to implement a gate of the fifth transistor 28 is electrically connected to one electrode of the seventh transistor 26, as Nishitoba teaches, to modify the embodiment of Figure 3B of Miyake. The motivation for doing so would suppress the deterioration in the representation accuracy of grayscale levels of pixels, resulting from the variation in transistors formed within the display panel. See Nishitoba ¶9.
Regarding claim 2, Miyake teaches the semiconductor device according to claim 1, wherein a gate of the third transistor is electrically connected to a gate of the fourth transistor (a gate of the third transistor 12t and a gate of the fourth transistor 16t are connected to the same GLb. See Figure 3B and ¶95).
Regarding claim 4, Miyake teaches the semiconductor device according to claim 1, wherein each of the first to seventh transistors comprises a metal oxide in an oxide semiconductor layer. (See ¶198, ¶200 and ¶205).
Regarding claim 5, Miyake teaches the semiconductor device according to claim 4, wherein the metal oxide comprises indium. (See ¶262).
Regarding claim 6, Miyake teaches the semiconductor device according to claim 1, wherein the display element comprises an organic EL element having a tandem structure. (See ¶70 and ¶410).
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 19-22 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Miyake et al. (US 2015/0171156) cited in the IDS dated 01/15/2025.
Regarding claim 19, Miyake teaches a semiconductor device (see abstract, ¶12) comprising a pixel (a pixel 10, see abstract, Fig 3A, ¶12, ¶93-¶95),
first to third transistors (three transistors 15t, 11 and 12t, see ¶94, Fig 3A); and
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a display element (a light emitting element 14, ¶ 94);
wherein one of a source and a drain of the first transistor (the drain of the transistor 15t, see ¶61) is electrically connected to a gate of the second transistor (the gate of the transistor 11 see ¶61), and one of a source and a drain of the third transistor (the source of the transistor 12t see ¶61),
wherein one of a source and a drain of the second transistor (the drain of the transistor 11 see ¶61) is electrically connected to the other of the source and the drain of the third transistor (the drain of the transistor 12t see ¶61),
wherein the one of the source and the drain of the second transistor (the drain of the transistor 11 see ¶61) is electrically connected to the display element (the light emitting element 14).
Regarding claim 20, Miyake teaches the semiconductor device according to claim 19, wherein each of the first to third transistors comprises a metal oxide in an oxide semiconductor layer (See ¶198, ¶200 and ¶205).
Regarding claim 21, Miyake teaches the semiconductor device according to claim 20, wherein the metal oxide comprises indium (See ¶262).
Regarding claim 22, Miyake teaches the semiconductor device according to claim 19, wherein the display element comprises an organic EL element having a tandem structure. (See ¶70 and ¶410).
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 19 and 22 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Park et al. US 2020/0118494.
Regarding claim 19, Park teaches a semiconductor device (semiconductor layer, see ¶21) comprising a pixel (a pixel shown in figure 2, see ¶52 and ¶98-¶100),
first to third transistors (three transistors SCT1, SCT2, SCT3, see ¶100); and
a display element (a light emitting device EL, see Park ¶101-¶103) ,
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wherein one of a source and a drain of the first transistor (a drain of a first transistor SCT1) is electrically connected to a gate of the second transistor (a gate of a second transistor DRT), and one of a source and a drain of the third transistor (a source of the third transistor SCT2. See Park at least ¶108-¶111 and Figure 2),
wherein one of a source and a drain of the second transistor (a drain of the second transistor DRT) is electrically connected to the other of the source and the drain of the third transistor (a drain of the third transistor SCT2. See Park at least ¶108-¶111, and Figure 2),
wherein the one of the source and the drain of the second transistor (the drain of the second transistor DRT) is electrically connected to the display element (the light emitting device EL. See Park at least ¶108-¶111 and Figure 2).
Regarding claim 22, Park teaches the semiconductor device according to claim 19, wherein the display element comprises an organic EL element having a tandem structure. ( [0103] The light emitting device (EL) can include a first electrode (E1) (e.g., an anode electrode or a cathode electrode), a light emitting layer, a second electrode (e.g., a cathode electrode or an anode electrode), and the like. )
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 20-21 are rejected under 35 U.S.C. 103 as being unpatentable over Park et al. as applied to claim 19 above, and further in view of Chen et al. (US 10,777,124).
Regarding claims 20-21, Park fails to teach each of the first to third transistors comprises a metal oxide in an oxide semiconductor layer, and the metal oxide comprises indium.
Chen teaches at least three transistors are metal-oxide-semiconductor field effect transistor and indium gallium zinc oxide transistor. See Chen Col. 12, line 60 to Col. 13, line 12.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention (AIA ), to implement at least three transistors are metal-oxide-semiconductor and indium gallium zinc oxide, as Chen teaches, to modify the three transistors of Park. The motivation for doing so would improve the high quality of the resolution being displayed, while enhancing a precision of controlling brightness in a low grayscale region of the light-emitting display device. (See Chen Col. 13, lines 13-22).
Allowable Subject Matter
Claim 3 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 7-18 are allowed.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Kevin Nguyen whose telephone is 571-272-7697. The examiner can normally be reached M-F 8am-5pm Eastern Time.
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KEVIN M NGUYEN
Patent Examiner, Art Unit 2628
/Kevin M Nguyen/Primary Examiner, Art Unit 2628 Telephone: (571) 272-7697
Email: kevin.nguyen2@uspto.gov