DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The abstract of the disclosure is objected to because of grammar. It is suggested to amend as follows:
A memory device includes a pseudo-random bit stream (PRBS) generator circuit with a linear feedback shift register (LFSR) which has a number of latches. Data terminals of the memory are associated with a LFSR variation circuit which selects one of the latches and couples the selected latch to an associated data terminal. By varying settings such as which latch each of the DQ terminals is coupled to, the sequence of bits of the PRBS may be varied between the data terminals.
A corrected abstract of the disclosure is required and must be presented on a separate sheet, apart from any other text. See MPEP § 608.01(b).
Appropriate correction is required.
Drawings
The drawings are objected to because of the following reasons:
Regarding FIG. 2: If the data output of each latch within the LFSR is being fed into the input of a subsequent latch but also is being input to a multiplexer then these nets or wires should be the same but yet are currently drawn as separate nets or wires in the drawing. In other words what is the terminal at the bottom of each latch that is being coupled to a respective data terminal DQ if the terminal on the right side of each latch is a data output terminal?
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claim 1 is objected to because of the following informalities:
Regarding claim 1: To make it clear what is the antecedent basis for “the output terminal of the multiplexer” it is suggested to amend the claim as follows:
Claim 1: An apparatus comprising:
a linear feedback shift register (LFSR) comprising a plurality of latch circuits;
a multiplexer with a first input terminal coupled to one of the plurality of latch circuits and a second input terminal coupled to another of the plurality of latch circuits, wherein the multiplexer is configured to couple the first input terminal or the second input terminal to an output terminal of the multiplexer; and
a data terminal coupled to the output terminal of the multiplexer.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 8 and 14 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 8: It is indefinite as to what is the antecedent basis for “the multiplexer” since a multiplexer was introduced in claim 1 but now a second multiplexer was introduced in claim 2 with the “wherein” clause referring to “the multiplexer”. Consequently, the antecedent bases for “the first input terminal” and “the second input terminal” are indefinite.
Furthermore, it is indefinite as to whether “an output terminal” is the same as or different from “an output terminal” introduced in claim 1. Then the limitation “the output terminal of the second multiplexer” lacks sufficient antecedent basis.
Regarding claim 14: It is unknown what is meant by “experiences” in the context of an apparatus. Hence, the claim is indefinite.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 4, 5, 6, 9, 12-15, and 18-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim et al. (US 2002/0138800).
Regarding claim 1: Kim (FIG. 5; [0033-0035]) teaches an apparatus comprising:
a linear feedback shift register (LFSR) (520 of FIG. 5) comprising a plurality of latch circuits (523, 524, 525 of FIG. 5);
a multiplexer (532 of FIG. 5) with a first input terminal (2) coupled to one of the plurality of latch circuits and a second input terminal (3) coupled to another of the plurality of latch circuits, wherein the multiplexer is configured to couple the first input terminal or the second input terminal to an output terminal [of the multiplexer] (output of 532); and
a data terminal (Data IN terminal of a memory 550) coupled to the output terminal of the multiplexer.
Regarding claim 4: Kim ([0038]) teaches the apparatus of claim 1, further comprising an inverter circuit (see inverter between 532 and 534 in FIG. 5) configured to selectively invert the information from the output terminal of the multiplexer before providing the information to the data terminal.
Regarding claim 5: Kim (Kim teaches in [0036] that Data IN is 4 bits in width; hence, this means that for each bit there is one instance of 532, inverter and 534) teaches the apparatus of claim 1, further comprising:
a second multiplexer (a second instance of 532 for a second bit of Data IN) with a first input terminal coupled to one of the plurality of latch circuits and a second input terminal coupled to another of the plurality of latch circuits, wherein the second multiplexer is configured to couple the first input terminal or the second input terminal of the second multiplexer to an output terminal of the second multiplexer; and
a second data terminal (each bit of Data IN has a terminal; hence a second terminal exists for the second bit of Data IN) coupled to the output terminal of the second multiplexer.
Regarding claim 6: Kim teaches the multiplexer includes a plurality of input terminals (2, 3, 4) each coupled to a respective one of the plurality of latch circuits.
Regarding claim 9: Kim (FIG. 5; [0033-0035]) teaches an apparatus comprising:
a linear feedback shift register (LFSR) circuit (520 of FIG. 5) comprising a plurality of latch circuits (523, 524, 525 of FIG. 5);
a plurality of data terminals (Kim teaches in [0036-0039] that Data IN is 4 bits in width; hence, this means that for each bit there is one instance of 532, inverter and 534. Accordingly, Data IN has four data terminals); and
a plurality of LFSR variation circuits (four instances, each instance has a respective inverter and a respective instance of 534), each associated with one of the plurality of data terminals, wherein each of the plurality of LFSR variation circuits is configured to couple the associated one of the plurality of data terminals to a selected one of the plurality of latch circuits based on a respective one of a plurality of LFSR variation settings (535).
Regarding claim 12: Kim teaches the apparatus of claim 9, wherein each of the plurality of LFSR variation circuits includes a multiplexer circuit (534) with at least two input terminals coupled to at least two of the plurality of latch circuits and an output coupled to the associated one of the plurality of data terminals.
Regarding claim 13: Kim teaches the apparatus of claim 12, wherein each of the plurality of LFSR variation circuits includes an inverter circuit (the inverter between 532 and 534) configured to selectively invert the output coupled to the associated one of the plurality of data terminals ([0038]).
Regarding claim 14: In so far as definite, Kim teaches each of the plurality of latches of the LFSR experiences a different pseudo-random bit stream (over time different patterns of bits over the entire width/stream of Data IN are generated; see [0015, 0032, 0033-0038]).
Regarding claim 15: Kim (FIG. 5; [0033-0035]) teaches a method comprising:
generating a pseudo random bit stream (PRBS) using a linear feedback shift register (LFSR) (520 of FIG. 5) comprising a plurality of latches (523, 524, 525);
selecting one of the plurality of latches (by using multiplexer 532); and
coupling the selected one of the plurality of latches to a data terminal (Data IN in FIG. 5).
Regarding claim 18: Kim teaches the method of claim 15, further comprising selecting between a first or a second latch of the plurality of latches with a multiplexer (532 of FIG. 5).
Regarding claim 19: Kim teaches the method of claim 15, further comprising selecting between all of the plurality of latches with a multiplexer (532 of FIG. 5).
Regarding claim 20: Kim teaches the method of claim 15, further comprising selectively inverting the output of the selected one of the plurality of latches (by using the inverter between 532 and 534 in FIG. 5 and multiplexer 534 in FIG. 5).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 2002/0138800) in view of Lee et al. (US 2012/0144277).
Kim does not specifically teach the method further comprises initializing the LFSR based on a seed.
Lee (2012/0144277; [0053]) states “The LFSR control circuit 74 may initialize the LFSR register 72 to the seed. Responsive to the seed, the LFSR may generate a series of pseudo-random numbers. More particularly, the seed may be used as the first pseudo-random number. As each pseudo-random number is consumed by the circuit 78, randomizing data to/from the page, the LFSR may generate the next number in the series.”
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching of Lee into the device and/or method of Kim in a manner such that the LFSR would be initialized based on a seed by the BIST Controller. The motivation to do so would have been to provide an initial value to the shift register to begin the process of generating the pseudo-random test data (see [0014, 0019, 0031, 0032, 0036] of Kim).
Allowable Subject Matter
Claims 2-3, 7, 10, 11 and 17 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAY W RADKE whose telephone number is (571)270-1622. The examiner can normally be reached M-F 9-6 EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Amir Zarabian can be reached at 272-1852. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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JAY W. RADKE
Primary Examiner
Art Unit 2827
/JAY W. RADKE/Primary Examiner, Art Unit 2827
Prosecution Insights