DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(4) because reference character “S530” has been used to designate both Case 1 and Case 2; wherein step S520, step S530 Case 1, and step 530 Case 2 are interpreted to each be unique operations within the program operation of the current memory page. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claims 1 and 10 are objected to because of the following informalities:
Claim 1, line 9 of page 1, should read as, “. . . the memory controller further applies a pass voltage . . .”
Claim 1, lines 11-12 of page 1, should read as, “. . . through the previous word line and a current word line, respectively.”
Claim 10, line 23 of page 2, should read as, “. . . array, and the memory array comprises a plurality of memory pages, . . .”
Claim 10, lines 4-5 of page 3, should read as, “. . . through the previous word line and a current word line, respectively.”
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 1-18 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites,
“wherein in a program operation of a current memory page, the memory controller applies a plurality of compensation voltages to a plurality of low threshold parts of a plurality of states of a threshold voltage distribution of a previous memory page through a previous word line, and [the] memory controller further applies a pass voltage to the plurality of states of the threshold voltage distribution of the previous memory page and a plurality of corresponding states of a threshold voltage distribution of the current memory page through the previous word line and a current word line.” (emphasis added).
The limitations of claim 1 cited above can be interpreted to narrate a paradoxical scenario in which conflicting voltages are applied to the previous word line, concurrently, within the program operation of a current memory page because there is no provision identifying when the conflicting voltages are distinctly applied, as expressed by the specification. In other words, claim 1 recites the memory controller applies a plurality of compensation voltages through a previous word line and a pass voltage through the previous word line during the program operation of the current memory page, in a manner that suggests these functions occur simultaneously.
According to the specification, the compensation voltages and the pass voltage are conditionally applied to the previous word line based on target programming state of the current memory page (see FIG. 4). For example, if the target programming state of the current memory page is one of programming states S0-S4, then a plurality of compensation voltages is applied to memory cells of the previous memory page through the previous word line (see FIG. 5, step S520); and if the target programming state of the current memory page is one of the programming states S5-S7, then no compensation voltage is applied to memory cells of the previous memory page through the previous word line and a pass voltage is applied through the previous word line (see FIG. 5, step S530 Case 1). Claim 1 does not reflect these provisions associated with the application of the plurality of compensation voltages and the pass voltage, nor does claim 1 recite the memory controller applies one of the plurality of compensation voltages and the pass voltage based on the target programming state. Of the current memory page.
The applicant is advised to amend claim 1 to either recite distinct conditional requirements that result in the application of the plurality of compensation voltages or the pass voltage to the previous memory page through the previous word line (as in step S520 and Case 1 of step S530 of FIG. 5), respective to the conditional requirements; or clarify that the memory controller applies only one of the plurality of compensation voltages and the pass voltage to the previous memory page through the previous word line based on a target programming state of the current memory page.
Additionally, Claim 1 recites,
“wherein in a program operation of a current memory page, the memory controller applies a plurality of compensation voltages to a plurality of low threshold parts of a plurality of states of a threshold voltage distribution of a previous memory page through a previous word line, and [the] memory controller further applies a pass voltage to the plurality of states of the threshold voltage distribution of the previous memory page and a plurality of corresponding states of a threshold voltage distribution of the current memory page through the previous word line and a current word line.” (emphasis added).
It is unclear how a plurality of compensation voltages are applied to a plurality of low threshold parts of a plurality of states of a threshold voltage distribution of a previous memory page through the previous word line; a pass voltage is applied to the plurality of states of the threshold voltage distribution of the previous memory page through the previous word line; and a pass voltage is applied to a plurality of corresponding states of a threshold voltage distribution of the current memory page through the current word line. That is, the plurality of states of the threshold voltage distribution is an abstraction of a memory array’s memory cell properties—applying a voltage to an abstraction is a nebulous expression.
As best understood by the examiner, the plurality of compensation voltages and the pass voltage are applied to the previous memory page through the previous word line, conditionally, to either manipulate the plurality of states stored in the memory page, or not, depending on the plurality of states stored by memory cells of the previous memory page and the target programming state of the current memory page.
The applicant is advised to amend these defects of claim 1 as or similar to, “. . . the memory controller applies a plurality of compensation voltages to a previous memory page through a previous word line to compensate a plurality of low threshold parts of a plurality of states of a threshold voltage distribution , or the memory controller applies a pass voltage to the previous memory page and the current memory page through the previous word line and a current word line, respectively.“
Moreover, claim 1 recites the limitation, “a plurality corresponding states.” Claim 1 does not clearly identify a limitation associated with the corresponding states (i.e., to what the corresponding states are related to).
Claims 2-9 are rejected because they depend on claim 1; and, therefore, contain at least the same defect(s).
Claims 2 and 6-7 are rejected because they also contain defects consistent with indefiniteness rejection of claim 1 above (see item No. 6). That is, the claims express limitations wherein the memory controller applies various conflicting voltages through the previous word line without a distinct conditional requirement in the same program operation.
Claims 2-3 and 6-7 are rejected because they also contain defects consistent with the indefiniteness rejection of claim 1 above (see item No. 7). That is, the claims express limitations wherein a voltage is applied to a plurality of states.
Claim 10 is rejected because it contains a similar defect identified in the indefinite rejections of claim 1 above (items No. 6-8). Applicant is advised to amend claim 10 similarly to the recommended amendment for claim 1 above.
Claims 11-18 are rejected because they depend on claim 10; and, therefore, contain at least the same defect(s).
Claims 11 and 15-16 are rejected because they also contain defects consistent with the indefiniteness rejection of claim 10 above. That is, the claims express limitations wherein the memory controller applies various conflicting voltages through the previous word line without a distinct conditional requirement in the same program operation.
Claims 11-12 and 15-16 are rejected because they also contain defects consistent with the indefiniteness rejection of claim 10 above. That is, the claims express limitations wherein a voltage is applied to a plurality of states.
Allowable Subject Matter
Claims 1 and 10 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action.
Claims 2-9 and 11-18 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
The prior art made of record and considered pertinent to the applicant’s disclosure, taken individually or in combination, does not teach or suggest the claimed limitation(s) of compensating a plurality of low threshold parts of a plurality of states of a threshold voltage distribution by applying a compensation voltage to a previously programmed memory page during the program operation of a current memory page in combination with the other limitations recited in independent claims 1 and 18. Claims 2-9 and 11-18 depend on claims 1 and 10, respectively; and therefore, are allowable for at least these reasons.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JUSTIN BRYCE HEISTERKAMP whose telephone number is (703)756-1095. The examiner can normally be reached M-F 0800-1700.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Amir Zarabian can be reached at (571) 272-1852. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JUSTIN BRYCE HEISTERKAMP/Examiner, Art Unit 2827
/AMIR ZARABIAN/Supervisory Patent Examiner, Art Unit 2827
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