DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This is the initial Office Action based on the application filed 01/17/2025. Claims 1-20 are presented for examination and have been considered below.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-7, 15, and 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Chen (US20140068365A1) and further in view of Papandreou (US10957407B1).
Claim 1: Chen teaches a memory system, including:
a memory device (e.g., item 94, fig. 1) including a plurality of word lines, wherein each word line is coupled to a plurality of memory cells, and the plurality of memory cells coupled to a same word line form at least one physical page (e.g., see figs. 4, 6 and 7 - ¶[0035], [0045], [0057]);
a memory controller (e.g., item 100, fig. 1) coupled to the memory device (e.g., item 94) and configured to: when performing a read scrub operation, obtain a first parameter of a first physical page of a plurality of physical pages (e.g., generating statics (STATS) during read scrub and updating channel parameters -¶[0043]-[0047]), and wherein the plurality of physical pages includes the first physical page and a second physical page, the first physical page is a target physical page of the read scrub operation in the plurality of physical pages, and the second physical page is another physical page other than the first physical page of the plurality of physical pages(e.g., see figs. 4, 6 and 7 - ¶[0035], [0045], [0057]);
generate a first parameter of a second physical page according to the first parameter of the first physical page (e.g., ¶[0061], [0088] & Figs, 6-7) in combination with a location relationship between the second physical page and the first physical page; and
store the first parameter of the first physical page and the first parameter of the second physical page (e.g., ¶[0043], [0068]).
Not explicitly taught by Chen is that the first parameter is a parameter in a preset model for generating a target reference voltage, and generation of a second-page parameter using a location relationship. However, Papandreou supplies these missing limitations. Papandreou teaches that relative shift values between read voltages are determined based on a location relationship (word-line and page type) using a predetermined voltage mapping (col. 17, lines 10-14, lines 17-20). Papandreou’s mapping is itself a “preset model” for generating target reference voltages, as it correlates relative shifts to the actual read voltages for a given operating state. Therefore, it would have been obvious to one of ordinary skill in the art to apply Papandreou’s location-based mapping framework to Chen’s read-scrub parameter generation to efficiently derive parameters for neighboring pages without additional reads, thereby reducing calibration overhead.
Claims 18 and 20 are rejected on the same basis, as they recite the memory controller and method corresponding to Claim 1.
Claim 2: Chen and Papandreou teach the memory system of claim 1, wherein the memory controller is configured to: generate the first parameter of the second physical page according to the first parameter of the first physical page, the location relationship between the second physical page and the first physical page in combination with a mapping function, wherein the mapping function represents a relationship between first parameters of the plurality of physical pages. For instance, Papandreou expressly teaches the “predetermined voltage mapping” that represents relationships among page parameters (e.g., col. 16, lines 4-9; col. 16, lies 66-67 & col. 17, lines 1-5).
Claim 3: Chen and Papandreou teach the memory system of claim 2, wherein a number of memory bits of the memory cell is P bits, and P memory bits correspond to 2" -1 levels of read voltages, wherein P is an integer greater than or equal to 1, and the mapping function includes 2" -1 first mapping functions corresponding to the 2" -1 levels of read voltages respectively. For instance, Papandreou teaches that the number of read voltages corresponds to the number of bits per cell (TLC with 7 read voltages, QLC with 15 read voltages, col. 13, lines 37-42; col. 11, lines 50-54), ]), making it obvious to define mapping functions accordingly.
Claim 4: Chen and Papandreou teach the memory system of claim 3, wherein the plurality of word lines includes Q word line groups, a first mapping function includes Q second mapping functions corresponding to the Q word line groups respectively, and a relationship between the first parameters of the physical pages coupled to each word line in a same word line group conforms to the corresponding second mapping function, wherein Q is an integer greater than or equal to 1; and the memory controller is configured to: when obtaining the first parameter of the first physical page, obtain the first parameter of a physical page coupled to at least one word line in each word line group of the Q word line groups. For instance, Papandreou teaches that different layers or groups of word-lines may have different absolute shifts (e.g., col. 23 lines 63-67 & col. 24, lines 1-5), which would naturally lead to using different mapping functions for different word-line groups. Thus, it would have been obvious to implement these mappings in Chen’s system.
Claim 5: Chen and Papandreou teach the memory system of claim 1, wherein the memory controller is configured to: during a read operation after performing a read scrub operation, obtain a target reference voltage of at least one of the second physical pages based on the stored first parameters of the second physical pages; and perform the read operation on the at least one of the second physical pages according to the obtained target reference voltage of the at least one of the second physical pages. For instance, Chen teaches that updated reference voltages are computed based on parameters and used to read data via VREF (¶[0049], [0031]). This inherently covers later read operations using the stored target reference voltages.
Claim 6: Chen and Papandreou teach the memory system of claim 1, wherein a Nth updated parameter table includes the first parameter of the first physical page and the first parameter of the second physical page being stored for the Nth time; the memory controller is configured to: when performing the read scrub operation, obtain read results of the first physical page; when the read results are not decoded successfully, update the first parameter of the first physical page based on the first parameter of the first physical page stored in the Nth updated parameter table, and generate the first parameter of the second physical page according to the updated first parameter of the first physical page; and store the updated first parameter of the first physical page and the generated first parameter of the second physical page for the (N+1)th time as the (N+1)th updated parameter table, wherein N is a positive integer. For instance, Chen teaches storing parameters in parameter memory (¶[0068]), updating parameters based on decoding statistics (¶[0070]) (which would include decode failures), and regenerating neighboring page parameters for MLC upper pages (¶[0061], [0088]). Chen also teaches storing updated parameters (¶[0068]). The use of a parameter table (Nth) is inherent in storing multiple versions. Papandreou’s mapping function) would be an obvious mechanism for regeneration.
Claim 7: Chen and Papandreou teach the memory system of claim 6, wherein the memory controller is configured to: in response to the memory system being powered on, load a relation table representing a mapping function and the Nth updated parameter table from the memory device; and in response to the memory system being powered off, store the (N+1)th updated parameter table in the memory device. For instance, Chen states: “the channel parameters may be copied from time to time to the circuit 94 for nonvolatile storage while power is removed. When power is returned, the channel parameters may be copied from the circuit 94 back to the circuit 132” (¶[0068]). This directly teaches the power-on/power-off loading and storing of parameter tables.
Claim 15: Chen and Papandreou teach the memory system of claim 1, wherein the memory device comprises a plurality of memory blocks, and the memory block comprises the plurality of physical pages, wherein the first physical page and the second physical page are located in a same memory block. For instance, Chen’s read scrub operates on a block (¶[0057]), and the pages discussed (pages 0–127) are within the same block.
Claim 19: Chen and Papandreou teach the memory controller of claim 18, wherein the control circuit is configured to: before obtaining the first parameter of at least one physical page of the plurality of physical pages according to the data fed back by the memory device, send a read scrub start instruction to the memory device through the interface. For instance, Chen’s read scrub controller (circuit 108) initiates read scrub operations (¶[0050]). Sending a “start instruction” is a necessary and inherent part of initiating a read scrub operation.
Claims 8 is rejected under 35 U.S.C. § 103(a) as obvious over Chen in view of Papandreou and further in view of CN116778986A.
Claim 8: Chen and Papandreou teach the memory system of claim 6, but fail to teach that the preset model is a quadratic function model, and the first parameter is a curvature of a curve where the quadratic function model is located. However, CN116778986A teaches building a conversion model between bit flip data and voltage offset coefficients (¶[0005]-[0006], [0058]), and while it uses a linear model (RRV = p1*x + p2), a quadratic function is a well-known and obvious alternative for curve fitting. CN116778986A further teaches setting thresholds/intervals around the model (¶[0063]-[0065]), predicting the optimal reference voltage (¶[0054]), and iteratively adjusting read voltages if measurements fall outside the interval (¶[0063]). The use of the minimum of a quadratic curve to predict optimal reference voltage and the use of symmetry to determine additional reference voltages are standard mathematical applications of a quadratic model. Therefore, it would have been obvious to one of ordinary skill in the art to apply CN116778986A’s model-based prediction techniques to Chen’s read-scrub framework, with Papandreou providing the location-based mapping that integrates with the model in order to optimize the system.
Allowable Subject Matter
Claims 9-14, 16 and 17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
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/GUERRIER MERANT/Primary Examiner, Art Unit 2111 7/15/2026
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