CTNF 19/028,790 CTNF 88362 Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. DETAILED ACTION This Office Action is in response to Preliminary amendment submitted on 01/23/2025. By this amendment, original claims are amended and therefore, amended claims 2-21 are pending in this action. Information Disclosure Statement 06-52 The information disclosure statement (IDS) submitted on 03/10/2025, 01/17/2025 was filed. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Double Patenting 08-33 AIA The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg , 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman , 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi , 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum , 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel , 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington , 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA. A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA/25, or PTO/AIA/26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. 08-34 AIA Claim s 2-21 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim s of U.S. Patent No. US 11,416,735 . Although the claims at issue are not identical, they are not patentably distinct from each other because of the following: Instant Application (for example) US 11,416,735 (for example) As per claim 2: As per claim 12: a first stage of circuitry configured to: combine received encoded data from a memory with a first set of predetermined weights, combine received encoded data from a memory with a first set of predetermined weights, wherein the encoded data includes at least one error bit; and evaluate at least one non-linear function using combinations of the received encoded data to provide intermediate data; and a second stage of circuitry configured to receive the intermediate data and combine the intermediate data using a second set of predetermined weights to generate an error-reduced version of the received encoded data Combination of claims 1 and 6: a first stage of circuitry configured to … combine the stored version of the encoded data with a first set of predetermined weights, and (from claim 6) mix the stored version of the encoded data among a set of predetermined weights selected for error reduction of data (from claim 1) …the encoded data including at least one error bit (from claim 1) to evaluate at least one non-linear function using combinations of the stored version of the encoded data …to provide intermediate data; and (from claim 6) at least a second stage of circuitry configured to receive the intermediate data and (from claim 6) combine the intermediate data using a second set of predetermined weights to generate the error-reduced version of the encoded data, (from claim 6) As per claim 3: wherein the first stage of circuitry is further configured to evaluate the at least one non-linear function using the combinations of the received encoded data and delayed versions of the combinations of the received encoded data. As per claim 6: wherein a first stage of circuitry configured to …to evaluate at least one non-linear function using combinations of the stored version of the encoded data and delayed versions of the combinations of the stored version of the encoded data to provide intermediate data… As per claim 5: wherein the first set of predetermined weights and the second set of predetermined weights are based on training of a neural network using known error-encoded data and encoded data pairs. As per claim 7: wherein the first and second sets of predetermined weights are based on training of a neural network using known errored-encoded data and encoded data pairs, the known errored-encoded data …. As per claim 6: wherein the error-reduced version of the encoded data corresponds to the encoded data received from the memory without the at least one error bit. As per claim 2: wherein the error-reduced version of the encoded data corresponds to the stored version of the encoded data without the at least one error bit. As per claim 7: wherein the error-reduced version of the received encoded data includes a reduction of a bit error rate (BER) or an increase of a signal-to-noise ratio (SNR) as compared to a respective BER or SNR of the received encoded data. As per claim 11: wherein the error-reduced version of the encoded data includes a reduction of a bit error rate (BER) or an increase of a signal-to-noise ratio (SNR) as compared to a respective BER or SNR of the stored version of the encoded data. One of ordinary skill in the art would clearly recognize independent claims of current application is an obvious variation of the claimed subject matter of independent claims of patent US 11,563,449 because both comprise a first stage of circuitry configured to: combine/mix received encoded data from a memory with … predetermined weights, wherein the encoded data includes at least one error bit; and evaluate at least one non-linear function using combinations of the received encoded data to provide intermediate data; and a second stage of circuitry configured to receive the intermediate data and combine the intermediate data using a second set of predetermined weights to generate an error-reduced version of the received encoded data. The difference is that limitation of claim 1 of current application is recited in claim 6 of patent US 11,563,449 . 08-34 AIA Claim s 2-21 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim s of U.S. Patent No. US 12,237,846 . Although the claims at issue are not identical, they are not patentably distinct from each other because both recites a variation of a first stage and a second stage that combine encoded data with a set of predetermined weights. (see example below) Instant Application (for example) US 12,237,846 (for example) As per claim 2: As per claim 12: a first stage of circuitry configured to: combine received encoded data from a memory with a first set of predetermined weights, wherein the encoded data includes at least one error bit; and evaluate at least one non-linear function using combinations of the received encoded data to provide intermediate data; and a second stage of circuitry configured to receive the intermediate data and combine the intermediate data using a second set of predetermined weights to generate an error-reduced version of the received encoded data As per claim 7: combine the received encoded data with a first set of predetermined weights, and As per claim 3: encoded data corresponds to the encoded data received from the memory without the at least one error bit. As per claim 1: Continued to evaluate at least one non-linear function using combinations of the received encoded data … to provide intermediate data; and a second stage of circuitry configured to receive the intermediate data and combine the intermediate data using a second set of predetermined weights to generate the error-reduced version of the encoded data . 08-34 AIA Claim s 2-21 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim s of U.S. Patent No. US 11,755,408 . Although the claims at issue are not identical, they are not patentably distinct from each other because both recites a variation of a first stage and a second stage that combine encoded data with a set of predetermined weights. (see example below) Instant Application (for example) US 11,755,408 (for example) As per claim 2: As per claim 12: combine received encoded data from a memory with a first set of predetermined weights, combine the intermediate data using a second set of predetermined weights to generate an error-reduced version of the received encoded data As per claim 4: (for example) mix the stored version of the encoded data with an additional set of predetermined weights … … generate an error-reduced version of the encoded data; and an error-correction code decoder configured to receive the error-reduced version of the encoded data and to provide decode data based on the error-reduced version of the encoded data . 08-34 AIA Claim s 2-21 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim s of U.S. Patent No. US 11,563,449 . Although the claims at issue are not identical, they are not patentably distinct from each other because both recites a variation of a first stage and a second stage that combine encoded data with a set of predetermined weights. (see example below) Instant Application (for example) US 11,563,449 (for example) As per claim 2: As per claim 12: combine received encoded data from a memory with a first set of predetermined weights, … combine the intermediate data using a second set of predetermined weights to generate an error-reduced version of the received encoded data As per claim 6: (for example) combine the stored version of the encoded data with a first set of predetermined weights, and … combine the intermediate data using a second set of predetermined weights to generate the error-reduced version of the encoded data, … Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to THIEN DANG NGUYEN whose telephone number is (571)272-9189. The examiner can normally be reached Monday-Friday 7 AM - 3:30 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Mark Featherstone can be reached on 571-270-3750. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Thien Nguyen/ Primary Examiner, Art Unit 2111 Application/Control Number: 19/028,790 Page 2 Art Unit: 2111 Application/Control Number: 19/028,790 Page 3 Art Unit: 2111 Application/Control Number: 19/028,790 Page 4 Art Unit: 2111 Application/Control Number: 19/028,790 Page 5 Art Unit: 2111 Application/Control Number: 19/028,790 Page 6 Art Unit: 2111 Application/Control Number: 19/028,790 Page 7 Art Unit: 2111 Application/Control Number: 19/028,790 Page 8 Art Unit: 2111 Application/Control Number: 19/028,790 Page 9 Art Unit: 2111 Application/Control Number: 19/028,790 Page 10 Art Unit: 2111 Application/Control Number: 19/028,790 Page 11 Art Unit: 2111 Application/Control Number: 19/028,790 Page 12 Art Unit: 2111 Application/Control Number: 19/028,790 Page 13 Art Unit: 2111 Application/Control Number: 19/028,790 Page 14 Art Unit: 2111 Application/Control Number: 19/028,790 Page 15 Art Unit: 2111 Application/Control Number: 19/028,790 Page 16 Art Unit: 2111 Application/Control Number: 19/028,790 Page 17 Art Unit: 2111 Application/Control Number: 19/028,790 Page 18 Art Unit: 2111
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