DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
1. The information disclosure statements (IDS) submitted on 1/17/2025 and 7/14/2025 are in compliance with the provisions of 37 CFR 1.97. According, the information disclosure statement is being considered by the Examiner. Examiner Notes
2. Examiner cites particular paragraphs, columns and line numbers in the references as applied to the claims below for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that, in preparing responses, the applicant fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner.
Claim Rejections - 35 USC § 103
3. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
4. Claims 1-4, 7-8, and 10-12 are rejected under 35 U.S.C. 103 as being unpatentable over Ishikawa et al. (US. Pub. 20030072120; hereinafter “Ishikawa”) in view of Matsuda (WO2023095695; hereinafter “Matsuda”).
Regarding claim 1, Ishikawa discloses an exciter overcurrent detection device (a load driving device, in Fig. 7, for protecting wiring from an overcurrent. See paragraphs [0008 and 28]) comprising: an overcurrent comparison part (a current restriction circuit 14 in Fig. 7, see [0029-30])
configured to compare a current of an exciter (load current, namely the current
of switch 10) and a reference current (overcurrent restriction threshold) and output an overcurrent comparison signal (output of current restriction unit 14, which in turn triggers the restriction detecting unit 16, para.[0037-38]); a filter operatively connected to the overcurrent comparison part and configured to output an overcurrent generation signal when an output value of the overcurrent comparison part maintains an overcurrent state value during a filter time (a current restriction detecting unit 16 and timer 17, para.[30, 38]: the timer 17 outputs an overcurrent generation signal which cut off the load current by turning off switch 10 when the detected current is maintained higher than
the current reference during T1, see for example in Figs.3A-3B); a first counter operatively connected to the overcurrent comparison part and configured to cumulatively count para.[0059-60], the counter 25 counts how many times the current restriction detecting signal is output from 16 in a predetermined time;
furthermore, the overcurrent generation signal output by the counter 25 is in logical OR 26 with the overcurrent generation signal output from the timer 17.). Ishikawa does not specify that the first counter counts the time of overcurrent state. Matsuda discloses an abnormality detection device for detecting overload conditions in a fed load (a motor) and describes the detection of a continuous overload condition
over a time period Tc as well as the detection of intermittent overload conditions
(instantaneous overload and intermittent overload conditions) by counting the
number of occurrences and comparing it with a predetermined threshold (see at least in [0010, 27-31, 51]).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to employ the load driving device of Ishikawa by having the counter configured to accumulatively count a time of overcurrent state as taught by Matsuda for purpose of the abnormality detection device is capable of accurately detecting an overcurrent abnormality (see the summary).
Regarding claim 2, Ishikawa and Matsuda disclose the exciter overcurrent detection device of claim 1, Ishikawa further teaches comprising an OR gate operatively connected to the filter and the comparator and configured to receive an output of the filter and an output of the comparator to output a final overcurrent generation signal (OR gate 26 in Fig. 7).
Regarding claim 3, Ishikawa and Matsuda disclose the exciter overcurrent detection device of claim 1, Ishikawa further teaches wherein the first counter is configured to detect an overcurrent due to oscillation of the current of the exciter (intermittent overcurrents in [0047]).
Regarding claim 4, Ishikawa and Matsuda disclose the exciter overcurrent detection device of claim 1, Ishikawa further teaches wherein the first counter resets when a time corresponding to a set reset counter is reached (the number of intermittent overcurrents are counted within a predetermined time set by a multivibrator in [0059-60]).
Regarding claim 7, Ishikawa and Matsuda disclose the exciter overcurrent detection device of claim 1, Ishikawa further teaches wherein the filter comprises a second counter configured to count a time that the output value of the overcurrent comparison part maintains the overcurrent state value (the timer 17 in Fig. 7).
Regarding claim 8, Ishikawa and Matsuda disclose the exciter overcurrent detection device of claim 1, Ishikawa further teaches including a controller, wherein the controller is configured to turn off the exciter according to the overcurrent generation signal (switch 9 cuts the load current in response to the overcurrent signals in Fig. 7).
Regarding claim 10, Ishikawa discloses an exciter overcurrent detection device (a load driving device, in Fig. 7, for protecting wiring from an overcurrent. See paragraphs [0008 and 28]) comprising: an overcurrent comparison part (a current restriction circuit 14 in Fig. 7, see [0029-30])
configured to compare a current of an exciter and a reference current (overcurrent restriction threshold) and output an overcurrent comparison signal (output of current restriction unit 14, which in turn triggers the restriction detecting unit 16, para.[0037-38]); a processor (such as a microcomputer in [0071]); and a memory (microcomputer) operatively connected to the memory and storing at least one instruction to be executed by the processor, wherein when the at least one instruction stored in the memory is executed by the processor (see [0071]), the at least one instruction enables the processor to: determine whether an output value of the overcurrent comparison part maintains an overcurrent state value during a filter time (a current restriction detecting unit 16 and timer 17, para.[30, 38]: the timer 17 outputs an overcurrent generation signal which cut off the load current by turning off switch 10 when the detected current is maintained higher than the current reference during T1, see for example in Figs.3A-3B); accumulate para.[0059-60], the counter 25 counts how many times the current restriction detecting signal is output from 16 in a predetermined time; furthermore, the overcurrent generation signal output by the counter 25 is in logical OR 26 with the overcurrent generation signal output from the timer 17.); and determine that an overcurrent has occurred when the output value of the overcurrent comparison part maintains the overcurrent state value during the filter time, or when the accumulated time that the output value of the overcurrent comparison part corresponds to the overcurrent state value exceeds the threshold value (para.[0059-60], the counter 25 counts how many times the current restriction detecting signal is output from 16 in a predetermined time;
furthermore, the overcurrent generation signal output by the counter 25 is in logical OR 26 with the overcurrent generation signal output from the timer 17.).
Ishikawa does not specify that the first counter counts the time of overcurrent state. Matsuda discloses an abnormality detection device for detecting overload conditions in a fed load (a motor), comprising a controller (a control unit 30 comprises a microcomputer included CPU, ROM, RAN, I/O… see Fig. 2 and [0021]); and a memory operatively connected to the memory and storing at least one instruction to be executed by the processor (see [0021, 70] and Fig. 2), wherein when the at least one instruction stored in the memory is executed by the controller, the at least one instruction enables the controller to accumulate a time of overcurrent state (at least in [0010, 27-31, 51] describes the detection of a continuous overload condition over a time period Tc as well as the detection of intermittent overload conditions
(instantaneous overload and intermittent overload conditions) by counting the
number of occurrences and comparing it with a predetermined threshold.
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to employ the load driving device of Ishikawa by having the counter configured to accumulatively count a time of overcurrent state as taught by Matsuda for purpose of the abnormality detection device is capable of accurately detecting an overcurrent abnormality (see the summary).
Regarding claim 11, Ishikawa and Matsuda disclose the exciter overcurrent detection device of claim 10, Ishikawa further teaches wherein the processor is further configured to detect an overcurrent due to oscillation of the current of the exciter (OR gate 26 in Fig. 7).
Regarding claim 12, Ishikawa and Matsuda disclose an exciter overcurrent detection system comprising: the exciter overcurrent detection device of claim 10; Ishikawa further teaches a controller configured to turn off the exciter according to the overcurrent generation signal (switch 9 cuts the load current in response to the overcurrent signals in Fig. 7).
5. Claims 5-6, 9 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Ishikawa et al. in view of Matsuda.
Regarding claim 5, Ishikawa and Matsuda disclose the exciter overcurrent detection device of claim 4, except for explicitly specifying that wherein the time corresponding to the reset counter is an integer multiple of the filter time. However setting the time corresponding to the reset counter at particular time value, such as an integer multiple of the filter time, would simply be a matter of inventor design choice. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to employ the load driving device of Ishikawa and Matsuda by setting the time corresponding to the reset counter is an integer multiple of the filter time, in order to meet the system design and specification requirement.
Regarding claim 6, Ishikawa and Matsuda disclose the exciter overcurrent detection device of claim 1, except for explicitly specifying wherein the filter time is equal to the threshold value. However setting the filter time for a value that is equal to the threshold value, is a known practice in the art and would simply be a matter of inventor design choice. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to employ the load driving device of Ishikawa and Matsuda by setting the controller for periodically re-execute the exciter after the exciter is turned off, in order to meet the system design and specification requirement.
Regarding claim 9 and similarly claim 13, Ishikawa and Matsuda disclose the exciter overcurrent detection device of claim 8, except for explicitly specifying wherein the controller is further configured to periodically re-execute the exciter after the exciter is turned off. However setting the controller for periodically re-execute the exciter after the exciter is turned off, is a known practice in the art and would simply be a matter of inventor design choice. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to employ the load driving device of Ishikawa and Matsuda by setting the controller for periodically re-execute the exciter after the exciter is turned off, in order to meet the system design and specification requirement.
Prior Art of Record
6. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Errico et al. (U.S Pub. 20220190585) discloses an overcurrent detection circuit (see specification for more details). Kleine (U.S Pub. 20160204632) discloses methods for overcurrent protection in a battery charger (see specification for more details).
Cheng (U.S Pat. 7636227) discloses a circuit for providing over-current protection (see specification for more details).
Conclusion
7. Any inquiry concerning this communication or earlier communications from the examiner should be directed to THANG LE whose telephone number is (571)272-9349. The examiner can normally be reached on Monday thru Friday 7:30AM-5:00PM EST.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Huy Phan can be reached on (571) 272-7924. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/THANG X LE/Primary Examiner, Art Unit 2858
8/11/2026
Prosecution Insights