Prosecution Insights
Last updated: May 29, 2026
Application No. 19/036,100

Driving structure for display panel

Non-Final OA §102
Filed
Jan 24, 2025
Priority
Jan 25, 2024 — provisional 63/624,807
Examiner
MATTHEWS, ANDRE L
Art Unit
2621
Tech Center
2600 — Communications
Assignee
Sitronix Technology Corporation
OA Round
1 (Non-Final)
61%
Grant Probability
Moderate
1-2
OA Rounds
2y 2m
Est. Remaining
78%
With Interview

Examiner Intelligence

Grants 61% of resolved cases
61%
Career Allowance Rate
311 granted / 508 resolved
-0.8% vs TC avg
Strong +17% interview lift
Without
With
+16.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 6m
Avg Prosecution
16 currently pending
Career history
545
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
87.4%
+47.4% vs TC avg
§102
5.9%
-34.1% vs TC avg
§112
5.5%
-34.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 508 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-5 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Liao (US 2022/0375398). Regarding claim 1, Liao teaches A driving structure for a display panel, comprising: a controller, disposed on the display panel ( Fig. 1 control circuit 30), generating a data signal and a data clock signal ([0013]) ; and at least one driver, disposed on the display panel (Fig. 1 drivers 22), receiving the data signal and the data clock signal (Fig. 3 shows storage circuit 26 of driver 22 receiving data signal Din and data clock signal DClk), wherein the controller sets a signal level (enable) of the data clock signal according to whether the at least one driver needs to update data thereof (timing controller 36 of controller 30 transmits the input data to the driving group 22and generates timing signals according to control parameters [0016]. Fig. 2 also shows the timing controller transmits the enable signal to the enable circuit 24 of the deriving groups 22[0017-0019]). Regarding claim 2, Liao teaches wherein the at least one driver receives the data signal according to a timing of the data clock signal ([0013] teaches the drivers 22 will receive input data at different times, when a driver 22 of the driving group 20 receives the input data, the other drivers 22 do not receive the input data. After this driver 22 receives the pixel data of the input data, another driver 22 is driven by this driver 22 to receive the input data for receiving another pixel data of the input data.). Regarding claim 3, Liao teaches wherein the controller sets a signal level of the data signal and the signal level of the data clock signal according to whether the at least one driver needs to update the data thereof (([0013] teaches the drivers 22 will receive input data at different times, when a driver 22 of the driving group 20 receives the input data, the other drivers 22 do not receive the input data. After this driver 22 receives the pixel data of the input data, another driver 22 is driven by this driver 22 to receive the input data for receiving another pixel data of the input data. Therefore its clear the data clock signal will start the transmission of data to the driver in a time-divisionally manner [0022]). Regarding claims 4, Liao teaches wherein the at least one driver comprises a first driver and a second driver, the controller transmits a first enable signal to the first driver, the first driver transmits a second enable signal to the second driver according to the data signal and the data clock signal ([0013][0018-0019]). Regarding claim 5, Liao teaches wherein the first driver starts to receive the data signal and the data clock signal according to the first enable signal, and the second driver starts to receive the data signal and the data clock signal according to the second enable signal ([0013][0018-0019] teach that when the first driver is enable to receive the other drivers are disabled until the first driver is finished then the clock signal is passed to the next driver to be enable while the other drivers are disabled.). Allowable Subject Matter Claims 6-11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Claim 6 is indicated allowable because the at least one driver transmits an enable signal according to a level variation of the first data signal, in combination with the other claim limitations.. Claim 8 is indicated allowable because the at least one driver transmits an enable signal according to a level variation of the second data signa, in combination with the other claim limitations. Claim 10 is indicated allowable because at least one driver transmits an enable signal according to level variations of the first and second data signals, in combination with the other claim limitations. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDRE L MATTHEWS whose telephone number is (571)270-5806. The examiner can normally be reached Mon-Fri 9:00-6:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Amr Awad can be reached at 571-272-7764. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ANDRE L MATTHEWS/ Primary Examiner, Art Unit 2621
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Prosecution Timeline

Jan 24, 2025
Application Filed
Dec 22, 2025
Non-Final Rejection mailed — §102 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12640084
ELECTRONIC DEVICE AND METHOD OF DRIVING THE SAME
2y 5m to grant Granted May 26, 2026
Patent 12619308
WEARABLE DEVICE FOR ELECTRO-QUASISTATIC HUMAN BODY COMMUNICATION AND A METHOD THEREOF
1y 10m to grant Granted May 05, 2026
Patent 12614523
Display Panel and Display Apparatus
2y 1m to grant Granted Apr 28, 2026
Patent 12609077
DISPLAY SUBSTRATE AND DISPLAY DEVICE
2y 5m to grant Granted Apr 21, 2026
Patent 12592187
Zonal Attenuation Compensation
1y 8m to grant Granted Mar 31, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
61%
Grant Probability
78%
With Interview (+16.6%)
3y 6m (~2y 2m remaining)
Median Time to Grant
Low
PTA Risk
Based on 508 resolved cases by this examiner. Grant probability derived from career allowance rate.

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