DETAILED ACTION
This correspondence is in response to the request for continued examination communications received January 27, 2026. Claims 37-49 are pending. In light of the determination established in the petition decision dated April 28, 2026, this office action will be examined with the earliest date accepted by the office which is in 2022, which was established by the parent application 17/974,325 on October 26, 2022. In the petition decision, it is understood that the validity of the many priority continuity linkages have been called into question, which will need to be clarified by Applicant, as stated in the petition decision. For purposes of examination, the date of October 26, 2022 will now be the priority date accepted as the “effective filing date”.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 37 and the claims that depend therefrom are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. The recitation, “wherein the presence of the in-pillar holes increases by a factor of at least 1.1 the absorption of the light by at least some of the photodetectors relative to like photodetectors in pillars lacking said holes.”, lacks support in the specification. The first support for the holes themselves (the holes within the pillars) being the means by which a 1.1 gain in absorption occurs, is in the claim set dated September 16, 2025 and in the corrected claim set dated September 26, 2025, which are not the “originally filed” claim set, and consequently, cannot be accepted as “originally filed”. The originally filed claim set dated January 24, 2025 does not contain this particular limitation.
Therefore, as the value of 1.1 being a concrete amount of increase in absorption due to the holes in the pillars concept was not originally filed, this content is considered to be “new matter” and will only be examined as the holes in the pillars generally will increase absorption to a degree which has not been specified, but not at the quoted value that lacks support in the disclosure.
Applicant’s Claim to Figure Comparison
It is noted that this comparison is merely for the benefit of reviewers of this office action during prosecution, to allow for an understanding of the examiner’s interpretation of the Applicant’s independent claims as compared to disclosed embodiments in Applicant’s Figures. No response or comments are necessary from Applicant.
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Regarding claim 37, the Applicant discloses in Figs. 40 and 49, a structure comprising:
an array of elongated pillars of semiconductor material in which each of at least some of the pillars has:
(i) a respective light-receiving surface,
(ii) respective sides,
(iii) width of 50-2000 nm,
(iv) height of 100-10000 nm, and
(v) at least one photodetector of Si, Ge, and/or alloyed SiGe semiconductor material formed in the pillar;
wherein each of the photodetectors:
(i) has P-doped and N-doped regions of the semiconductor material,
(ii) is configured to generate electrical charge carriers in the semiconductor material of the photodetector in response to light that (a) is in the visible and infrared wavelengths, and (b) illuminates along a light direction the light-receiving surface of the pillar in which the photodetector is formed;
one or more in-pillar holes each of which:
(i) is fabricated as a recess in each of the pillars in which at least one of the photodetectors is formed, and
(ii) extends along the light direction into the semiconductor material of the pillar in which the in-pillar hole is fabricated;
side-isolation comprising solid dielectric material between at least portions of the sides of at least some of the pillars;
electrical contacts configured to provide electrical pathways coupled to at least some of the photodetectors, including for selected reverse-biasing at least some of the photodetectors;
wherein the presence of the in-pillar holes increases by a factor of at least 1.1 the absorption of the light by at least some of the photodetectors relative to like photodetectors in pillars lacking said holes.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 37-47 and 49 are rejected under 35 U.S.C. 103 as being unpatentable over Jin et al. (US 2018/0182806) in view of Wang et al. (US 2016/0126381).
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Regarding claim 37, Jin discloses in Figs. 2, 3, 5 and 35, a structure (structure shown includes the integration of transistors with ‘TG’ and photoconversion elements 4/8) comprising:
an array of elongated pillars (each pixel of 4/8 are considered to be pillars as they are separated by DTI, thus forming separated pillars, and as can be seen in Fig. 2, the pillars are elongated in the vertical direction) of semiconductor material (see ¶ 0040, where silicon is disclosed as the material making up the pillar devices) in which each of at least some of the pillars has:
(i) a respective light-receiving surface (in active function demonstration depicted in Fig. 3, each pillar can be seen receiving light rays ‘L’ in the upper and side surfaces thereof),
(ii) respective sides (sidewalls of noted pillars are shown abutting DTI),
(v) at least one photodetector (see ¶ 0045, “The first impurity injection region 8 and the second impurity injection region 4 may constitute a photoelectric converter (e.g. a photodiode)”) of Si, Ge, and/or alloyed SiGe semiconductor material formed in the pillar (see ¶ 0040, where silicon is disclosed as the material making up the pillar devices);
wherein each of the photodetectors:
(i) has P-doped and N-doped regions of the semiconductor material (regions 4 and 8 of oppositely doped conductivity type, ¶ 0045, “the first impurity injection region 8 may be doped with P-type impurities, and the second impurity injection region 4 may be doped with N-type impurities”),
(ii) is configured to generate electrical charge carriers in the semiconductor material of the photodetector in response to light that (a) is in the visible and infrared wavelengths (definition of a “photoelectric converter”, ¶ 0045, where ¶ 0058 discusses both visible and infrared light being converted by the device), and (b) illuminates along a light direction the light-receiving surface of the pillar in which the photodetector is formed (light can be seen as ‘L’ rays visible in Fig. 3, which illuminate along upper and side surfaces of the noted pillars);
one or more in-pillar holes (“light splitter 35”, ¶ 0052) each of which:
(i) is fabricated as a recess in each of the pillars in which at least one of the photodetectors is formed (35 are recesses formed in the top surface of each of the noted pillars, which have been established as photodetectors), and
(ii) extends along the light direction into the semiconductor material of the pillar in which the in-pillar hole is fabricated (35 are formed vertically into the top surface of the pillars, where light rays coming in vertically along the depth of the recesses 35);
side-isolation (DTI) comprising solid dielectric material (discussed in ¶ 0071) between at least portions of the sides of at least some of the pillars (“deep trench isolation structure DTI may include at least one of a silicon oxide layer, a silicon nitride layer, and a silicon oxynitride layer. The deep trench isolation structure DTI may be formed in a mesh shape when viewed in a plan view so that the deep trench isolation structure DTI surrounds each of the plurality of unit pixel regions UP.”, ¶ 0071);
electrical contacts configured to provide electrical pathways coupled to at least some of the photodetectors (as can be seen in Fig. 34 the photodetector ‘PD’ can be seen with two electrodes, one connected to the transfer gate TG and one connected to ground),
wherein the presence of the in-pillar holes increases by a factor of at least 1.1 the absorption of the light by at least some of the photodetectors relative to like photodetectors in pillars lacking said holes (“the scattering of the light L by the light splitter 35 may induce multiple reflections to increase the light path within the unit pixel region UP. As a result, the absorption factor of, e.g., the infrared light or red light may increase in the light sensor 100, and the quantum efficiency of the infrared light or red light may increase in the light sensor 100.”, ¶ 0059. It is noted, that as the increase factor of “1.1” is “new matter” and not supported by the disclosure nor the originally filed claims, thus the limitation has been interpreted to mean that the holes merely provide some unquantified increase in absorption, which the Jin reference clearly considers and intends to generate an increase in absorption with the use of the splitters 35.).
First, Jin does not disclose the dimensions of the pillars, however Jin does disclose that the lenses are on micron scale, so it is well within the understanding that the pillars would be of dimensions of micron scale (“A plurality of micro lenses 46”, ¶ 0055). Therefore, Jin does not explicitly disclose,
“… at least some of the pillars has: … (iii) width of 50-2000 nm, … (iv) height of 100-10000 nm”.
Wang discloses in ¶ 0141, “The pillar diameter range from 50-1200 nm (smallest dimension can be 50 and largest dimension 1200 nm) and can be spaced uniformly or non-uniformly, periodic or aperiodic, chirped, or a pattern either locally or globally to optimize APD/PD performance and applications. The spacing of the pillars can be 20-2000 nm. The microstructured pillars can be 100 to 10000 nm in length that is optimized for bandwidth and efficiency for a particular wavelength near the silicon bandgap for example 850, 880, 980, 1000 nm.”
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to use the limitation of, “… at least some of the pillars has: … (iii) width of 50-2000 nm, … (iv) height of 100-10000 nm”, as disclosed by Wang in the system of Jin, for the purpose of forming the pillars on a dimensional scale to be able to interact with desired incoming wavelengths of light. (G) Some teaching, suggestion, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention.
Second, Jin does not disclose, “including for selected reverse-biasing at least some of the photodetectors”.
Wang discloses in ¶ 0012, [electrical contacts configurated to provide …] including for selected reverse-biasing at least some of the photodetectors (“reverse biasing circuitry configured to apply a voltage between the cathode and anode regions such that the cathode region is driven to a more positive voltage than the anode region”).
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to use the limitation of, “[electrical contacts configurated to provide …] including for selected reverse-biasing at least some of the photodetectors”, as disclosed by Wang in the system of Jin, for the purpose of improving quantum efficiency is light absorption. (G) Some teaching, suggestion, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention.
Regarding claim 38, the prior art of Jin et al. disclose the structure of claim 37, in which the array is monolithically integrated with Si electronic devices (Jin discloses transistors shown, which are formed in the silicon substrate 1, ¶ 0040, which are provided to read out the collected light signals. Thus device integration is clearly satisfied, along with “monolithic” as all devices are collected into a single solid whole.)
Regarding claim 39, the prior art of Jin et al. disclose the structure of claim 37, in which at least one of the in-pillar holes in each of at least some of the pillars is elongated in the light direction (Jin discloses the noted pillars are oriented along the incoming light ray ‘L’ path and direction).
Regarding claim 40, the prior art of Jin et al. disclose the structure of claim 37, in which each of at least some of the holes is elongated in a direction along the light-receiving surface of the pillar in which the hole is fabricated (Jin shows where 35 are oriented extending into the pillars vertically which is along the incoming light ray ‘L’ path and direction).
Regarding claim 41, the prior art of Jin et al. disclose the structure of claim 40, in which the array is monolithically integrated with Si electronic devices (Jin discloses transistors shown, which are formed in the silicon substrate 1, ¶ 0040, which are provided to read out the collected light signals. Thus device integration is clearly satisfied, along with “monolithic” as all devices are collected into a single solid whole.).
Regarding claim 42, the prior art of Jin et al. disclose the structure of claim 40, in which each of at least some of the pillars has a plurality of the elongated holes (Jin shows the noted pillars are formed with the 35, which elongate along at least a horizontal or a vertical direction. The splitters may be formed in plurality, “In an exemplary embodiment, the light splitter 35 may be provided in plural.”, ¶ 0052).
Regarding claim 43, the prior art of Jin et al. disclose the structure of claim 40, in which each of at least some of the pillars has only one of the elongated holes (Jin shows in Figs. 2, 3 and 5, wherein there is one 35 per pillar).
Regarding claim 44, the prior art of Jin et al. disclose the structure of claim 40, in which each of at least some of the elongated holes has at least one closed contour remote from side edges of the light-receiving surface of the pillar in which the hole is fabricated (Jin shows in Fig. 5, where 35 are closed contours, where the contour loops into itself and is distance from the sides of the pillars).
Regarding claim 45, the prior art of Jin et al. disclose the structure of claim 37, in which each of at least some of the pillars includes only one of the photodetectors (Jin shows wherein each pillar includes just one photodetector 4/8).
Regarding claim 46, the prior art of Jin et al. disclose the structure of claim 37, in which two or more of the photodetectors are connected electrically in parallel (Wang discloses in ¶ 0184, “The multiple absorbing materials are connected in parallel as current sources”).
Regarding claim 47, the prior art of Jin et al. disclose the structure of claim 37, wherein the array of pillars is monolithically integrated with Si electronic devices (Jin discloses transistors shown, which are formed in the silicon substrate 1, ¶ 0040, which are provided to read out the collected light signals. Thus device integration is clearly satisfied, along with “monolithic” as all devices are collected into a single solid whole.) for transmitting electrical signals related to accumulations of the charge carriers in at least some of the photodetectors (each pillar has associated read out circuitry including transfer gate TG, ¶ 0046, floating diffusion FD, ¶ 0046, ground region 12, ¶ 0046, etc.).
Regarding claim 49, the prior art of Jin et al. disclose the structure of claim 37, in which the pillars in which the photodetectors are formed are elongated in the light direction (Jin discloses wherein one of the directions that the 35 extend in the vertical direction in which the light impinges upon the light receiving surface of the noted pillars).
Claim 48 is rejected under 35 U.S.C. 103 as being unpatentable over Jin et al. (US 2018/0182806) in view of Wang et al. (US 2016/0126381) in view of Wu et al. (US 11,211,419).
Regarding claim 48, the prior art of Jin et al. disclose the structure of claim 37, however Jin does not disclose,
“in which at least some of the holes extend 100 to 10000 nm in the light direction into the semiconductor material of the pillars in which the holes are formed.”
It is noted that the originally filed claim 1, from the claim set of this application, dated January 24, 2025 does disclose the dimensions of the holes formed in the pillars. However, as none of the parent applications contain this subject matter, the effective date of this claim content will be the filing date of this application, which is January 24, 2025.
It is noted that 100 to 10000 nm is equivalent to 0.1-10 micrometers.
Wu discloses a similar feature (112) in a pillar in an array of pillars that convert light, in Fig. 1 and col. 6, lines 59-60, “structure 112 is about 0.05-1.0 micrometers”.
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to use the limitation of, “in which at least some of the holes extend 100 to 10000 nm in the light direction into the semiconductor material of the pillars in which the holes are formed.”, as disclosed by Wu in the system of Jin, for the purpose of enhancing light absorption. (G) Some teaching, suggestion, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Eduardo A Rodela whose telephone number is (571)272-8797. The examiner can normally be reached M-F, 8:30-5:00pm ET.
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/EDUARDO A RODELA/Primary Examiner, Art Unit 2893
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