Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 09/19/2025 has been considered by the examiner.
Oath/Declaration
Oath/Declaration as file 02/18/2025 is noted by the Examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-26 are rejected under 35 U.S.C. 102(a)(1)/102(a)(2) as being anticipated by Kang et al. US 2024/0019500 (Provided by Applicant; Hereinafter Kang).
Regarding claim 1, Kang teaches circuitry for processing an analyte signal obtained from an electrochemical cell (Figs. 4-5) comprising a first electrode (Fig. 4-5; counter electrode, CE) and a second electrode (Fig. 4-5; working electrode, WE), the circuitry comprising:
a first converter (Figs. 4-5; output current measuring unit), comprising a first input (Figs. 4-5; positive input of amplifier ) coupled to the first electrode (Fig. 4-5; counter electrode, CE) and a first output (Figs. 4-5; output VOUT of the amplifier ), the first converter (Figs. 4-5; output current measuring unit) configured to:
establish a substantially constant first bias voltage (Figs. 4-5; ground potential) at the first input (Figs. 4-5; positive input of amplifier ); and
convert a first current at the first input to a first converted signal at the first output (Figs. 4-5; IC converted into VOUT = IC x RS);
a second converter (Figs. 4-5; applied current measurement unit), comprising a second input (Fig. 4-5; negative input of amplifier) coupled to the second electrode (Fig. 4-5; working electrode, WE) and a second output (Figs. 4-5; output VOUT of the amplifier ), the second converter (Figs. 4-5; applied current measurement unit) configured to:
convert a second current at the second input to a second converter signal at the second output (Figs. 4-5; VOUT = VB + IS x RS); and
processing circuitry (Figs. 4-5; [0015]; Claim 1) configured to detect a fault in the circuitry (Figs. 4-5; [0015]; Claim 1) based on the first and second converter signals (Figs. 4-5; [0015]; Claim 1).
Regarding claim 2, Kang further teaches Circuitry of claim 1, wherein the first converter comprises a transimpedance amplifier or a current conveyor (Fig. 4; see transimpedance amplifier in the lower part of Fig. 4).
Regarding claim 3, Kang further teaches Circuitry of claim 1, wherein the first converter is configured to mirror a voltage at a second input of the first converter at the first input of the first converter to establish the first bias voltage at the first input (Fig. 4; ground voltage at the negative input is mirrored at the positive input (virtual short-circuit)).
Regarding claim 4, Kang further teaches Circuitry of claim 1, wherein the second converter comprises a transimpedance amplifier or a current conveyor (Fig. 4; see transimpedance amplifier in the upper part of Fig. 4).
Regarding claim 5, Kang further teaches Circuitry of claim 1, wherein the processing circuitry comprises: one or more analog-to-digital converters, ADCs, configured to convert the first converted signal to a first digital signal (Figs. 4-5; [0015, 0043, 0044, 0060]; Claim 1, 11, 12), and to convert the second converted signal to a second digital signal (Figs. 4-5; [0015, 0043, 0044, 0060]; Claim 1, 11, 12), the processing circuitry configured to detect the fault based on the first and second digital signals (Figs. 4-5; [0015, 0043, 0044, 0060]; Claim 1, 11, 12).
Regarding claim 6, Kang further teaches Circuitry of claim 5, wherein the processing circuitry comprises: summing circuitry configured to sum the first and second digital signals to obtain a summed output signal (Figs. 4-5; [0015, 0043, 0044, 0060]; Claim 1, 11, 12); and comparison circuitry configured to: compare the summed output signal to a threshold output value (Figs. 4-5; [0015, 0043, 0044, 0060]; Claim 1, 11, 12); and detect the fault in the circuitry based on the comparison (Figs. 4-5; [0015, 0043, 0044, 0060]; Claim 1, 11, 12).
Regarding claim 7, Kang further teaches Circuitry of claim 6, wherein the comparison circuitry comprises a hysteretic comparator (Figs. 4-5; [0015, 0043, 0044, 0060]; Claim 1, 11, 12).
Regarding claim 8, Kang further teaches Circuitry of claim 6, wherein the processing circuitry further comprises: a low-pass filter coupled between the summing circuitry and the comparison circuitry (Figs. 4-5; [0015, 0043, 0044, 0060]; Claim 1, 11, 12).
Regarding claim 9, Kang further teaches Circuitry of claim 1, wherein the processing circuitry is configured to: transmit a fault interrupt to a host device on detection of the fault (Figs. 4-5; [0060]; Claim 10, 11).
Regarding claim 10, Kang further teaches Circuitry of claim 1, wherein the processing circuitry is configured to: transition the circuitry into an error state on detection of the fault (Figs. 4-5; [0015, 0043, 0044, 0060]; Claim 1, 11, 12).
Regarding claim 11, Kang further teaches Circuitry of claim 1, wherein the processing circuitry is configured to: power down the circuitry on detection of the fault (Figs. 4-5; [0015, 0043, 0044, 0060]; Claim 1, 11, 12).
Regarding claim 12, Kang further teaches Circuitry of claim 1, wherein the processing circuitry is configured to determine a characteristic of the electrochemical cell based on one or both of the first and second outputs (Figs. 4-5; [0043, 0044]; describing a blood glucose sensor).
Regarding claim 13, Kang further teaches Circuitry of claim 12, wherein the processing circuitry is configured to: determine a mean of the first and second outputs; and determine the characteristic of the electrochemical cell based on the mean (Figs. 4-5; [0015, 0043, 0044, 0060]; Claim 1, 11, 12).
Regarding claim 14, Kang further teaches Circuitry of claim 12, wherein the characteristic comprises one or more of: an impedance (Figs. 4-5; [0043, 0044]; describing a blood glucose sensor); an analyte concentration (Figs. 4-5; [0043, 0044]; describing a blood glucose sensor); a state of health of the electrochemical cell (Figs. 4-5; [0043, 0044]; describing a blood glucose sensor).
Regarding claim 15, Kang further teaches Circuitry of claim 1, wherein the electrochemical cell comprises a third electrode (Figs. 4-5; [0015, 0043, 0044, 0060]; Claim 1, 11, 12), the circuitry further comprising: a third converter (Figs. 4-5; [0015, 0043, 0044, 0060]; Claim 1, 11, 12), comprising a third input coupled to the third electrode and a third output (Figs. 4-5; [0015, 0043, 0044, 0060]; Claim 1, 11, 12), the third converter configured to: convert a third current at the third input to a third converter signal at the third output (Figs. 4-5; [0015, 0043, 0044, 0060]; Claim 1, 11, 12).
Regarding claim 16, Kang further teaches Circuitry of claim 15, wherein the processing circuitry is configured to: determine a characteristic of the electrochemical cell based on the third converter signal (Figs. 4-5; [0015, 0043, 0044, 0060]; Claim 1, 11, 12).
Regarding claim 17, Kang further teaches Circuitry of claim 15, wherein the first electrode is a counter electrode (Figs. 4-5; [0015, 0043, 0044, 0060]; Claim 1, 11, 12), and wherein the second and third electrodes are working electrodes (Figs. 4-5; [0015, 0043, 0044, 0060]; Claim 1, 11, 12).
Regarding claim 18, Kang further teaches Circuitry of claim 17, wherein the second and third electrodes are configured to detect different analytes in the electrochemical cell (Figs. 4-5; [0015, 0043, 0044, 0060]; Claim 1, 11, 12).
Regarding claim 19, Kang further teaches Circuitry of claim 1, wherein the electrochemical cell comprises a potentiostatic cell (Figs. 4-5; [0015, 0043, 0044, 0060]; Claim 1, 11, 12).
Regarding claim 20, Kang further teaches Circuitry of claim 1, wherein the electrochemical cell comprises a battery cell (Figs. 4-5; [0015, 0043, 0044, 0060]; Claim 1, 11, 12).
Regarding claim 21, Kang teaches Circuitry for processing an analyte signal obtained from an electrochemical cell (Figs. 4-5) comprising a first electrode (Fig. 4-5; counter electrode, CE), a second electrode (Fig. 4-5; working electrode, WE), and a third electrode (Figs. 4-5; [0015, 0043, 0044, 0060]; Claim 1, 11, 12), the circuitry comprising:
a first converter (Figs. 4-5; output current measuring unit), comprising a first input (Figs. 4-5; positive input of amplifier ) coupled to the first electrode (Fig. 4-5; counter electrode, CE); a second input (Figs. 4-5; [0015, 0043, 0044, 0060]; Claim 1, 11, 12) coupled to the second electrode (Fig. 4-5; working electrode, WE); and a first output (Figs. 4-5; output VOUT of the amplifier ), the first converter (Figs. 4-5; output current measuring unit) configured to:
establish a substantially constant first bias voltage (Figs. 4-5; ground potential) at the second input (Figs. 4-5; [0015, 0043, 0044, 0060]; Claim 1, 11, 12); and
convert a first current at the first input to a first converted signal at the first output (Figs. 4-5; IC converted into VOUT = IC x RS);
a second converter (Figs. 4-5; applied current measurement unit), comprising a third input (Fig. 4-5; negative input of amplifier) coupled to the third electrode (Figs. 4-5; [0015, 0043, 0044, 0060]; Claim 1, 11, 12) and a second output (Figs. 4-5; output VOUT of the amplifier ), the second converter (Figs. 4-5; applied current measurement unit) configured to:
convert a second current at the third input to a second converter signal at the second output (Figs. 4-5; VOUT = VB + IS x RS); and
processing circuitry (Figs. 4-5; [0015]; Claim 1) configured to detect a fault in the circuitry (Figs. 4-5; [0015]; Claim 1) based on the first and second converter signals (Figs. 4-5; [0015]; Claim 1).
Regarding claim 22, Kang further teaches Circuitry of claim 21, wherein the first electrode comprises a counter electrode (Fig. 4-5; counter electrode, CE), the second electrode comprises a reference electrode (Figs. 4-5; [0015, 0043, 0044, 0060]; Claim 1, 11, 12), and the third electrode comprises a working electrode (Fig. 4-5; working electrode, WE).
Regarding claim 23, Kang further teaches Circuitry of claim 22, wherein the second converter is configured to establish a substantially constant second bias voltage at the third electrode (Figs. 4-5; [0015, 0043, 0044, 0060]; Claim 1, 11, 12).
Regarding claim 24, Kang further teaches an integrated circuit (IC) (Figs. 4-5), comprising the circuitry of claim 1 (See Rejection of Claim 1).
Regarding claim 25, Kang further teaches a wearable device (Figs. 4-5; [0044]; the blood glucose sensor is wearable), comprising: circuitry of claim 1 (See Rejection of Claim 1); and the first (Fig. 4-5; counter electrode, CE) and second electrodes (Fig. 4-5; working electrode, WE).
Regarding claim 26, Kang further teaches the wearable device of claim 25, wherein the wearable device comprises one of an analyte monitor, a glucose monitor, a battery monitor, a mobile computing device, a smart watch, a remote control device, a home automation controller, an audio player, a video player, a mobile telephone, and a smartphone (Figs. 4-5; [0044]; the blood glucose sensor is wearable).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Schmalzl US 2020/0081058 - In some examples, a device includes a main array of circuit elements representing a main measurement range of parameter values and a test array of circuit elements representing a test measurement range of parameter values, the test measurement range being less than the main measurement range. The device also includes processing circuitry configured to select a portion of the main array of circuit elements representing a partial measurement range, the partial measurement range being less than or equal to the test measurement range.
Emmert et al. US 2006/0071657 - An integrated circuit having a speed measurement circuit that generates an indicator of a speed of the integrated circuit in response to a test signal. The speed measurement circuit obviates the need to repeatedly apply test signals at different clock frequencies to an integrated circuit or to externally measure delay time.
Haro US 2018/0144562 - An integrated automobile diagnostic and troubleshooting device circuitry operable to present an electrical load to a system or component under test, circuitry operable to provide an audible indication of continuity in a system or component under test, circuitry operable to provide a visual indication of current and voltage under test; and circuitry operable to provide differential output voltage to a system or component under test. In a preferred embodiment, the circuitry is integrated into a single handheld integrated housing allowing simultaneous operation of the circuitry by a single technician.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to RAUL J RIOS RUSSO whose telephone number is (571)270-3459. The examiner can normally be reached Monday-Friday: 10am-6pm, EST.
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/RAUL J RIOS RUSSO/Examiner, Art Unit 2858
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