Prosecution Insights
Last updated: October 02, 2026
Application No. 19/044,081

WORD LINE BIT IGNORE PARAMETERS IN A MEMORY DEVICE

Non-Final OA §102§103
Filed
Feb 03, 2025
Examiner
CHO, SUNG IL
Art Unit
2825
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
SanDisk Technologies Inc.
OA Round
1 (Non-Final)
91%
Grant Probability
Favorable
1-2
OA Rounds
4m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allowance Rate
551 granted / 603 resolved
+23.4% vs TC avg
Moderate +8% lift
Without
With
+8.5%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 0m
Avg Prosecution
42 currently pending
Career history
625
Total Applications
across all art units

Statute-Specific Performance

§101
0.8%
-39.2% vs TC avg
§103
42.3%
+2.3% vs TC avg
§102
33.3%
-6.7% vs TC avg
§112
12.4%
-27.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 603 resolved cases

Office Action

§102 §103
DETAILED ACTION The action is responsive to the following communications: the Application filed February 03, 2025 and the information disclosure statement (IDS) filed February 03, 2025. Claims 1-20 are pending. Claims 1, 8 and 15 are independent. Notice of Pre-AIA or AIA Status The present application is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement (IDS) submitted on February 03, 2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Drawings The drawings are objected to because: Figures 1-12 should be designated by a legend such as –Prior Art—because only that which is old is illustrated. See MPEP 608.02(g). Corrected drawings in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. The replacement sheet(s) should be labeled “Replacement Sheet” in the page header (as per 37 CFR 1.84(c)) so as not to obstruct any portion of the drawing figures. If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Objections Claim 13 is objected to because of the following informalities: Regarding claim 13, The memory device as set forth in claim [[4]]8, if substituted, would cure this deficiency. Appropriate correction is required. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-2, 8-9 and 15-16 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chih (US 2021/0098073). Regarding independent method claim 1, and devices claims 8 and 15, Chih discloses a method of programming a memory device, comprising the steps of: preparing a memory block that includes an array of memory cells that are arranged in a plurality of word lines (see FIG. 1: 110, e.g., para. 0016: a memory array 110 may be a flash memory array); determining if a selected word line (e.g., para. 0018: … setting a program bias voltage to the word line that a coupled to the selected memory cells …) of the plurality of word lines is in a first zone of the memory block (e.g., para. 0023: … the failed memory cells M11 and M12 may be classified to a same cell classification (e.g., a first cell classification) … ); in response to the selected word line being in the first zone of the memory block, setting a bit scan pass fail (BSPF) criteria at a first level (e.g., para. 0023: … the failed memory cells M11 and M12 may be classified to a same cell classification (e.g., a first cell classification (i.e., claimed pass/fail criteria at a first level)) …); in response to the selected word line not being in the first zone of the memory block, setting the BSPF criteria at a second level that is different than the first level (e.g., para. 0023: … cells M21 and M22 may be classified to a same cell classification (e.g., a second cell classification that is different from the first classification) …); and programming the memory cells of the selected word line in a plurality of program loops that include bitscan operations that utilize the BSPF criteria (see e.g., FIGS. 2: 260, adjusting a program pulse, which implies programming (see e.g., para. 0031: a process for adjusting a program pulse in a program operation)). Regarding claims 2, 9 and 16, which depends from claims 1, 8 and 15, respectively. Chih further teaches the first zone includes at least one word line that is on a source side of the memory block (see FIG. 5, i.e., word line in a flash memory on any side of the memory block). Claim Rejections - 35 USC § 103 The following is a quotation of AIA 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 3-7, 10-14 and 17-20 are rejected under AIA 35 U.S.C. 103 as being unpatentable over Chih (US 2021/0098073) in view of e.g., Prakash et al. (US 11,410,739). Regarding claims 3, 10 and 17, Chih teaches the limitations of claims 2, 9 and 16, respectively. Chih is silent with respect to the first zone includes no more than three word lines that are on the source side of the memory block. However, the claimed limitation is a well-known technology for a type of memory (e.g., flash memory) for its purpose. For support, of the above asserted facts, see for example, Prakash et al. (US 11,410,739), FIG. 6C: G0, and accompanying disclosure. It would have been obvious to one of ordinary skill in the art before the effective filing date to utilize NAND strings groups because these conventional technology are well established in the art of the memory devices. Regarding claims 4, 11 and 18, Chih teaches the limitations of claims 3, 10 and 17, respectively. Chih further teaches for the BSPF criteria, the first level is less than the second level (see FIG. 5 and accompanying disclosure). Regarding claims 5, 12 and 19, Chih teaches the limitations of claims 4, 11 and 18, respectively. Chih is silent with respect to the steps of, in response to the selected word line being in the first zone, using a first number of tiers during a bitscan operation, and in response to the selected word line not being in the first zone, using a second number of tiers that is different than the first number of tiers during the bitscan operation. However, the claimed limitation, i.e., different number of grouping, is a well-known technology for a type of memory (e.g., flash memory) for its purpose. It would have been obvious to one of ordinary skill in the art before the effective filing date to utilize NAND strings groups because these conventional technology are well established in the art of the memory devices. Regarding claims 6, 13 and 20, Chih teaches the limitations of claims 1, 8 and 18, respectively. Chih is silent with respect to the first zone includes a plurality of bottom word lines in both a plurality of upper memory holes and a plurality of lower memory holes. However, claimed limitation of holes in memory (especially flash memory) is a well-known technology for a type of memory for its purpose. For support, of the above asserted facts, see for example, Prakash et al. (US 11,410,739), FIG. 6C, and accompanying disclosure. It would have been obvious to one of ordinary skill in the art before the effective filing date to utilize NAND strings memory holes because these conventional technology are well established in the art of the memory devices. Regarding claims 7 and 14, Chih teaches the limitations of claims 6 and 13, respectively. Chih further teaches for the BSPF criteria, the first level is greater than the second level (see FIG. 5, set M22 and M21 as a first level and M11 and M12 as a second level, and the first level is greater than the second level). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SUNG IL CHO whose telephone number is (571)270-0137. The examiner can normally be reached on M-Th, 7:30AM-5PM; Every other F, 7:30AM-4PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Alexander G Sofocleous can be reached on 571-272-0635. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SUNG IL CHO/Primary Examiner, Art Unit 2825
Read full office action

Prosecution Timeline

Feb 03, 2025
Application Filed
Aug 31, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
91%
Grant Probability
99%
With Interview (+8.5%)
2y 0m (~4m remaining)
Median Time to Grant
Low
PTA Risk
Based on 603 resolved cases by this examiner. Grant probability derived from career allowance rate.

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